* reading CORB_READ_POS_RESET as zero fails on some chips (ie nForce).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@28849 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -354,13 +354,11 @@ init_corb_rirb_pos(hda_controller* controller)
|
|||||||
controller->stream_positions = (uint32*)
|
controller->stream_positions = (uint32*)
|
||||||
((uint8*)controller->corb + posOffset);
|
((uint8*)controller->corb + posOffset);
|
||||||
|
|
||||||
|
controller->Write16(HDAC_CORB_WRITE_POS, 0);
|
||||||
/* Reset CORB read pointer */
|
/* Reset CORB read pointer */
|
||||||
/* NOTE: See HDA011 for corrected procedure! */
|
|
||||||
controller->Write16(HDAC_CORB_READ_POS, CORB_READ_POS_RESET);
|
controller->Write16(HDAC_CORB_READ_POS, CORB_READ_POS_RESET);
|
||||||
do {
|
/* Reading CORB_READ_POS_RESET as zero fails on some chips.
|
||||||
spin(10);
|
We reset the bit here. */
|
||||||
} while ((controller->Read16(HDAC_CORB_READ_POS)
|
|
||||||
& CORB_READ_POS_RESET) == 0);
|
|
||||||
controller->Write16(HDAC_CORB_READ_POS, 0);
|
controller->Write16(HDAC_CORB_READ_POS, 0);
|
||||||
|
|
||||||
/* Reset RIRB write pointer */
|
/* Reset RIRB write pointer */
|
||||||
|
|||||||
Reference in New Issue
Block a user