From 745450ade8a43afb540bae9fd1e17fb3ba0e0842 Mon Sep 17 00:00:00 2001 From: Alexander von Gluck IV Date: Wed, 11 Apr 2012 13:33:58 -0500 Subject: [PATCH] radeon_hd: More initial ring queue work * Rename RenderQueue to RingQueue to be more generic * We will need two Ring Buffer types, one for host -> gpu (render/cp data) and one gpu -> host (irq) * Add header guard to ringqueue.h * Things still may change as I work up to a bigger picture. --- src/add-ons/accelerants/radeon_hd/Jamfile | 4 +-- .../accelerants/radeon_hd/accelerant.cpp | 3 ++ .../accelerants/radeon_hd/accelerant.h | 3 ++ src/add-ons/accelerants/radeon_hd/gpu.cpp | 19 +++++++----- src/add-ons/accelerants/radeon_hd/gpu.h | 2 +- .../{renderqueue.cpp => ringqueue.cpp} | 30 ++++++++++++------- .../radeon_hd/{renderqueue.h => ringqueue.h} | 22 ++++++++++++-- 7 files changed, 59 insertions(+), 24 deletions(-) rename src/add-ons/accelerants/radeon_hd/{renderqueue.cpp => ringqueue.cpp} (77%) rename src/add-ons/accelerants/radeon_hd/{renderqueue.h => ringqueue.h} (59%) diff --git a/src/add-ons/accelerants/radeon_hd/Jamfile b/src/add-ons/accelerants/radeon_hd/Jamfile index d0683c45ce..efab9f9709 100644 --- a/src/add-ons/accelerants/radeon_hd/Jamfile +++ b/src/add-ons/accelerants/radeon_hd/Jamfile @@ -23,6 +23,6 @@ Addon radeon_hd.accelerant : hooks.cpp mode.cpp pll.cpp - renderqueue.cpp - : be libaccelerantscommon.a + ringqueue.cpp + : be libaccelerantscommon.a $(TARGET_LIBSUPC++) ; diff --git a/src/add-ons/accelerants/radeon_hd/accelerant.cpp b/src/add-ons/accelerants/radeon_hd/accelerant.cpp index 7753c6859b..18ece472e4 100644 --- a/src/add-ons/accelerants/radeon_hd/accelerant.cpp +++ b/src/add-ons/accelerants/radeon_hd/accelerant.cpp @@ -297,6 +297,9 @@ radeon_init_accelerant(int device) radeon_gpu_mc_setup(); + // Set up data crunching + irq rings + radeon_gpu_ring_setup(); + TRACE("%s done\n", __func__); return B_OK; } diff --git a/src/add-ons/accelerants/radeon_hd/accelerant.h b/src/add-ons/accelerants/radeon_hd/accelerant.h index fdca834444..5d47ff84d0 100644 --- a/src/add-ons/accelerants/radeon_hd/accelerant.h +++ b/src/add-ons/accelerants/radeon_hd/accelerant.h @@ -19,6 +19,7 @@ #include "mode.h" #include "pll.h" #include "radeon_hd.h" +#include "ringqueue.h" #define MAX_DISPLAY 2 @@ -70,6 +71,8 @@ struct accelerant_info { struct fb_info fb; // used for frame buffer info within MC volatile uint32 dpms_mode; // current driver dpms mode + + RingQueue* ringQueue[RADEON_QUEUE_MAX]; // Ring buffer command processor }; diff --git a/src/add-ons/accelerants/radeon_hd/gpu.cpp b/src/add-ons/accelerants/radeon_hd/gpu.cpp index e1080b364f..d52e4a307c 100644 --- a/src/add-ons/accelerants/radeon_hd/gpu.cpp +++ b/src/add-ons/accelerants/radeon_hd/gpu.cpp @@ -501,19 +501,22 @@ radeon_gpu_mc_setup() status_t -radeon_gpu_irq_setup() +radeon_gpu_ring_setup() { - // TODO: Stub for IRQ setup + TRACE("%s called\n", __func__); - // allocate rings via r600_ih_ring_alloc + // init GFX ring queue + gInfo->ringQueue[RADEON_QUEUE_TYPE_GFX_INDEX] + = new RingQueue(1024 * 1024, RADEON_QUEUE_TYPE_GFX_INDEX); - // disable irq's via r600_disable_interrupts + #if 0 + // init IRQ ring queue (reverse of rendering/cp ring queue) + gInfo->irqRingQueue + = new IRQRingQueue(64 * 1024) + #endif - // r600_rlc_init - // setup interrupt control - - return B_ERROR; + return B_OK; } diff --git a/src/add-ons/accelerants/radeon_hd/gpu.h b/src/add-ons/accelerants/radeon_hd/gpu.h index a9527d572f..c22c35339b 100644 --- a/src/add-ons/accelerants/radeon_hd/gpu.h +++ b/src/add-ons/accelerants/radeon_hd/gpu.h @@ -175,7 +175,7 @@ void radeon_gpu_mc_halt(struct gpu_state *gpuState); void radeon_gpu_mc_resume(struct gpu_state *gpuState); status_t radeon_gpu_mc_idlewait(); status_t radeon_gpu_mc_setup(); -status_t radeon_gpu_irq_setup(); +status_t radeon_gpu_ring_setup(); status_t radeon_gpu_ss_disable(); diff --git a/src/add-ons/accelerants/radeon_hd/renderqueue.cpp b/src/add-ons/accelerants/radeon_hd/ringqueue.cpp similarity index 77% rename from src/add-ons/accelerants/radeon_hd/renderqueue.cpp rename to src/add-ons/accelerants/radeon_hd/ringqueue.cpp index bd1944c07d..03f20f4bb3 100644 --- a/src/add-ons/accelerants/radeon_hd/renderqueue.cpp +++ b/src/add-ons/accelerants/radeon_hd/ringqueue.cpp @@ -7,7 +7,7 @@ */ -#include "renderqueue.h" +#include "ringqueue.h" #include #include @@ -24,6 +24,13 @@ extern "C" void _sPrintf(const char* format, ...); #define ERROR(x...) _sPrintf("radeon_hd: " x) +static const char* queueName[RADEON_QUEUE_MAX] = { + "GFX", + "CP1", + "CP2" +}; + + static int compute_order(unsigned long size) { @@ -36,19 +43,22 @@ compute_order(unsigned long size) } -RenderQueue::RenderQueue(size_t sizeBytes) +RingQueue::RingQueue(size_t sizeBytes, uint32 queueType) : + _queueType(queueType), _readPtr(0), _writePtr(0) { - TRACE("%s: Requested %d bytes for RenderQueue.\n", __func__, sizeBytes); + TRACE("%s: Requested %d bytes for %s RingQueue.\n", __func__, sizeBytes, + queueName[_queueType]); size_t renderQueueSize = compute_order(sizeBytes / 8); _size = (1 << (renderQueueSize + 1)) * 4; _writeBytesAvail = _size; _alignMask = 16 - 1; - TRACE("%s: Allocating %d bytes for RenderQueue.\n", __func__, _size); + TRACE("%s: Allocating %d bytes for %s RingQueue.\n", __func__, _size, + queueName[_queueType]); // Allocate buffer memory _data = (unsigned char*)malloc(_size); @@ -57,17 +67,17 @@ RenderQueue::RenderQueue(size_t sizeBytes) } -RenderQueue::~RenderQueue() +RingQueue::~RingQueue() { - TRACE("%s: Closing RenderQueue.\n", __func__); + TRACE("%s: Closing %s RingQueue.\n", __func__, queueName[_queueType]); free(_data); } status_t -RenderQueue::Empty() +RingQueue::Empty() { - TRACE("%s: Clearing RenderQueue\n", __func__); + TRACE("%s: Clearing %s RingQueue\n", __func__, queueName[_queueType]); // Clear buffer memset(_data, 0, _size); @@ -80,7 +90,7 @@ RenderQueue::Empty() size_t -RenderQueue::Read(unsigned char* dataPtr, size_t bytes) +RingQueue::Read(unsigned char* dataPtr, size_t bytes) { // If there is no data or nothing to read, return 0 bytes if (dataPtr == 0 || bytes <= 0 || _writeBytesAvail == _size) @@ -109,7 +119,7 @@ RenderQueue::Read(unsigned char* dataPtr, size_t bytes) size_t -RenderQueue::Write(unsigned char* dataPtr, size_t bytes) +RingQueue::Write(unsigned char* dataPtr, size_t bytes) { // If there is no data, or no room available, 0 bytes written. if (dataPtr == 0 || bytes <= 0 || _writeBytesAvail == 0) diff --git a/src/add-ons/accelerants/radeon_hd/renderqueue.h b/src/add-ons/accelerants/radeon_hd/ringqueue.h similarity index 59% rename from src/add-ons/accelerants/radeon_hd/renderqueue.h rename to src/add-ons/accelerants/radeon_hd/ringqueue.h index 33324de60c..c9dc9de965 100644 --- a/src/add-ons/accelerants/radeon_hd/renderqueue.h +++ b/src/add-ons/accelerants/radeon_hd/ringqueue.h @@ -5,16 +5,27 @@ * Authors: * Alexander von Gluck, kallisti5@unixzen.com */ +#ifndef _RADEON_HD_RINGQUEUE_H +#define _RADEON_HD_RINGQUEUE_H #include "Accelerant.h" +#define RADEON_QUEUE_MAX 3 +// Basic r100+ graphic data ring +#define RADEON_QUEUE_TYPE_GFX_INDEX 0 +// Cayman+ have two compute command processor rings +#define CAYMAN_QUEUE_TYPE_CP1_INDEX 1 +#define CAYMAN_QUEUE_TYPE_CP2_INDEX 2 + + // A basic ring buffer for passing render data into card. -class RenderQueue { +// Data flows from the host to the GPU +class RingQueue { public: - RenderQueue(size_t bytes); - ~RenderQueue(); + RingQueue(size_t bytes, uint32 queueType); + ~RingQueue(); size_t Read(unsigned char* data, size_t bytes); size_t Write(unsigned char* data, size_t bytes); status_t Empty(); @@ -23,6 +34,8 @@ public: size_t GetWriteAvail() {return _writeBytesAvail;} size_t GetReadAvail() {return _size - _writeBytesAvail;} private: + uint32 _queueType; + unsigned char* _data; size_t _size; size_t _writeBytesAvail; @@ -31,3 +44,6 @@ private: uint32 _alignMask; }; + + +#endif /* _RADEON_HD_RINGQUEUE_H */