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* fix pll limitations probing

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* radeon HD mode setting on analog monitors is now working!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42877 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
2011-10-17 22:49:44 +00:00
parent 86a5585b2d
commit 756fb8b796
1 changed files with 4 additions and 4 deletions
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src/add-ons/accelerants/radeon_hd/pll.cpp
+4 -4
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@@ -69,24 +69,24 @@ pll_limit_probe(pll_info *pll)
} else { } else {
pll->pllOutMin pll->pllOutMin
= B_LENDIAN_TO_HOST_INT32( = B_LENDIAN_TO_HOST_INT32(
firmwareInfo->info_12.ulMinPixelClockPLL_Output); firmwareInfo->info_12.ulMinPixelClockPLL_Output) * 10;
} }
pll->pllOutMax pll->pllOutMax
= B_LENDIAN_TO_HOST_INT32( = B_LENDIAN_TO_HOST_INT32(
firmwareInfo->info.ulMaxPixelClockPLL_Output); firmwareInfo->info.ulMaxPixelClockPLL_Output) * 10;
if (tableMinor >= 4) { if (tableMinor >= 4) {
pll->lcdPllOutMin pll->lcdPllOutMin
= B_LENDIAN_TO_HOST_INT16( = B_LENDIAN_TO_HOST_INT16(
firmwareInfo->info_14.usLcdMinPixelClockPLL_Output) * 100; firmwareInfo->info_14.usLcdMinPixelClockPLL_Output) * 1000;
if (pll->lcdPllOutMin == 0) if (pll->lcdPllOutMin == 0)
pll->lcdPllOutMin = pll->pllOutMin; pll->lcdPllOutMin = pll->pllOutMin;
pll->lcdPllOutMax pll->lcdPllOutMax
= B_LENDIAN_TO_HOST_INT16( = B_LENDIAN_TO_HOST_INT16(
firmwareInfo->info_14.usLcdMaxPixelClockPLL_Output) * 100; firmwareInfo->info_14.usLcdMaxPixelClockPLL_Output) * 1000;
if (pll->lcdPllOutMax == 0) if (pll->lcdPllOutMax == 0)
pll->lcdPllOutMax = pll->pllOutMax; pll->lcdPllOutMax = pll->pllOutMax;