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* whitespace cleanup and some style fixes

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* fixes TODO about using phys_addr_t instead of void*


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37015 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Jérôme Duval
2010-06-04 23:04:09 +00:00
parent 521aff921f
commit 77ba3b5259
4 changed files with 152 additions and 153 deletions
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src/add-ons/kernel/drivers/audio/ac97/auich/auich.c
+111 -111
View File
@@ -2,7 +2,7 @@
* Auich BeOS Driver for Intel Southbridge audio * Auich BeOS Driver for Intel Southbridge audio
* *
* Copyright (c) 2003, Jerome Duval ([email protected]) * Copyright (c) 2003, Jerome Duval ([email protected])
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
@@ -24,7 +24,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
*/ */
#include <KernelExport.h> #include <KernelExport.h>
#include <PCI.h> #include <PCI.h>
#include <driver_settings.h> #include <driver_settings.h>
@@ -71,7 +71,7 @@ auich_settings current_settings = {
#define GET_REG_PICB(x) (IS_SIS7012(x) ? AUICH_REG_X_SR : AUICH_REG_X_PICB) #define GET_REG_PICB(x) (IS_SIS7012(x) ? AUICH_REG_X_SR : AUICH_REG_X_PICB)
#define GET_REG_SR(x) (IS_SIS7012(x) ? AUICH_REG_X_PICB : AUICH_REG_X_SR) #define GET_REG_SR(x) (IS_SIS7012(x) ? AUICH_REG_X_PICB : AUICH_REG_X_SR)
static void static void
dump_hardware_regs(device_config *config) dump_hardware_regs(device_config *config)
{ {
LOG(("GLOB_CNT = %#08x\n", auich_reg_read_32(config, AUICH_REG_GLOB_CNT))); LOG(("GLOB_CNT = %#08x\n", auich_reg_read_32(config, AUICH_REG_GLOB_CNT)));
@@ -125,7 +125,7 @@ static void *
auich_mem_alloc(auich_dev *card, size_t size) auich_mem_alloc(auich_dev *card, size_t size)
{ {
auich_mem *mem; auich_mem *mem;
mem = auich_mem_new(card, size); mem = auich_mem_new(card, size);
if (mem == NULL) if (mem == NULL)
return (NULL); return (NULL);
@@ -140,12 +140,12 @@ static void
auich_mem_free(auich_dev *card, void *ptr) auich_mem_free(auich_dev *card, void *ptr)
{ {
auich_mem *mem; auich_mem *mem;
LIST_FOREACH(mem, &card->mems, next) { LIST_FOREACH(mem, &card->mems, next) {
if (mem->log_base != ptr) if (mem->log_base != ptr)
continue; continue;
LIST_REMOVE(mem, next); LIST_REMOVE(mem, next);
auich_mem_delete(mem); auich_mem_delete(mem);
break; break;
} }
@@ -160,27 +160,27 @@ auich_stream_set_audioparms(auich_stream *stream, uint8 channels,
uint8 sample_size, frame_size; uint8 sample_size, frame_size;
LOG(("auich_stream_set_audioparms\n")); LOG(("auich_stream_set_audioparms\n"));
if ((stream->channels == channels) && if ((stream->channels == channels)
(stream->b16 == b16) && && (stream->b16 == b16)
(stream->sample_rate == sample_rate)) && (stream->sample_rate == sample_rate))
return B_OK; return B_OK;
if (stream->buffer) if (stream->buffer)
auich_mem_free(stream->card, stream->buffer->log_base); auich_mem_free(stream->card, stream->buffer->log_base);
stream->b16 = b16; stream->b16 = b16;
stream->sample_rate = sample_rate; stream->sample_rate = sample_rate;
stream->channels = channels; stream->channels = channels;
sample_size = stream->b16 + 1; sample_size = stream->b16 + 1;
frame_size = sample_size * stream->channels; frame_size = sample_size * stream->channels;
stream->buffer = auich_mem_alloc(stream->card, stream->bufframes * frame_size * stream->bufcount); stream->buffer = auich_mem_alloc(stream->card, stream->bufframes * frame_size * stream->bufcount);
stream->trigblk = 0; /* This shouldn't be needed */ stream->trigblk = 0; /* This shouldn't be needed */
stream->blkmod = stream->bufcount; stream->blkmod = stream->bufcount;
stream->blksize = stream->bufframes * frame_size; stream->blksize = stream->bufframes * frame_size;
return B_OK; return B_OK;
} }
@@ -191,7 +191,7 @@ auich_stream_commit_parms(auich_stream *stream)
uint32 *page; uint32 *page;
uint32 i; uint32 i;
LOG(("auich_stream_commit_parms\n")); LOG(("auich_stream_commit_parms\n"));
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, 0); auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, 0);
snooze(10000); // 10 ms snooze(10000); // 10 ms
@@ -203,29 +203,29 @@ auich_stream_commit_parms(auich_stream *stream)
} }
spin(1); spin(1);
} }
if (i < 0) { if (i < 0) {
LOG(("channel reset failed after 10ms\n")); LOG(("channel reset failed after 10ms\n"));
} }
page = stream->dmaops_log_base; page = stream->dmaops_log_base;
for (i = 0; i < AUICH_DMALIST_MAX; i++) { for (i = 0; i < AUICH_DMALIST_MAX; i++) {
page[2*i] = ((uint32)stream->buffer->phy_base) + page[2*i] = ((uint32)stream->buffer->phy_base)
(i % stream->bufcount) * stream->blksize; + (i % stream->bufcount) * stream->blksize;
page[2*i + 1] = AUICH_DMAF_IOC | (stream->blksize page[2*i + 1] = AUICH_DMAF_IOC | (stream->blksize
/ (IS_SIS7012(&stream->card->config) ? 1 : 2)); / (IS_SIS7012(&stream->card->config) ? 1 : 2));
} }
// set physical buffer descriptor base address // set physical buffer descriptor base address
auich_reg_write_32(&stream->card->config, stream->base + AUICH_REG_X_BDBAR, auich_reg_write_32(&stream->card->config, stream->base + AUICH_REG_X_BDBAR,
(uint32)stream->dmaops_phy_base); (uint32)stream->dmaops_phy_base);
if (stream->use & AUICH_USE_RECORD) if (stream->use & AUICH_USE_RECORD)
auich_codec_write(&stream->card->config, AC97_PCM_L_R_ADC_RATE, (uint16)stream->sample_rate); auich_codec_write(&stream->card->config, AC97_PCM_L_R_ADC_RATE, (uint16)stream->sample_rate);
else else
auich_codec_write(&stream->card->config, AC97_PCM_FRONT_DAC_RATE, (uint16)stream->sample_rate); auich_codec_write(&stream->card->config, AC97_PCM_FRONT_DAC_RATE, (uint16)stream->sample_rate);
if (stream->use & AUICH_USE_RECORD) if (stream->use & AUICH_USE_RECORD)
LOG(("rate : %d\n", auich_codec_read(&stream->card->config, AC97_PCM_L_R_ADC_RATE))); LOG(("rate : %d\n", auich_codec_read(&stream->card->config, AC97_PCM_L_R_ADC_RATE)));
else else
@@ -235,19 +235,19 @@ auich_stream_commit_parms(auich_stream *stream)
status_t status_t
auich_stream_get_nth_buffer(auich_stream *stream, uint8 chan, uint8 buf, auich_stream_get_nth_buffer(auich_stream *stream, uint8 chan, uint8 buf,
char** buffer, size_t *stride) char** buffer, size_t *stride)
{ {
uint8 sample_size, frame_size; uint8 sample_size, frame_size;
LOG(("auich_stream_get_nth_buffer\n")); LOG(("auich_stream_get_nth_buffer\n"));
sample_size = stream->b16 + 1; sample_size = stream->b16 + 1;
frame_size = sample_size * stream->channels; frame_size = sample_size * stream->channels;
*buffer = stream->buffer->log_base + (buf * stream->bufframes * frame_size) *buffer = stream->buffer->log_base + (buf * stream->bufframes * frame_size)
+ chan * sample_size; + chan * sample_size;
*stride = frame_size; *stride = frame_size;
return B_OK; return B_OK;
} }
@@ -266,17 +266,17 @@ auich_stream_start(auich_stream *stream, void (*inth) (void *), void *inthparam)
{ {
int32 civ; int32 civ;
LOG(("auich_stream_start\n")); LOG(("auich_stream_start\n"));
stream->inth = inth; stream->inth = inth;
stream->inthparam = inthparam; stream->inthparam = inthparam;
stream->state |= AUICH_STATE_STARTED; stream->state |= AUICH_STATE_STARTED;
civ = auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CIV); civ = auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CIV);
// step 1: clear status bits // step 1: clear status bits
auich_reg_write_16(&stream->card->config, auich_reg_write_16(&stream->card->config,
stream->base + GET_REG_SR(&stream->card->config), stream->base + GET_REG_SR(&stream->card->config),
auich_reg_read_16(&stream->card->config, stream->base + GET_REG_SR(&stream->card->config))); auich_reg_read_16(&stream->card->config, stream->base + GET_REG_SR(&stream->card->config)));
auich_reg_read_16(&stream->card->config, stream->base + GET_REG_SR(&stream->card->config)); auich_reg_read_16(&stream->card->config, stream->base + GET_REG_SR(&stream->card->config));
// step 2: prepare buffer transfer // step 2: prepare buffer transfer
@@ -285,7 +285,7 @@ auich_stream_start(auich_stream *stream, void (*inth) (void *), void *inthparam)
// step 3: enable interrupts & busmaster transfer // step 3: enable interrupts & busmaster transfer
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, CR_RPBM | CR_LVBIE | CR_FEIE | CR_IOCE); auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, CR_RPBM | CR_LVBIE | CR_FEIE | CR_IOCE);
auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CR); auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CR);
#ifdef DEBUG #ifdef DEBUG
dump_hardware_regs(&stream->card->config); dump_hardware_regs(&stream->card->config);
#endif #endif
@@ -296,10 +296,10 @@ void
auich_stream_halt(auich_stream *stream) auich_stream_halt(auich_stream *stream)
{ {
LOG(("auich_stream_halt\n")); LOG(("auich_stream_halt\n"));
stream->state &= ~AUICH_STATE_STARTED; stream->state &= ~AUICH_STATE_STARTED;
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR,
auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CR) & ~CR_RPBM); auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CR) & ~CR_RPBM);
} }
@@ -328,7 +328,7 @@ auich_stream_new(auich_dev *card, uint8 use, uint32 bufframes, uint8 bufcount)
stream->blksize = 0; stream->blksize = 0;
stream->trigblk = 0; stream->trigblk = 0;
stream->blkmod = 0; stream->blkmod = 0;
if (use & AUICH_USE_PLAY) { if (use & AUICH_USE_PLAY) {
stream->base = AUICH_REG_PO_BASE; stream->base = AUICH_REG_PO_BASE;
stream->sta = STA_POINT; stream->sta = STA_POINT;
@@ -336,26 +336,26 @@ auich_stream_new(auich_dev *card, uint8 use, uint32 bufframes, uint8 bufcount)
stream->base = AUICH_REG_PI_BASE; stream->base = AUICH_REG_PI_BASE;
stream->sta = STA_PIINT; stream->sta = STA_PIINT;
} }
stream->frames_count = 0; stream->frames_count = 0;
stream->real_time = 0; stream->real_time = 0;
stream->buffer_cycle = 0; stream->buffer_cycle = 0;
stream->update_needed = false; stream->update_needed = false;
/* allocate memory for our dma ops */ /* allocate memory for our dma ops */
stream->dmaops_area = alloc_mem(&stream->dmaops_phy_base, &stream->dmaops_log_base, stream->dmaops_area = alloc_mem(&stream->dmaops_phy_base, &stream->dmaops_log_base,
sizeof(auich_dmalist) * AUICH_DMALIST_MAX, "auich dmaops"); sizeof(auich_dmalist) * AUICH_DMALIST_MAX, "auich dmaops");
if (stream->dmaops_area < B_OK) { if (stream->dmaops_area < B_OK) {
PRINT(("couldn't allocate memory\n")); PRINT(("couldn't allocate memory\n"));
free(stream); free(stream);
return NULL; return NULL;
} }
status = lock(); status = lock();
LIST_INSERT_HEAD((&card->streams), stream, next); LIST_INSERT_HEAD((&card->streams), stream, next);
unlock(status); unlock(status);
return stream; return stream;
} }
@@ -366,9 +366,9 @@ auich_stream_delete(auich_stream *stream)
cpu_status status; cpu_status status;
int32 i; int32 i;
LOG(("auich_stream_delete\n")); LOG(("auich_stream_delete\n"));
auich_stream_halt(stream); auich_stream_halt(stream);
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, 0); auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, 0);
snooze(10000); // 10 ms snooze(10000); // 10 ms
@@ -380,29 +380,29 @@ auich_stream_delete(auich_stream *stream)
} }
spin(1); spin(1);
} }
if (i < 0) { if (i < 0) {
LOG(("channel reset failed after 10ms\n")); LOG(("channel reset failed after 10ms\n"));
} }
auich_reg_write_32(&stream->card->config, stream->base + AUICH_REG_X_BDBAR, 0); auich_reg_write_32(&stream->card->config, stream->base + AUICH_REG_X_BDBAR, 0);
if (stream->dmaops_area > B_OK) if (stream->dmaops_area > B_OK)
delete_area(stream->dmaops_area); delete_area(stream->dmaops_area);
if (stream->buffer) if (stream->buffer)
auich_mem_free(stream->card, stream->buffer->log_base); auich_mem_free(stream->card, stream->buffer->log_base);
status = lock(); status = lock();
LIST_REMOVE(stream, next); LIST_REMOVE(stream, next);
unlock(status); unlock(status);
free(stream); free(stream);
} }
/* auich interrupt */ /* auich interrupt */
int32 int32
auich_int(void *arg) auich_int(void *arg)
{ {
auich_dev *card = arg; auich_dev *card = arg;
@@ -411,9 +411,9 @@ auich_int(void *arg)
auich_stream *stream = NULL; auich_stream *stream = NULL;
uint32 sta; uint32 sta;
uint16 sr; uint16 sr;
// TRACE(("auich_int(%p)\n", card)); // TRACE(("auich_int(%p)\n", card));
sta = auich_reg_read_32(&card->config, AUICH_REG_GLOB_STA) & STA_INTMASK; sta = auich_reg_read_32(&card->config, AUICH_REG_GLOB_STA) & STA_INTMASK;
if (sta & (STA_S0RI | STA_S1RI | STA_S2RI)) { if (sta & (STA_S0RI | STA_S1RI | STA_S2RI)) {
// ignore and clear resume interrupt(s) // ignore and clear resume interrupt(s)
@@ -422,41 +422,41 @@ auich_int(void *arg)
gotone = true; gotone = true;
sta &= ~(STA_S0RI | STA_S1RI | STA_S2RI); sta &= ~(STA_S0RI | STA_S1RI | STA_S2RI);
} }
if (sta & card->interrupt_mask) { if (sta & card->interrupt_mask) {
//TRACE(("interrupt !! %x\n", sta)); //TRACE(("interrupt !! %x\n", sta));
LIST_FOREACH(stream, &card->streams, next) LIST_FOREACH(stream, &card->streams, next)
if (sta & stream->sta) { if (sta & stream->sta) {
sr = auich_reg_read_16(&card->config, sr = auich_reg_read_16(&card->config,
stream->base + GET_REG_SR(&stream->card->config)); stream->base + GET_REG_SR(&stream->card->config));
sr &= SR_MASK; sr &= SR_MASK;
if (!sr) if (!sr)
continue; continue;
gotone = true; gotone = true;
if (sr & SR_BCIS) { if (sr & SR_BCIS) {
curblk = auich_stream_curaddr(stream); curblk = auich_stream_curaddr(stream);
auich_reg_write_8(&card->config, stream->base + AUICH_REG_X_LVI, auich_reg_write_8(&card->config, stream->base + AUICH_REG_X_LVI,
(curblk + 2) % AUICH_DMALIST_MAX); (curblk + 2) % AUICH_DMALIST_MAX);
stream->trigblk = (curblk) % stream->blkmod; stream->trigblk = (curblk) % stream->blkmod;
if (stream->inth) if (stream->inth)
stream->inth(stream->inthparam); stream->inth(stream->inthparam);
} else { } else {
TRACE(("interrupt !! sta %x, sr %x\n", sta, sr)); TRACE(("interrupt !! sta %x, sr %x\n", sta, sr));
} }
auich_reg_write_16(&card->config, auich_reg_write_16(&card->config,
stream->base + GET_REG_SR(&stream->card->config), sr); stream->base + GET_REG_SR(&stream->card->config), sr);
auich_reg_write_32(&card->config, AUICH_REG_GLOB_STA, stream->sta); auich_reg_write_32(&card->config, AUICH_REG_GLOB_STA, stream->sta);
sta &= ~stream->sta; sta &= ~stream->sta;
} }
if (sta != 0) { if (sta != 0) {
dprintf("global status not fully handled %lx!\n", sta); dprintf("global status not fully handled %lx!\n", sta);
auich_reg_write_32(&card->config, AUICH_REG_GLOB_STA, sta); auich_reg_write_32(&card->config, AUICH_REG_GLOB_STA, sta);
@@ -464,7 +464,7 @@ auich_int(void *arg)
} else if (sta != 0) { } else if (sta != 0) {
dprintf("interrupt masked %lx, sta %lx\n", card->interrupt_mask, sta); dprintf("interrupt masked %lx, sta %lx\n", card->interrupt_mask, sta);
} }
if (gotone) if (gotone)
return B_INVOKE_SCHEDULER; return B_INVOKE_SCHEDULER;
@@ -489,20 +489,20 @@ auich_int_thread(void *data)
/* auich driver functions */ /* auich driver functions */
static status_t static status_t
map_io_memory(device_config *config) map_io_memory(device_config *config)
{ {
if ((config->type & TYPE_ICH4) == 0) if ((config->type & TYPE_ICH4) == 0)
return B_OK; return B_OK;
config->area_mmbar = map_mem(&config->log_mmbar, (void *)config->mmbar, ICH4_MMBAR_SIZE, "auich mmbar io"); config->area_mmbar = map_mem(&config->log_mmbar, config->mmbar, ICH4_MMBAR_SIZE, "auich mmbar io");
if (config->area_mmbar <= B_OK) { if (config->area_mmbar <= B_OK) {
LOG(("mapping of mmbar io failed, error = %#x\n",config->area_mmbar)); LOG(("mapping of mmbar io failed, error = %#x\n",config->area_mmbar));
return B_ERROR; return B_ERROR;
} }
LOG(("mapping of mmbar: area %#x, phys %#x, log %#x\n", config->area_mmbar, config->mmbar, config->log_mmbar)); LOG(("mapping of mmbar: area %#x, phys %#x, log %#x\n", config->area_mmbar, config->mmbar, config->log_mmbar));
config->area_mbbar = map_mem(&config->log_mbbar, (void *)config->mbbar, ICH4_MBBAR_SIZE, "auich mbbar io"); config->area_mbbar = map_mem(&config->log_mbbar, config->mbbar, ICH4_MBBAR_SIZE, "auich mbbar io");
if (config->area_mbbar <= B_OK) { if (config->area_mbbar <= B_OK) {
LOG(("mapping of mbbar io failed, error = %#x\n",config->area_mbbar)); LOG(("mapping of mbbar io failed, error = %#x\n",config->area_mbbar));
delete_area(config->area_mmbar); delete_area(config->area_mmbar);
@@ -515,7 +515,7 @@ map_io_memory(device_config *config)
} }
static status_t static status_t
unmap_io_memory(device_config *config) unmap_io_memory(device_config *config)
{ {
status_t rv; status_t rv;
@@ -527,13 +527,13 @@ unmap_io_memory(device_config *config)
} }
/* detect presence of our hardware */ /* detect presence of our hardware */
status_t status_t
init_hardware(void) init_hardware(void)
{ {
int ix=0; int ix=0;
pci_info info; pci_info info;
status_t err = ENODEV; status_t err = ENODEV;
LOG_CREATE(); LOG_CREATE();
PRINT(("init_hardware()\n")); PRINT(("init_hardware()\n"));
@@ -566,7 +566,7 @@ init_hardware(void)
|| info.device_id == NVIDIA_CK804_AC97_DEVICE_ID || info.device_id == NVIDIA_CK804_AC97_DEVICE_ID
|| info.device_id == NVIDIA_MCP51_AC97_DEVICE_ID || info.device_id == NVIDIA_MCP51_AC97_DEVICE_ID
|| info.device_id == NVIDIA_MCP04_AC97_DEVICE_ID || info.device_id == NVIDIA_MCP04_AC97_DEVICE_ID
)) ))
|| (info.vendor_id == AMD_VENDOR_ID && || (info.vendor_id == AMD_VENDOR_ID &&
(info.device_id == AMD_AMD8111_AC97_DEVICE_ID (info.device_id == AMD_AMD8111_AC97_DEVICE_ID
|| info.device_id == AMD_AMD768_AC97_DEVICE_ID || info.device_id == AMD_AMD768_AC97_DEVICE_ID
@@ -577,7 +577,7 @@ init_hardware(void)
} }
ix++; ix++;
} }
put_module(B_PCI_MODULE_NAME); put_module(B_PCI_MODULE_NAME);
return err; return err;
@@ -598,14 +598,14 @@ make_device_names(
status_t status_t
auich_init(auich_dev * card) auich_init(auich_dev * card)
{ {
card->interrupt_mask = STA_PIINT | STA_POINT; //STA_INTMASK; card->interrupt_mask = STA_PIINT | STA_POINT; //STA_INTMASK;
/* Init streams list */ /* Init streams list */
LIST_INIT(&(card->streams)); LIST_INIT(&(card->streams));
/* Init mems list */ /* Init mems list */
LIST_INIT(&(card->mems)); LIST_INIT(&(card->mems));
return B_OK; return B_OK;
} }
@@ -621,7 +621,7 @@ auich_setup(auich_dev * card)
PRINT(("auich_setup(%p)\n", card)); PRINT(("auich_setup(%p)\n", card));
make_device_names(card); make_device_names(card);
card->config.subvendor_id = card->info.u.h0.subsystem_vendor_id; card->config.subvendor_id = card->info.u.h0.subsystem_vendor_id;
card->config.subsystem_id = card->info.u.h0.subsystem_id; card->config.subsystem_id = card->info.u.h0.subsystem_id;
card->config.nabmbar = card->info.u.h0.base_registers[0]; card->config.nabmbar = card->info.u.h0.base_registers[0];
@@ -635,7 +635,7 @@ auich_setup(auich_dev * card)
card->config.type |= TYPE_ICH4; card->config.type |= TYPE_ICH4;
if (card->info.device_id == SIS_SI7012_AC97_DEVICE_ID) if (card->info.device_id == SIS_SI7012_AC97_DEVICE_ID)
card->config.type |= TYPE_SIS7012; card->config.type |= TYPE_SIS7012;
PRINT(("%s deviceid = %#04x chiprev = %x model = %x enhanced at %lx\n", card->name, card->info.device_id, PRINT(("%s deviceid = %#04x chiprev = %x model = %x enhanced at %lx\n", card->name, card->info.device_id,
card->info.revision, card->info.u.h0.subsystem_id, card->config.nabmbar)); card->info.revision, card->info.u.h0.subsystem_id, card->config.nabmbar));
@@ -655,7 +655,7 @@ auich_setup(auich_dev * card)
PRINT(("mapping of memory IO space failed\n")); PRINT(("mapping of memory IO space failed\n"));
return B_ERROR; return B_ERROR;
} }
cmd = (*pci->read_pci_config)(card->info.bus, card->info.device, card->info.function, PCI_command, 2); cmd = (*pci->read_pci_config)(card->info.bus, card->info.device, card->info.function, PCI_command, 2);
PRINT(("PCI command before: %x\n", cmd)); PRINT(("PCI command before: %x\n", cmd));
if (IS_ICH4(&card->config)) { if (IS_ICH4(&card->config)) {
@@ -665,7 +665,7 @@ auich_setup(auich_dev * card)
} }
cmd = (*pci->read_pci_config)(card->info.bus, card->info.device, card->info.function, PCI_command, 2); cmd = (*pci->read_pci_config)(card->info.bus, card->info.device, card->info.function, PCI_command, 2);
PRINT(("PCI command after: %x\n", cmd)); PRINT(("PCI command after: %x\n", cmd));
/* do a cold reset */ /* do a cold reset */
LOG(("cold reset\n")); LOG(("cold reset\n"));
auich_reg_write_32(&card->config, AUICH_REG_GLOB_CNT, 0); auich_reg_write_32(&card->config, AUICH_REG_GLOB_CNT, 0);
@@ -676,25 +676,25 @@ auich_setup(auich_dev * card)
if ((rv & CNT_COLD) == 0) { if ((rv & CNT_COLD) == 0) {
LOG(("cold reset failed\n")); LOG(("cold reset failed\n"));
} }
for (i = 0; i < 500; i++) { for (i = 0; i < 500; i++) {
rv = auich_reg_read_32(&card->config, AUICH_REG_GLOB_STA); rv = auich_reg_read_32(&card->config, AUICH_REG_GLOB_STA);
if (rv & STA_S0CR) if (rv & STA_S0CR)
break; break;
snooze(1000); snooze(1000);
} }
if (!(rv & STA_S0CR)) { /* reset failure */ if (!(rv & STA_S0CR)) { /* reset failure */
/* It never return STA_S0CR in some cases */ /* It never return STA_S0CR in some cases */
PRINT(("reset failure\n")); PRINT(("reset failure\n"));
} }
/* attach the codec */ /* attach the codec */
PRINT(("codec attach\n")); PRINT(("codec attach\n"));
ac97_attach(&card->config.ac97, (codec_reg_read)auich_codec_read, ac97_attach(&card->config.ac97, (codec_reg_read)auich_codec_read,
(codec_reg_write)auich_codec_write, &card->config, (codec_reg_write)auich_codec_write, &card->config,
card->config.subvendor_id, card->config.subsystem_id); card->config.subvendor_id, card->config.subsystem_id);
/* Print capabilities though there are no supports for now */ /* Print capabilities though there are no supports for now */
if ((rv & STA_SAMPLE_CAP) == STA_POM20) { if ((rv & STA_SAMPLE_CAP) == STA_POM20) {
LOG(("20 bit precision support\n")); LOG(("20 bit precision support\n"));
@@ -707,7 +707,7 @@ auich_setup(auich_dev * card)
} }
if (current_settings.use_thread) { if (current_settings.use_thread) {
int_thread_id = spawn_kernel_thread(auich_int_thread, int_thread_id = spawn_kernel_thread(auich_int_thread,
"auich interrupt poller", B_REAL_TIME_PRIORITY, card); "auich interrupt poller", B_REAL_TIME_PRIORITY, card);
resume_thread(int_thread_id); resume_thread(int_thread_id);
} else { } else {
@@ -721,10 +721,10 @@ auich_setup(auich_dev * card)
return err; return err;
} }
} }
if ((err = auich_init(card)) != B_OK) if ((err = auich_init(card)) != B_OK)
return err; return err;
PRINT(("init_driver done\n")); PRINT(("init_driver done\n"));
return err; return err;
@@ -739,7 +739,7 @@ init_driver(void)
pci_info info; pci_info info;
status_t err; status_t err;
num_cards = 0; num_cards = 0;
PRINT(("init_driver()\n")); PRINT(("init_driver()\n"));
// get driver settings // get driver settings
@@ -751,10 +751,10 @@ init_driver(void)
if (get_module(B_PCI_MODULE_NAME, (module_info **) &pci)) if (get_module(B_PCI_MODULE_NAME, (module_info **) &pci))
return ENOSYS; return ENOSYS;
while ((*pci->get_nth_pci_info)(ix++, &info) == B_OK) { while ((*pci->get_nth_pci_info)(ix++, &info) == B_OK) {
if ((info.vendor_id == INTEL_VENDOR_ID && if ((info.vendor_id == INTEL_VENDOR_ID
(info.device_id == INTEL_82443MX_AC97_DEVICE_ID && (info.device_id == INTEL_82443MX_AC97_DEVICE_ID
|| info.device_id == INTEL_82801AA_AC97_DEVICE_ID || info.device_id == INTEL_82801AA_AC97_DEVICE_ID
|| info.device_id == INTEL_82801AB_AC97_DEVICE_ID || info.device_id == INTEL_82801AB_AC97_DEVICE_ID
|| info.device_id == INTEL_82801BA_AC97_DEVICE_ID || info.device_id == INTEL_82801BA_AC97_DEVICE_ID
@@ -765,11 +765,11 @@ init_driver(void)
|| info.device_id == INTEL_82801GB_AC97_DEVICE_ID || info.device_id == INTEL_82801GB_AC97_DEVICE_ID
|| info.device_id == INTEL_6300ESB_AC97_DEVICE_ID || info.device_id == INTEL_6300ESB_AC97_DEVICE_ID
)) ))
|| (info.vendor_id == SIS_VENDOR_ID && || (info.vendor_id == SIS_VENDOR_ID
(info.device_id == SIS_SI7012_AC97_DEVICE_ID && (info.device_id == SIS_SI7012_AC97_DEVICE_ID
)) ))
|| (info.vendor_id == NVIDIA_VENDOR_ID && || (info.vendor_id == NVIDIA_VENDOR_ID
(info.device_id == NVIDIA_nForce_AC97_DEVICE_ID && (info.device_id == NVIDIA_nForce_AC97_DEVICE_ID
|| info.device_id == NVIDIA_nForce2_AC97_DEVICE_ID || info.device_id == NVIDIA_nForce2_AC97_DEVICE_ID
|| info.device_id == NVIDIA_nForce2_400_AC97_DEVICE_ID || info.device_id == NVIDIA_nForce2_400_AC97_DEVICE_ID
|| info.device_id == NVIDIA_nForce3_AC97_DEVICE_ID || info.device_id == NVIDIA_nForce3_AC97_DEVICE_ID
@@ -777,9 +777,9 @@ init_driver(void)
|| info.device_id == NVIDIA_CK804_AC97_DEVICE_ID || info.device_id == NVIDIA_CK804_AC97_DEVICE_ID
|| info.device_id == NVIDIA_MCP51_AC97_DEVICE_ID || info.device_id == NVIDIA_MCP51_AC97_DEVICE_ID
|| info.device_id == NVIDIA_MCP04_AC97_DEVICE_ID || info.device_id == NVIDIA_MCP04_AC97_DEVICE_ID
)) ))
|| (info.vendor_id == AMD_VENDOR_ID && || (info.vendor_id == AMD_VENDOR_ID
(info.device_id == AMD_AMD8111_AC97_DEVICE_ID && (info.device_id == AMD_AMD8111_AC97_DEVICE_ID
|| info.device_id == AMD_AMD768_AC97_DEVICE_ID || info.device_id == AMD_AMD768_AC97_DEVICE_ID
)) ))
) { ) {
@@ -817,7 +817,7 @@ init_driver(void)
return ENODEV; return ENODEV;
} }
#if DEBUG #if DEBUG
//add_debugger_command("auich", auich_debug, "auich [card# (1-n)]"); //add_debugger_command("auich", auich_debug, "auich [card# (1-n)]");
#endif #endif
@@ -830,16 +830,16 @@ auich_shutdown(auich_dev *card)
{ {
PRINT(("shutdown(%p)\n", card)); PRINT(("shutdown(%p)\n", card));
ac97_detach(card->config.ac97); ac97_detach(card->config.ac97);
card->interrupt_mask = 0; card->interrupt_mask = 0;
if (current_settings.use_thread) { if (current_settings.use_thread) {
status_t exit_value; status_t exit_value;
int_thread_exit = true; int_thread_exit = true;
wait_for_thread(int_thread_id, &exit_value); wait_for_thread(int_thread_id, &exit_value);
} else } else
remove_io_interrupt_handler(card->config.irq, auich_int, card); remove_io_interrupt_handler(card->config.irq, auich_int, card);
unmap_io_memory(&card->config); unmap_io_memory(&card->config);
} }
src/add-ons/kernel/drivers/audio/ac97/auich/auich.h
+22 -22
View File
@@ -24,7 +24,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _DEV_PCI_AUICH_H_ #ifndef _DEV_PCI_AUICH_H_
#define _DEV_PCI_AUICH_H_ #define _DEV_PCI_AUICH_H_
@@ -39,7 +39,7 @@
#include "multi.h" #include "multi.h"
#define INTEL_VENDOR_ID 0x8086 /* Intel */ #define INTEL_VENDOR_ID 0x8086 /* Intel */
#define INTEL_82443MX_AC97_DEVICE_ID 0x7195 #define INTEL_82443MX_AC97_DEVICE_ID 0x7195
#define INTEL_82801AA_AC97_DEVICE_ID 0x2415 #define INTEL_82801AA_AC97_DEVICE_ID 0x2415
#define INTEL_82801AB_AC97_DEVICE_ID 0x2425 #define INTEL_82801AB_AC97_DEVICE_ID 0x2425
#define INTEL_82801BA_AC97_DEVICE_ID 0x2445 #define INTEL_82801BA_AC97_DEVICE_ID 0x2445
@@ -64,7 +64,7 @@
#define AMD_AMD8111_AC97_DEVICE_ID 0x764d #define AMD_AMD8111_AC97_DEVICE_ID 0x764d
#define AMD_AMD768_AC97_DEVICE_ID 0x7445 #define AMD_AMD768_AC97_DEVICE_ID 0x7445
#define VERSION "Version alpha 1, Copyright (c) 2003 Jérôme Duval, compiled on " ## __DATE__ ## " " ## __TIME__ #define VERSION "Version alpha 1, Copyright (c) 2003 Jérôme Duval, compiled on " ## __DATE__ ## " " ## __TIME__
#define DRIVER_NAME "auich" #define DRIVER_NAME "auich"
#define FRIENDLY_NAME "Auich" #define FRIENDLY_NAME "Auich"
#define AUTHOR "Jérôme Duval" #define AUTHOR "Jérôme Duval"
@@ -93,7 +93,7 @@ typedef struct _auich_dmalist {
typedef struct _auich_mem { typedef struct _auich_mem {
LIST_ENTRY(_auich_mem) next; LIST_ENTRY(_auich_mem) next;
void *log_base; void *log_base;
void *phy_base; phys_addr_t phy_base;
area_id area; area_id area;
size_t size; size_t size;
} auich_mem; } auich_mem;
@@ -101,7 +101,7 @@ typedef struct _auich_mem {
/* /*
* Streams * Streams
*/ */
typedef struct _auich_stream { typedef struct _auich_stream {
struct _auich_dev *card; struct _auich_dev *card;
uint8 use; uint8 use;
@@ -111,25 +111,25 @@ typedef struct _auich_stream {
uint8 channels; uint8 channels;
uint32 bufframes; uint32 bufframes;
uint8 bufcount; uint8 bufcount;
uint32 base; uint32 base;
LIST_ENTRY(_auich_stream) next; LIST_ENTRY(_auich_stream) next;
void (*inth) (void *); void (*inth) (void *);
void *inthparam; void *inthparam;
void *dmaops_log_base; void *dmaops_log_base;
void *dmaops_phy_base; phys_addr_t dmaops_phy_base;
area_id dmaops_area; area_id dmaops_area;
auich_mem *buffer; auich_mem *buffer;
uint16 blksize; /* in samples */ uint16 blksize; /* in samples */
uint16 trigblk; /* blk on which to trigger inth */ uint16 trigblk; /* blk on which to trigger inth */
uint16 blkmod; /* Modulo value to wrap trigblk */ uint16 blkmod; /* Modulo value to wrap trigblk */
uint16 sta; /* GLOB_STA int bit */ uint16 sta; /* GLOB_STA int bit */
/* multi_audio */ /* multi_audio */
volatile int64 frames_count; // for play or record volatile int64 frames_count; // for play or record
volatile bigtime_t real_time; // for play or record volatile bigtime_t real_time; // for play or record
@@ -146,22 +146,22 @@ typedef struct _auich_dev {
char name[DEVNAME]; /* used for resources */ char name[DEVNAME]; /* used for resources */
pci_info info; pci_info info;
device_config config; device_config config;
void *ptb_log_base; void *ptb_log_base;
void *ptb_phy_base; void *ptb_phy_base;
area_id ptb_area; area_id ptb_area;
sem_id buffer_ready_sem; sem_id buffer_ready_sem;
uint32 interrupt_mask; uint32 interrupt_mask;
LIST_HEAD(, _auich_stream) streams; LIST_HEAD(, _auich_stream) streams;
LIST_HEAD(, _auich_mem) mems; LIST_HEAD(, _auich_mem) mems;
auich_stream *pstream; auich_stream *pstream;
auich_stream *rstream; auich_stream *rstream;
/* multi_audio */ /* multi_audio */
multi_dev multi; multi_dev multi;
} auich_dev; } auich_dev;
@@ -184,7 +184,7 @@ extern auich_dev cards[NUM_CARDS];
status_t auich_stream_set_audioparms(auich_stream *stream, uint8 channels, status_t auich_stream_set_audioparms(auich_stream *stream, uint8 channels,
uint8 b16, uint32 sample_rate); uint8 b16, uint32 sample_rate);
status_t auich_stream_commit_parms(auich_stream *stream); status_t auich_stream_commit_parms(auich_stream *stream);
status_t auich_stream_get_nth_buffer(auich_stream *stream, uint8 chan, uint8 buf, status_t auich_stream_get_nth_buffer(auich_stream *stream, uint8 chan, uint8 buf,
char** buffer, size_t *stride); char** buffer, size_t *stride);
void auich_stream_start(auich_stream *stream, void (*inth) (void *), void *inthparam); void auich_stream_start(auich_stream *stream, void (*inth) (void *), void *inthparam);
void auich_stream_halt(auich_stream *stream); void auich_stream_halt(auich_stream *stream);
src/add-ons/kernel/drivers/audio/ac97/auich/util.c
+5 -6
View File
@@ -64,9 +64,8 @@ round_to_pagesize(uint32 size)
area_id area_id
alloc_mem(void **phy, void **log, size_t size, const char *name) alloc_mem(phys_addr_t *phy, void **log, size_t size, const char *name)
{ {
// TODO: phy should be phys_addr_t*!
physical_entry pe; physical_entry pe;
void * logadr; void * logadr;
area_id area; area_id area;
@@ -91,7 +90,7 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
if (log) if (log)
*log = logadr; *log = logadr;
if (phy) if (phy)
*phy = (void*)(addr_t)pe.address; *phy = pe.address;
LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n", area, size, logadr, LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n", area, size, logadr,
pe.address)); pe.address));
return area; return area;
@@ -99,10 +98,10 @@ alloc_mem(void **phy, void **log, size_t size, const char *name)
area_id area_id
map_mem(void **log, void *phy, size_t size, const char *name) map_mem(void **log, phys_addr_t phy, size_t size, const char *name)
{ {
uint32 offset; uint32 offset;
void *phyadr; phys_addr_t phyadr;
void *mapadr; void *mapadr;
area_id area; area_id area;
@@ -111,7 +110,7 @@ map_mem(void **log, void *phy, size_t size, const char *name)
offset = (uint32)phy & (B_PAGE_SIZE - 1); offset = (uint32)phy & (B_PAGE_SIZE - 1);
phyadr = phy - offset; phyadr = phy - offset;
size = round_to_pagesize(size + offset); size = round_to_pagesize(size + offset);
area = map_physical_memory(name, (addr_t)phyadr, size, B_ANY_KERNEL_ADDRESS, area = map_physical_memory(name, phyadr, size, B_ANY_KERNEL_ADDRESS,
0, &mapadr); 0, &mapadr);
*log = mapadr + offset; *log = mapadr + offset;
src/add-ons/kernel/drivers/audio/ac97/auich/util.h
+14 -14
View File
@@ -4,24 +4,24 @@
* Copyright (c) 2002, Marcus Overhagen <[email protected]> * Copyright (c) 2002, Marcus Overhagen <[email protected]>
* *
* All rights reserved. * All rights reserved.
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* *
* - Redistributions of source code must retain the above copyright notice, * - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice, * - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
*/ */
@@ -30,8 +30,8 @@
#include <KernelExport.h> #include <KernelExport.h>
area_id alloc_mem(void **phy, void **log, size_t size, const char *name); area_id alloc_mem(phys_addr_t *phy, void **log, size_t size, const char *name);
area_id map_mem(void **log, void *phy, size_t size, const char *name); area_id map_mem(void **log, phys_addr_t phy, size_t size, const char *name);
cpu_status lock(void); cpu_status lock(void);
void unlock(cpu_status status); void unlock(cpu_status status);