diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/Jamfile b/src/add-ons/kernel/drivers/network/ether/ipro1000/Jamfile index 6c5c38e1f2..89568eaebf 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/Jamfile +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/Jamfile @@ -21,6 +21,7 @@ KernelAddon ipro1000 : e1000_82571.c e1000_82575.c e1000_api.c + e1000_base.c e1000_i210.c e1000_ich8lan.c e1000_mac.c diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/LICENSE b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/LICENSE index f70a7cbd4a..51a32a8196 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/LICENSE +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/LICENSE @@ -1,31 +1,30 @@ $FreeBSD$ - Copyright (c) 2001-2010, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.c index 5c0220adfc..ac35b4eabf 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -219,14 +219,14 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw) /* Set rar entry count */ mac->rar_entry_count = E1000_RAR_ENTRIES; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; /* ARC supported; valid only if manageability features are enabled. */ mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK); /* Adaptive IFS not supported */ - mac->adaptive_ifs = FALSE; + mac->adaptive_ifs = false; /* Function pointers */ @@ -891,8 +891,8 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) reg_data &= ~0x00100000; E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data); - /* default to TRUE to enable the MDIC W/A */ - hw->dev_spec._80003es2lan.mdic_wa_enable = TRUE; + /* default to true to enable the MDIC W/A */ + hw->dev_spec._80003es2lan.mdic_wa_enable = true; ret_val = e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_OFFSET >> @@ -900,7 +900,7 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) if (!ret_val) { if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) == E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO) - hw->dev_spec._80003es2lan.mdic_wa_enable = FALSE; + hw->dev_spec._80003es2lan.mdic_wa_enable = false; } /* Clear all of the statistics registers (clear on read). It is @@ -1168,7 +1168,6 @@ static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw) /** * e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up * @hw: pointer to the HW structure - * @duplex: current duplex setting * * Configure the KMRN interface by applying last minute quirks for * 10/100 operation. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.h index cbf0eafa94..9e6de14757 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_80003es2lan.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82540.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82540.c index adc944a8eb..e60fc8ebf0 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82540.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82540.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -100,7 +100,7 @@ static s32 e1000_init_phy_params_82540(struct e1000_hw *hw) case e1000_82546_rev_3: if (phy->id == M88E1011_I_PHY_ID) break; - /* Fall Through */ + /* FALLTHROUGH */ default: ret_val = -E1000_ERR_PHY; goto out; diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.c index ead974cb13..7bb2e8ea94 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -230,7 +230,7 @@ static s32 e1000_init_mac_params_82541(struct e1000_hw *hw) /* Set rar entry count */ mac->rar_entry_count = E1000_RAR_ENTRIES; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* Function Pointers */ @@ -611,11 +611,11 @@ static s32 e1000_check_for_link_82541(struct e1000_hw *hw) goto out; if (!link) { - ret_val = e1000_config_dsp_after_link_change_82541(hw, FALSE); + ret_val = e1000_config_dsp_after_link_change_82541(hw, false); goto out; /* No link detected */ } - mac->get_link_status = FALSE; + mac->get_link_status = false; /* * Check if there was DownShift, must be checked @@ -632,7 +632,7 @@ static s32 e1000_check_for_link_82541(struct e1000_hw *hw) goto out; } - ret_val = e1000_config_dsp_after_link_change_82541(hw, TRUE); + ret_val = e1000_config_dsp_after_link_change_82541(hw, true); /* * Auto-Neg is enabled. Auto Speed Detection takes care @@ -937,7 +937,7 @@ out: * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D3 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D3 + * and SmartSpeed is disabled when active is true, else clear lplu for D3 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.h index ce29548a4d..d31065d9a1 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82541.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82542.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82542.c index 09906699ab..2fdf706686 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82542.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82542.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.c index e247b01f6c..9a93090c2d 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -256,7 +256,7 @@ static s32 e1000_init_mac_params_82543(struct e1000_hw *hw) /* Set tbi compatibility */ if ((hw->mac.type != e1000_82543) || (hw->phy.media_type == e1000_media_type_fiber)) - e1000_set_tbi_compatibility_82543(hw, FALSE); + e1000_set_tbi_compatibility_82543(hw, false); return E1000_SUCCESS; } @@ -286,7 +286,7 @@ void e1000_init_function_pointers_82543(struct e1000_hw *hw) static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw) { struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; - bool state = FALSE; + bool state = false; DEBUGFUNC("e1000_tbi_compatibility_enabled_82543"); @@ -338,7 +338,7 @@ out: bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw) { struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; - bool state = FALSE; + bool state = false; DEBUGFUNC("e1000_tbi_sbp_enabled_82543"); @@ -379,7 +379,7 @@ static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state) * @hw: pointer to the HW structure * * Returns the current status of whether PHY initialization is disabled. - * True if PHY initialization is disabled else FALSE. + * True if PHY initialization is disabled else false. **/ static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw) { @@ -389,7 +389,7 @@ static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw) DEBUGFUNC("e1000_init_phy_disabled_82543"); if (hw->mac.type != e1000_82543) { - ret_val = FALSE; + ret_val = false; goto out; } @@ -913,7 +913,7 @@ static s32 e1000_reset_hw_82543(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); E1000_WRITE_FLUSH(hw); - e1000_set_tbi_sbp_82543(hw, FALSE); + e1000_set_tbi_sbp_82543(hw, false); /* * Delay to allow any outstanding PCI transactions to complete before @@ -1062,7 +1062,7 @@ static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw) { u32 ctrl; s32 ret_val; - bool link; + bool link = true; DEBUGFUNC("e1000_setup_copper_link_82543"); @@ -1217,7 +1217,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw) if (!link) goto out; /* No link detected */ - mac->get_link_status = FALSE; + mac->get_link_status = false; e1000_check_downshift_generic(hw); @@ -1299,7 +1299,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw) * If we previously were in the mode, * turn it off. */ - e1000_set_tbi_sbp_82543(hw, FALSE); + e1000_set_tbi_sbp_82543(hw, false); rctl = E1000_READ_REG(hw, E1000_RCTL); rctl &= ~E1000_RCTL_SBP; E1000_WRITE_REG(hw, E1000_RCTL, rctl); @@ -1313,7 +1313,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw) * will look like CRC errors to the hardware. */ if (!e1000_tbi_sbp_enabled_82543(hw)) { - e1000_set_tbi_sbp_82543(hw, TRUE); + e1000_set_tbi_sbp_82543(hw, true); rctl = E1000_READ_REG(hw, E1000_RCTL); rctl |= E1000_RCTL_SBP; E1000_WRITE_REG(hw, E1000_RCTL, rctl); @@ -1356,7 +1356,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw) (!(status & E1000_STATUS_LU)) && (!(rxcw & E1000_RXCW_C))) { if (!mac->autoneg_failed) { - mac->autoneg_failed = TRUE; + mac->autoneg_failed = true; ret_val = 0; goto out; } @@ -1387,7 +1387,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } out: diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.h index 98289524f6..27f8507fb6 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82543.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.c index 348a3daa3c..ce9ae87916 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -238,7 +238,7 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_EECD, eecd); break; } - /* Fall Through */ + /* FALLTHROUGH */ default: nvm->type = e1000_nvm_eeprom_spi; size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >> @@ -285,7 +285,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) struct e1000_mac_info *mac = &hw->mac; u32 swsm = 0; u32 swsm2 = 0; - bool force_clear_smbi = FALSE; + bool force_clear_smbi = false; DEBUGFUNC("e1000_init_mac_params_82571"); @@ -327,9 +327,9 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) /* Set rar entry count */ mac->rar_entry_count = E1000_RAR_ENTRIES; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* Adaptive IFS supported */ - mac->adaptive_ifs = TRUE; + mac->adaptive_ifs = true; /* Function pointers */ @@ -369,7 +369,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) mac->ops.blink_led = e1000_blink_led_generic; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; /* ARC supported; valid only if manageability features are * enabled. */ @@ -388,7 +388,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) mac->ops.blink_led = e1000_blink_led_generic; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; break; } @@ -407,13 +407,13 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw) /* Only do this for the first interface on this card */ E1000_WRITE_REG(hw, E1000_SWSM2, swsm2 | E1000_SWSM2_LOCK); - force_clear_smbi = TRUE; + force_clear_smbi = true; } else { - force_clear_smbi = FALSE; + force_clear_smbi = false; } break; default: - force_clear_smbi = TRUE; + force_clear_smbi = true; break; } @@ -515,7 +515,7 @@ e1000_get_hw_semaphore_82574(struct e1000_hw *hw) u32 extcnf_ctrl; s32 i = 0; /* XXX assert that mutex is held */ - DEBUGFUNC("e1000_get_hw_semaphore_82573"); + DEBUGFUNC("e1000_get_hw_semaphore_82574"); ASSERT_CTX_LOCK_HELD(hw); extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); @@ -563,7 +563,7 @@ e1000_put_hw_semaphore_82574(struct e1000_hw *hw) /** * e1000_set_d0_lplu_state_82574 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. * LPLU will not be activated unless the @@ -593,7 +593,7 @@ static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active) * @active: boolean used to enable/disable lplu * * The low power link up (lplu) state is set to the power management level D3 - * when active is TRUE, else clear lplu for D3. LPLU + * when active is true, else clear lplu for D3. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is * maintained. @@ -860,7 +860,7 @@ static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw) /** * e1000_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. When activating LPLU * this function also disables smart speed and vice versa. LPLU will not be @@ -1051,7 +1051,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw) if (ret_val) return ret_val; - e1000_set_laa_state_82571(hw, TRUE); + e1000_set_laa_state_82571(hw, true); } /* Reinitialize the 82571 serdes link state machine */ @@ -1115,7 +1115,7 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw) switch (mac->type) { case e1000_82573: e1000_enable_tx_pkt_filtering_generic(hw); - /* fall through */ + /* FALLTHROUGH */ case e1000_82574: case e1000_82583: reg_data = E1000_READ_REG(hw, E1000_GCR); @@ -1327,8 +1327,8 @@ static void e1000_clear_vfta_82571(struct e1000_hw *hw) * e1000_check_mng_mode_82574 - Check manageability is enabled * @hw: pointer to the HW structure * - * Reads the NVM Initialization Control Word 2 and returns TRUE - * (>0) if any manageability is enabled, else FALSE (0). + * Reads the NVM Initialization Control Word 2 and returns true + * (>0) if any manageability is enabled, else false (0). **/ static bool e1000_check_mng_mode_82574(struct e1000_hw *hw) { @@ -1339,7 +1339,7 @@ static bool e1000_check_mng_mode_82574(struct e1000_hw *hw) ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data); if (ret_val) - return FALSE; + return false; return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0; } @@ -1392,18 +1392,18 @@ bool e1000_check_phy_82574(struct e1000_hw *hw) ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER, &receive_errors); if (ret_val) - return FALSE; + return false; if (receive_errors == E1000_RECEIVE_ERROR_MAX) { ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS, &status_1kbt); if (ret_val) - return FALSE; + return false; if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) == E1000_IDLE_ERROR_COUNT_MASK) - return TRUE; + return true; } - return FALSE; + return false; } @@ -1556,10 +1556,10 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) */ mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("AN_UP -> AN_PROG\n"); } else { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } break; @@ -1576,10 +1576,10 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) (ctrl & ~E1000_CTRL_SLU)); mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("FORCED_UP -> AN_PROG\n"); } else { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } break; @@ -1593,7 +1593,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) mac->serdes_link_state = e1000_serdes_link_autoneg_complete; DEBUGOUT("AN_PROG -> AN_UP\n"); - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } else { /* Autoneg completed, but failed. */ mac->serdes_link_state = @@ -1619,7 +1619,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) } mac->serdes_link_state = e1000_serdes_link_forced_up; - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; DEBUGOUT("AN_PROG -> FORCED_UP\n"); } break; @@ -1635,13 +1635,13 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) ~E1000_CTRL_SLU)); mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("DOWN -> AN_PROG\n"); break; } } else { if (!(rxcw & E1000_RXCW_SYNCH)) { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; mac->serdes_link_state = e1000_serdes_link_down; DEBUGOUT("ANYSTATE -> DOWN\n"); } else { @@ -1657,7 +1657,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) continue; if (rxcw & E1000_RXCW_IV) { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; mac->serdes_link_state = e1000_serdes_link_down; DEBUGOUT("ANYSTATE -> DOWN\n"); @@ -1671,7 +1671,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TXCW, txcw); mac->serdes_link_state = e1000_serdes_link_autoneg_progress; - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("ANYSTATE -> AN_PROG\n"); } } @@ -1728,7 +1728,7 @@ bool e1000_get_laa_state_82571(struct e1000_hw *hw) DEBUGFUNC("e1000_get_laa_state_82571"); if (hw->mac.type != e1000_82571) - return FALSE; + return false; return hw->dev_spec._82571.laa_is_present; } diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.h index a39f63c53e..77303adb16 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82571.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.c index 81bd419fcf..a0c057e5f0 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -48,8 +48,6 @@ static s32 e1000_init_phy_params_82575(struct e1000_hw *hw); static s32 e1000_init_mac_params_82575(struct e1000_hw *hw); -static s32 e1000_acquire_phy_82575(struct e1000_hw *hw); -static void e1000_release_phy_82575(struct e1000_hw *hw); static s32 e1000_acquire_nvm_82575(struct e1000_hw *hw); static void e1000_release_nvm_82575(struct e1000_hw *hw); static s32 e1000_check_for_link_82575(struct e1000_hw *hw); @@ -61,6 +59,7 @@ static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw); static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset, u16 *data); static s32 e1000_reset_hw_82575(struct e1000_hw *hw); +static s32 e1000_init_hw_82575(struct e1000_hw *hw); static s32 e1000_reset_hw_82580(struct e1000_hw *hw); static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data); @@ -84,10 +83,8 @@ static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, u16 *speed, u16 *duplex); static s32 e1000_get_phy_id_82575(struct e1000_hw *hw); static bool e1000_sgmii_active_82575(struct e1000_hw *hw); -static s32 e1000_reset_init_script_82575(struct e1000_hw *hw); static s32 e1000_read_mac_addr_82575(struct e1000_hw *hw); static void e1000_config_collision_dist_82575(struct e1000_hw *hw); -static void e1000_power_down_phy_copper_82575(struct e1000_hw *hw); static void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw); static void e1000_power_up_serdes_link_82575(struct e1000_hw *hw); static s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw); @@ -104,10 +101,10 @@ static void e1000_clear_vfta_i350(struct e1000_hw *hw); static void e1000_i2c_start(struct e1000_hw *hw); static void e1000_i2c_stop(struct e1000_hw *hw); -static s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data); +static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data); static s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data); static s32 e1000_get_i2c_ack(struct e1000_hw *hw); -static s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data); +static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data); static s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data); static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl); static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl); @@ -131,7 +128,7 @@ static const u16 e1000_82580_rxpbs_table[] = { static bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw) { u32 reg = 0; - bool ext_mdio = FALSE; + bool ext_mdio = false; DEBUGFUNC("e1000_sgmii_uses_mdio_82575"); @@ -156,8 +153,8 @@ static bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw) } /** - * e1000_init_phy_params_82575 - Init PHY func ptrs. - * @hw: pointer to the HW structure + * e1000_init_phy_params_82575 - Initialize PHY function ptrs + * @hw: pointer to the HW structure **/ static s32 e1000_init_phy_params_82575(struct e1000_hw *hw) { @@ -175,17 +172,17 @@ static s32 e1000_init_phy_params_82575(struct e1000_hw *hw) goto out; } - phy->ops.power_up = e1000_power_up_phy_copper; - phy->ops.power_down = e1000_power_down_phy_copper_82575; + phy->ops.power_up = e1000_power_up_phy_copper; + phy->ops.power_down = e1000_power_down_phy_copper_base; phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; phy->reset_delay_us = 100; - phy->ops.acquire = e1000_acquire_phy_82575; + phy->ops.acquire = e1000_acquire_phy_base; phy->ops.check_reset_block = e1000_check_reset_block_generic; phy->ops.commit = e1000_phy_sw_reset_generic; phy->ops.get_cfg_done = e1000_get_cfg_done_82575; - phy->ops.release = e1000_release_phy_82575; + phy->ops.release = e1000_release_phy_base; ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); @@ -232,76 +229,39 @@ static s32 e1000_init_phy_params_82575(struct e1000_hw *hw) case I347AT4_E_PHY_ID: case M88E1112_E_PHY_ID: case M88E1340M_E_PHY_ID: + phy->type = e1000_phy_m88; + phy->ops.check_polarity = e1000_check_polarity_m88; + phy->ops.get_info = e1000_get_phy_info_m88; + phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2; + phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; + break; case M88E1111_I_PHY_ID: phy->type = e1000_phy_m88; phy->ops.check_polarity = e1000_check_polarity_m88; phy->ops.get_info = e1000_get_phy_info_m88; - if (phy->id == I347AT4_E_PHY_ID || - phy->id == M88E1112_E_PHY_ID || - phy->id == M88E1340M_E_PHY_ID) - phy->ops.get_cable_length = - e1000_get_cable_length_m88_gen2; - else if (phy->id == M88E1543_E_PHY_ID || - phy->id == M88E1512_E_PHY_ID) - phy->ops.get_cable_length = - e1000_get_cable_length_m88_gen2; - else - phy->ops.get_cable_length = e1000_get_cable_length_m88; + phy->ops.get_cable_length = e1000_get_cable_length_m88; phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; - /* Check if this PHY is confgured for media swap. */ - if (phy->id == M88E1112_E_PHY_ID) { - u16 data; - - ret_val = phy->ops.write_reg(hw, - E1000_M88E1112_PAGE_ADDR, - 2); - if (ret_val) - goto out; - - ret_val = phy->ops.read_reg(hw, - E1000_M88E1112_MAC_CTRL_1, - &data); - if (ret_val) - goto out; - - data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >> - E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT; - if (data == E1000_M88E1112_AUTO_COPPER_SGMII || - data == E1000_M88E1112_AUTO_COPPER_BASEX) - hw->mac.ops.check_for_link = - e1000_check_for_link_media_swap; - } - if (phy->id == M88E1512_E_PHY_ID) { - ret_val = e1000_initialize_M88E1512_phy(hw); - if (ret_val) - goto out; - } - if (phy->id == M88E1543_E_PHY_ID) { - ret_val = e1000_initialize_M88E1543_phy(hw); - if (ret_val) - goto out; - } break; case IGP03E1000_E_PHY_ID: case IGP04E1000_E_PHY_ID: - phy->type = e1000_phy_igp_3; - phy->ops.check_polarity = e1000_check_polarity_igp; - phy->ops.get_info = e1000_get_phy_info_igp; + phy->type = e1000_phy_igp_3; + phy->ops.check_polarity = e1000_check_polarity_igp; + phy->ops.get_info = e1000_get_phy_info_igp; phy->ops.get_cable_length = e1000_get_cable_length_igp_2; - phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82575; phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic; + phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; break; case I82580_I_PHY_ID: case I350_I_PHY_ID: - phy->type = e1000_phy_82580; - phy->ops.check_polarity = e1000_check_polarity_82577; - phy->ops.force_speed_duplex = - e1000_phy_force_speed_duplex_82577; + phy->type = e1000_phy_82580; + phy->ops.check_polarity = e1000_check_polarity_82577; + phy->ops.get_info = e1000_get_phy_info_82577; phy->ops.get_cable_length = e1000_get_cable_length_82577; - phy->ops.get_info = e1000_get_phy_info_82577; phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580; phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580; + phy->ops.force_speed_duplex = + e1000_phy_force_speed_duplex_82577; break; case I210_I_PHY_ID: phy->type = e1000_phy_i210; @@ -317,13 +277,166 @@ static s32 e1000_init_phy_params_82575(struct e1000_hw *hw) goto out; } + /* Check if this PHY is configured for media swap. */ + switch (phy->id) { + case M88E1112_E_PHY_ID: + { + u16 data; + + ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 2); + if (ret_val) + goto out; + ret_val = phy->ops.read_reg(hw, E1000_M88E1112_MAC_CTRL_1, + &data); + if (ret_val) + goto out; + + data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >> + E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT; + if (data == E1000_M88E1112_AUTO_COPPER_SGMII || + data == E1000_M88E1112_AUTO_COPPER_BASEX) + hw->mac.ops.check_for_link = + e1000_check_for_link_media_swap; + break; + } + case M88E1512_E_PHY_ID: + { + ret_val = e1000_initialize_M88E1512_phy(hw); + break; + } + case M88E1543_E_PHY_ID: + { + ret_val = e1000_initialize_M88E1543_phy(hw); + break; + } + default: + goto out; + } + out: return ret_val; } /** - * e1000_init_nvm_params_82575 - Init NVM func ptrs. - * @hw: pointer to the HW structure + * e1000_init_mac_params_82575 - Init MAC func ptrs. + * @hw: pointer to the HW structure + **/ +static s32 e1000_init_mac_params_82575(struct e1000_hw *hw) +{ + struct e1000_mac_info *mac = &hw->mac; + struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; + + DEBUGFUNC("e1000_init_mac_params_82575"); + + /* Initialize function pointer */ + e1000_init_mac_ops_generic(hw); + + /* Derives media type */ + e1000_get_media_type_82575(hw); + /* Set MTA register count */ + mac->mta_reg_count = 128; + /* Set UTA register count */ + mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128; + /* Set RAR entry count */ + mac->rar_entry_count = E1000_RAR_ENTRIES_82575; + if (mac->type == e1000_82576) + mac->rar_entry_count = E1000_RAR_ENTRIES_82576; + if (mac->type == e1000_82580) + mac->rar_entry_count = E1000_RAR_ENTRIES_82580; + if (mac->type == e1000_i350 || mac->type == e1000_i354) + mac->rar_entry_count = E1000_RAR_ENTRIES_I350; + + /* Enable EEE default settings for EEE supported devices */ + if (mac->type >= e1000_i350) + dev_spec->eee_disable = false; + + /* Allow a single clear of the SW semaphore on I210 and newer */ + if (mac->type >= e1000_i210) + dev_spec->clear_semaphore_once = true; + + /* Set if part includes ASF firmware */ + mac->asf_firmware_present = true; + /* FWSM register */ + mac->has_fwsm = true; + /* ARC supported; valid only if manageability features are enabled. */ + mac->arc_subsystem_valid = + !!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK); + + /* Function pointers */ + + /* bus type/speed/width */ + mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic; + /* reset */ + if (mac->type >= e1000_82580) + mac->ops.reset_hw = e1000_reset_hw_82580; + else + mac->ops.reset_hw = e1000_reset_hw_82575; + /* HW initialization */ + if ((mac->type == e1000_i210) || (mac->type == e1000_i211)) + mac->ops.init_hw = e1000_init_hw_i210; + else + mac->ops.init_hw = e1000_init_hw_82575; + /* link setup */ + mac->ops.setup_link = e1000_setup_link_generic; + /* physical interface link setup */ + mac->ops.setup_physical_interface = + (hw->phy.media_type == e1000_media_type_copper) + ? e1000_setup_copper_link_82575 : e1000_setup_serdes_link_82575; + /* physical interface shutdown */ + mac->ops.shutdown_serdes = e1000_shutdown_serdes_link_82575; + /* physical interface power up */ + mac->ops.power_up_serdes = e1000_power_up_serdes_link_82575; + /* check for link */ + mac->ops.check_for_link = e1000_check_for_link_82575; + /* read mac address */ + mac->ops.read_mac_addr = e1000_read_mac_addr_82575; + /* configure collision distance */ + mac->ops.config_collision_dist = e1000_config_collision_dist_82575; + /* multicast address update */ + mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; + if (hw->mac.type == e1000_i350 || mac->type == e1000_i354) { + /* writing VFTA */ + mac->ops.write_vfta = e1000_write_vfta_i350; + /* clearing VFTA */ + mac->ops.clear_vfta = e1000_clear_vfta_i350; + } else { + /* writing VFTA */ + mac->ops.write_vfta = e1000_write_vfta_generic; + /* clearing VFTA */ + mac->ops.clear_vfta = e1000_clear_vfta_generic; + } + if (hw->mac.type >= e1000_82580) + mac->ops.validate_mdi_setting = + e1000_validate_mdi_setting_crossover_generic; + /* ID LED init */ + mac->ops.id_led_init = e1000_id_led_init_generic; + /* blink LED */ + mac->ops.blink_led = e1000_blink_led_generic; + /* setup LED */ + mac->ops.setup_led = e1000_setup_led_generic; + /* cleanup LED */ + mac->ops.cleanup_led = e1000_cleanup_led_generic; + /* turn on/off LED */ + mac->ops.led_on = e1000_led_on_generic; + mac->ops.led_off = e1000_led_off_generic; + /* clear hardware counters */ + mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82575; + /* link info */ + mac->ops.get_link_up_info = e1000_get_link_up_info_82575; + /* acquire SW_FW sync */ + mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync; + /* release SW_FW sync */ + mac->ops.release_swfw_sync = e1000_release_swfw_sync; + + /* set lan id for port to determine which phy lock to use */ + hw->mac.ops.set_lan_id(hw); + + return E1000_SUCCESS; +} + +/** + * e1000_init_nvm_params_82575 - Initialize NVM function ptrs + * @hw: pointer to the HW structure **/ s32 e1000_init_nvm_params_82575(struct e1000_hw *hw) { @@ -335,8 +448,7 @@ s32 e1000_init_nvm_params_82575(struct e1000_hw *hw) size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >> E1000_EECD_SIZE_EX_SHIFT); - /* - * Added to a constant, "size" becomes the left-shift value + /* Added to a constant, "size" becomes the left-shift value * for setting word_size. */ size += NVM_WORD_SIZE_BASE_SHIFT; @@ -395,7 +507,6 @@ s32 e1000_init_nvm_params_82575(struct e1000_hw *hw) nvm->ops.update = e1000_update_nvm_checksum_82580; break; case e1000_i350: - case e1000_i354: nvm->ops.validate = e1000_validate_nvm_checksum_i350; nvm->ops.update = e1000_update_nvm_checksum_i350; break; @@ -406,119 +517,6 @@ s32 e1000_init_nvm_params_82575(struct e1000_hw *hw) return E1000_SUCCESS; } -/** - * e1000_init_mac_params_82575 - Init MAC func ptrs. - * @hw: pointer to the HW structure - **/ -static s32 e1000_init_mac_params_82575(struct e1000_hw *hw) -{ - struct e1000_mac_info *mac = &hw->mac; - struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; - - DEBUGFUNC("e1000_init_mac_params_82575"); - - /* Derives media type */ - e1000_get_media_type_82575(hw); - /* Set mta register count */ - mac->mta_reg_count = 128; - /* Set uta register count */ - mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128; - /* Set rar entry count */ - mac->rar_entry_count = E1000_RAR_ENTRIES_82575; - if (mac->type == e1000_82576) - mac->rar_entry_count = E1000_RAR_ENTRIES_82576; - if (mac->type == e1000_82580) - mac->rar_entry_count = E1000_RAR_ENTRIES_82580; - if (mac->type == e1000_i350 || mac->type == e1000_i354) - mac->rar_entry_count = E1000_RAR_ENTRIES_I350; - - /* Enable EEE default settings for EEE supported devices */ - if (mac->type >= e1000_i350) - dev_spec->eee_disable = FALSE; - - /* Allow a single clear of the SW semaphore on I210 and newer */ - if (mac->type >= e1000_i210) - dev_spec->clear_semaphore_once = TRUE; - - /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; - /* FWSM register */ - mac->has_fwsm = TRUE; - /* ARC supported; valid only if manageability features are enabled. */ - mac->arc_subsystem_valid = - !!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK); - - /* Function pointers */ - - /* bus type/speed/width */ - mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic; - /* reset */ - if (mac->type >= e1000_82580) - mac->ops.reset_hw = e1000_reset_hw_82580; - else - mac->ops.reset_hw = e1000_reset_hw_82575; - /* hw initialization */ - if ((mac->type == e1000_i210) || (mac->type == e1000_i211)) - mac->ops.init_hw = e1000_init_hw_i210; - else - mac->ops.init_hw = e1000_init_hw_82575; - /* link setup */ - mac->ops.setup_link = e1000_setup_link_generic; - /* physical interface link setup */ - mac->ops.setup_physical_interface = - (hw->phy.media_type == e1000_media_type_copper) - ? e1000_setup_copper_link_82575 : e1000_setup_serdes_link_82575; - /* physical interface shutdown */ - mac->ops.shutdown_serdes = e1000_shutdown_serdes_link_82575; - /* physical interface power up */ - mac->ops.power_up_serdes = e1000_power_up_serdes_link_82575; - /* check for link */ - mac->ops.check_for_link = e1000_check_for_link_82575; - /* read mac address */ - mac->ops.read_mac_addr = e1000_read_mac_addr_82575; - /* configure collision distance */ - mac->ops.config_collision_dist = e1000_config_collision_dist_82575; - /* multicast address update */ - mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; - if (hw->mac.type == e1000_i350 || mac->type == e1000_i354) { - /* writing VFTA */ - mac->ops.write_vfta = e1000_write_vfta_i350; - /* clearing VFTA */ - mac->ops.clear_vfta = e1000_clear_vfta_i350; - } else { - /* writing VFTA */ - mac->ops.write_vfta = e1000_write_vfta_generic; - /* clearing VFTA */ - mac->ops.clear_vfta = e1000_clear_vfta_generic; - } - if (hw->mac.type >= e1000_82580) - mac->ops.validate_mdi_setting = - e1000_validate_mdi_setting_crossover_generic; - /* ID LED init */ - mac->ops.id_led_init = e1000_id_led_init_generic; - /* blink LED */ - mac->ops.blink_led = e1000_blink_led_generic; - /* setup LED */ - mac->ops.setup_led = e1000_setup_led_generic; - /* cleanup LED */ - mac->ops.cleanup_led = e1000_cleanup_led_generic; - /* turn on/off LED */ - mac->ops.led_on = e1000_led_on_generic; - mac->ops.led_off = e1000_led_off_generic; - /* clear hardware counters */ - mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82575; - /* link info */ - mac->ops.get_link_up_info = e1000_get_link_up_info_82575; - /* acquire SW_FW sync */ - mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync; - mac->ops.release_swfw_sync = e1000_release_swfw_sync; - - /* set lan id for port to determine which phy lock to use */ - hw->mac.ops.set_lan_id(hw); - - return E1000_SUCCESS; -} - /** * e1000_init_function_pointers_82575 - Init func ptrs. * @hw: pointer to the HW structure @@ -535,50 +533,6 @@ void e1000_init_function_pointers_82575(struct e1000_hw *hw) hw->mbx.ops.init_params = e1000_init_mbx_params_pf; } -/** - * e1000_acquire_phy_82575 - Acquire rights to access PHY - * @hw: pointer to the HW structure - * - * Acquire access rights to the correct PHY. - **/ -static s32 e1000_acquire_phy_82575(struct e1000_hw *hw) -{ - u16 mask = E1000_SWFW_PHY0_SM; - - DEBUGFUNC("e1000_acquire_phy_82575"); - - if (hw->bus.func == E1000_FUNC_1) - mask = E1000_SWFW_PHY1_SM; - else if (hw->bus.func == E1000_FUNC_2) - mask = E1000_SWFW_PHY2_SM; - else if (hw->bus.func == E1000_FUNC_3) - mask = E1000_SWFW_PHY3_SM; - - return hw->mac.ops.acquire_swfw_sync(hw, mask); -} - -/** - * e1000_release_phy_82575 - Release rights to access PHY - * @hw: pointer to the HW structure - * - * A wrapper to release access rights to the correct PHY. - **/ -static void e1000_release_phy_82575(struct e1000_hw *hw) -{ - u16 mask = E1000_SWFW_PHY0_SM; - - DEBUGFUNC("e1000_release_phy_82575"); - - if (hw->bus.func == E1000_FUNC_1) - mask = E1000_SWFW_PHY1_SM; - else if (hw->bus.func == E1000_FUNC_2) - mask = E1000_SWFW_PHY2_SM; - else if (hw->bus.func == E1000_FUNC_3) - mask = E1000_SWFW_PHY3_SM; - - hw->mac.ops.release_swfw_sync(hw, mask); -} - /** * e1000_read_phy_reg_sgmii_82575 - Read PHY register using sgmii * @hw: pointer to the HW structure @@ -762,7 +716,7 @@ static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw) DEBUGFUNC("e1000_phy_hw_reset_sgmii_82575"); /* - * This isn't a TRUE "hard" reset, but is the only reset + * This isn't a true "hard" reset, but is the only reset * available to us at this time. */ @@ -792,7 +746,7 @@ out: /** * e1000_set_d0_lplu_state_82575 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. When * activating LPLU this function also disables smart speed @@ -878,7 +832,7 @@ out: /** * e1000_set_d0_lplu_state_82580 - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. When * activating LPLU this function also disables smart speed @@ -929,7 +883,7 @@ static s32 e1000_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active) * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D3 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D3 + * and SmartSpeed is disabled when active is true, else clear lplu for D3 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is @@ -1185,7 +1139,7 @@ static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw) /* Determine if a swap needs to happen. */ if (port && (hw->dev_spec._82575.media_port != port)) { hw->dev_spec._82575.media_port = port; - hw->dev_spec._82575.media_changed = TRUE; + hw->dev_spec._82575.media_changed = true; } if (port == E1000_MEDIA_PORT_COPPER) { @@ -1263,7 +1217,7 @@ static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, * The link up bit determines when link is up on autoneg. */ if (pcs & E1000_PCS_LSTS_LINK_OK) { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; /* Detect and store PCS speed */ if (pcs & E1000_PCS_LSTS_SPEED_1000) @@ -1292,7 +1246,7 @@ static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, } } else { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; *speed = 0; *duplex = 0; } @@ -1401,16 +1355,15 @@ static s32 e1000_reset_hw_82575(struct e1000_hw *hw) } /** - * e1000_init_hw_82575 - Initialize hardware - * @hw: pointer to the HW structure + * e1000_init_hw_82575 - Initialize hardware + * @hw: pointer to the HW structure * - * This inits the hardware readying it for operation. + * This inits the hardware readying it for operation. **/ -s32 e1000_init_hw_82575(struct e1000_hw *hw) +static s32 e1000_init_hw_82575(struct e1000_hw *hw) { struct e1000_mac_info *mac = &hw->mac; s32 ret_val; - u16 i, rar_count = mac->rar_entry_count; DEBUGFUNC("e1000_init_hw_82575"); @@ -1425,27 +1378,12 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw) DEBUGOUT("Initializing the IEEE VLAN\n"); mac->ops.clear_vfta(hw); - /* Setup the receive address */ - e1000_init_rx_addrs_generic(hw, rar_count); - - /* Zero out the Multicast HASH table */ - DEBUGOUT("Zeroing the MTA\n"); - for (i = 0; i < mac->mta_reg_count; i++) - E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); - - /* Zero out the Unicast HASH table */ - DEBUGOUT("Zeroing the UTA\n"); - for (i = 0; i < mac->uta_reg_count; i++) - E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0); - - /* Setup link and flow control */ - ret_val = mac->ops.setup_link(hw); + ret_val = e1000_init_hw_base(hw); /* Set the default MTU size */ hw->dev_spec._82575.mtu = 1500; - /* - * Clear all of the statistics registers (clear on read). It is + /* Clear all of the statistics registers (clear on read). It is * important that we do this after we have tried to establish link * because the symbol error count will increment wildly if there * is no link. @@ -1454,7 +1392,6 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw) return ret_val; } - /** * e1000_setup_copper_link_82575 - Configure copper link settings * @hw: pointer to the HW structure @@ -1465,9 +1402,9 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw) **/ static s32 e1000_setup_copper_link_82575(struct e1000_hw *hw) { + u32 phpm_reg; u32 ctrl; s32 ret_val; - u32 phpm_reg; DEBUGFUNC("e1000_setup_copper_link_82575"); @@ -1506,13 +1443,19 @@ static s32 e1000_setup_copper_link_82575(struct e1000_hw *hw) } switch (hw->phy.type) { case e1000_phy_i210: + /* FALLTHROUGH */ case e1000_phy_m88: switch (hw->phy.id) { case I347AT4_E_PHY_ID: + /* FALLTHROUGH */ case M88E1112_E_PHY_ID: + /* FALLTHROUGH */ case M88E1340M_E_PHY_ID: + /* FALLTHROUGH */ case M88E1543_E_PHY_ID: + /* FALLTHROUGH */ case M88E1512_E_PHY_ID: + /* FALLTHROUGH */ case I210_I_PHY_ID: ret_val = e1000_copper_link_setup_m88_gen2(hw); break; @@ -1590,13 +1533,13 @@ static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw) switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) { case E1000_CTRL_EXT_LINK_MODE_SGMII: /* sgmii mode lets the phy handle forcing speed/duplex */ - pcs_autoneg = TRUE; + pcs_autoneg = true; /* autoneg time out should be disabled for SGMII mode */ reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT); break; case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX: /* disable PCS autoneg and support parallel detect only */ - pcs_autoneg = FALSE; + pcs_autoneg = false; /* FALLTHROUGH */ default: if (hw->mac.type == e1000_82575 || @@ -1608,7 +1551,7 @@ static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw) } if (data & E1000_EEPROM_PCS_AUTONEG_DISABLE_BIT) - pcs_autoneg = FALSE; + pcs_autoneg = false; } /* @@ -1700,8 +1643,8 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw) u32 link_mode = 0; /* Set internal phy as default */ - dev_spec->sgmii_active = FALSE; - dev_spec->module_plugged = FALSE; + dev_spec->sgmii_active = false; + dev_spec->module_plugged = false; /* Get CSR setting */ ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); @@ -1720,7 +1663,7 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw) /* Get phy control interface type set (MDIO vs. I2C)*/ if (e1000_sgmii_uses_mdio_82575(hw)) { hw->phy.media_type = e1000_media_type_copper; - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; break; } /* fall through for I2C based SGMII */ @@ -1738,7 +1681,7 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw) if (link_mode == E1000_CTRL_EXT_LINK_MODE_SGMII) { hw->phy.media_type = e1000_media_type_copper; - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; } break; @@ -1809,14 +1752,14 @@ static s32 e1000_set_sfp_media_type_82575(struct e1000_hw *hw) /* Check if there is some SFP module plugged and powered */ if ((tranceiver_type == E1000_SFF_IDENTIFIER_SFP) || (tranceiver_type == E1000_SFF_IDENTIFIER_SFF)) { - dev_spec->module_plugged = TRUE; + dev_spec->module_plugged = true; if (eth_flags->e1000_base_lx || eth_flags->e1000_base_sx) { hw->phy.media_type = e1000_media_type_internal_serdes; } else if (eth_flags->e100_base_fx) { - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; hw->phy.media_type = e1000_media_type_internal_serdes; } else if (eth_flags->e1000_base_t) { - dev_spec->sgmii_active = TRUE; + dev_spec->sgmii_active = true; hw->phy.media_type = e1000_media_type_copper; } else { hw->phy.media_type = e1000_media_type_unknown; @@ -1889,7 +1832,7 @@ static bool e1000_sgmii_active_82575(struct e1000_hw *hw) * Inits recommended HW defaults after a reset when there is no EEPROM * detected. This is only for the 82575. **/ -static s32 e1000_reset_init_script_82575(struct e1000_hw *hw) +s32 e1000_reset_init_script_82575(struct e1000_hw *hw) { DEBUGFUNC("e1000_reset_init_script_82575"); @@ -1967,27 +1910,6 @@ static void e1000_config_collision_dist_82575(struct e1000_hw *hw) E1000_WRITE_FLUSH(hw); } -/** - * e1000_power_down_phy_copper_82575 - Remove link during PHY power down - * @hw: pointer to the HW structure - * - * In the case of a PHY power down to save power, or to turn off link during a - * driver unload, or wake on lan is not enabled, remove the link. - **/ -static void e1000_power_down_phy_copper_82575(struct e1000_hw *hw) -{ - struct e1000_phy_info *phy = &hw->phy; - - if (!(phy->ops.check_reset_block)) - return; - - /* If the management interface is not enabled, then power down */ - if (!(e1000_enable_mng_pass_thru(hw) || phy->ops.check_reset_block(hw))) - e1000_power_down_phy_copper(hw); - - return; -} - /** * e1000_clear_hw_cntrs_82575 - Clear device specific hardware counters * @hw: pointer to the HW structure @@ -2053,85 +1975,6 @@ static void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw) E1000_READ_REG(hw, E1000_SCVPC); } -/** - * e1000_rx_fifo_flush_82575 - Clean rx fifo after Rx enable - * @hw: pointer to the HW structure - * - * After Rx enable, if manageability is enabled then there is likely some - * bad data at the start of the fifo and possibly in the DMA fifo. This - * function clears the fifos and flushes any packets that came in as rx was - * being enabled. - **/ -void e1000_rx_fifo_flush_82575(struct e1000_hw *hw) -{ - u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled; - int i, ms_wait; - - DEBUGFUNC("e1000_rx_fifo_flush_82575"); - - /* disable IPv6 options as per hardware errata */ - rfctl = E1000_READ_REG(hw, E1000_RFCTL); - rfctl |= E1000_RFCTL_IPV6_EX_DIS; - E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); - - if (hw->mac.type != e1000_82575 || - !(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN)) - return; - - /* Disable all Rx queues */ - for (i = 0; i < 4; i++) { - rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i)); - E1000_WRITE_REG(hw, E1000_RXDCTL(i), - rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE); - } - /* Poll all queues to verify they have shut down */ - for (ms_wait = 0; ms_wait < 10; ms_wait++) { - msec_delay(1); - rx_enabled = 0; - for (i = 0; i < 4; i++) - rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i)); - if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE)) - break; - } - - if (ms_wait == 10) - DEBUGOUT("Queue disable timed out after 10ms\n"); - - /* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all - * incoming packets are rejected. Set enable and wait 2ms so that - * any packet that was coming in as RCTL.EN was set is flushed - */ - E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF); - - rlpml = E1000_READ_REG(hw, E1000_RLPML); - E1000_WRITE_REG(hw, E1000_RLPML, 0); - - rctl = E1000_READ_REG(hw, E1000_RCTL); - temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP); - temp_rctl |= E1000_RCTL_LPE; - - E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl); - E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN); - E1000_WRITE_FLUSH(hw); - msec_delay(2); - - /* Enable Rx queues that were previously enabled and restore our - * previous state - */ - for (i = 0; i < 4; i++) - E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]); - E1000_WRITE_REG(hw, E1000_RCTL, rctl); - E1000_WRITE_FLUSH(hw); - - E1000_WRITE_REG(hw, E1000_RLPML, rlpml); - E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); - - /* Flush receive errors generated by workaround */ - E1000_READ_REG(hw, E1000_ROC); - E1000_READ_REG(hw, E1000_RNBC); - E1000_READ_REG(hw, E1000_MPC); -} - /** * e1000_set_pcie_completion_timeout - set pci-e completion timeout * @hw: pointer to the HW structure @@ -2387,11 +2230,11 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw) DEBUGFUNC("e1000_reset_hw_82580"); - hw->dev_spec._82575.global_device_reset = FALSE; + hw->dev_spec._82575.global_device_reset = false; /* 82580 does not reliably do global_device_reset due to hw errata */ if (hw->mac.type == e1000_82580) - global_device_reset = FALSE; + global_device_reset = false; /* Get current control state. */ ctrl = E1000_READ_REG(hw, E1000_CTRL); @@ -2415,7 +2258,7 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw) /* Determine whether or not a global dev reset is requested */ if (global_device_reset && hw->mac.ops.acquire_swfw_sync(hw, swmbsw_mask)) - global_device_reset = FALSE; + global_device_reset = false; if (global_device_reset && !(E1000_READ_REG(hw, E1000_STATUS) & E1000_STAT_DEV_RST_SET)) @@ -2702,7 +2545,7 @@ out: /** * __e1000_access_emi_reg - Read/write EMI register * @hw: pointer to the HW structure - * @addr: EMI address to program + * @address: EMI address to program * @data: pointer to value to read/write from/to the EMI address * @read: boolean flag to indicate read or write **/ @@ -2735,7 +2578,7 @@ s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data) { DEBUGFUNC("e1000_read_emi_reg"); - return __e1000_access_emi_reg(hw, addr, data, TRUE); + return __e1000_access_emi_reg(hw, addr, data, true); } /** @@ -2929,8 +2772,8 @@ out: /** * e1000_set_eee_i350 - Enable/disable EEE support * @hw: pointer to the HW structure - * @adv1g: boolean flag enabling 1G EEE advertisement - * @adv100m: boolean flag enabling 100M EEE advertisement + * @adv1G: boolean flag enabling 1G EEE advertisement + * @adv100M: boolean flag enabling 100M EEE advertisement * * Enable/disable EEE based on setting in dev_spec structure. * @@ -2984,8 +2827,8 @@ out: /** * e1000_set_eee_i354 - Enable/disable EEE support * @hw: pointer to the HW structure - * @adv1g: boolean flag enabling 1G EEE advertisement - * @adv100m: boolean flag enabling 100M EEE advertisement + * @adv1G: boolean flag enabling 1G EEE advertisement + * @adv100M: boolean flag enabling 100M EEE advertisement * * Enable/disable EEE legacy mode based on setting in dev_spec structure. * @@ -3093,7 +2936,7 @@ s32 e1000_get_eee_status_i354(struct e1000_hw *hw, bool *status) goto out; *status = phy_data & (E1000_PCS_STATUS_TX_LPI_RCVD | - E1000_PCS_STATUS_RX_LPI_RCVD) ? TRUE : FALSE; + E1000_PCS_STATUS_RX_LPI_RCVD) ? true : false; out: return ret_val; @@ -3195,7 +3038,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset, u32 retry = 1; u16 swfw_mask = 0; - bool nack = TRUE; + bool nack = true; DEBUGFUNC("e1000_read_i2c_byte_generic"); @@ -3238,9 +3081,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset, if (status != E1000_SUCCESS) goto fail; - status = e1000_clock_in_i2c_byte(hw, data); - if (status != E1000_SUCCESS) - goto fail; + e1000_clock_in_i2c_byte(hw, data); status = e1000_clock_out_i2c_bit(hw, nack); if (status != E1000_SUCCESS) @@ -3404,7 +3245,7 @@ static void e1000_i2c_stop(struct e1000_hw *hw) * * Clocks in one byte data via I2C data/clock **/ -static s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data) +static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data) { s32 i; bool bit = 0; @@ -3416,8 +3257,6 @@ static s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data) e1000_clock_in_i2c_bit(hw, &bit); *data |= bit << i; } - - return E1000_SUCCESS; } /** @@ -3466,7 +3305,7 @@ static s32 e1000_get_i2c_ack(struct e1000_hw *hw) u32 i = 0; u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); u32 timeout = 10; - bool ack = TRUE; + bool ack = true; DEBUGFUNC("e1000_get_i2c_ack"); @@ -3506,7 +3345,7 @@ static s32 e1000_get_i2c_ack(struct e1000_hw *hw) * * Clocks in one bit via I2C data/clock **/ -static s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data) +static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data) { u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS); @@ -3524,8 +3363,6 @@ static s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data) /* Minimum low period of clock is 4.7 us */ usec_delay(E1000_I2C_T_LOW); - - return E1000_SUCCESS; } /** @@ -3641,7 +3478,6 @@ static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data) /** * e1000_get_i2c_data - Reads the I2C SDA data bit - * @hw: pointer to hardware structure * @i2cctl: Current value of I2CCTL register * * Returns the I2C data bit value diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.h index a96b25f416..d6665bfe64 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_82575.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -56,9 +56,7 @@ #define E1000_RAR_ENTRIES_I350 32 #define E1000_SW_SYNCH_MB 0x00000100 #define E1000_STAT_DEV_RST_SET 0x00100000 -#define E1000_CTRL_DEV_RST 0x20000000 -#ifdef E1000_BIT_FIELDS struct e1000_adv_data_desc { __le64 buffer_addr; /* Address of the descriptor's data buffer */ union { @@ -121,7 +119,6 @@ struct e1000_adv_context_desc { } fields; } l4_setup; }; -#endif /* SRRCTL bit definitions */ #define E1000_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */ @@ -143,13 +140,12 @@ struct e1000_adv_context_desc { #define E1000_TX_HEAD_WB_ENABLE 0x1 #define E1000_TX_SEQNUM_WB_ENABLE 0x2 -#define E1000_MRQC_ENABLE_RSS_4Q 0x00000002 +#define E1000_MRQC_ENABLE_RSS_MQ 0x00000002 #define E1000_MRQC_ENABLE_VMDQ 0x00000003 #define E1000_MRQC_ENABLE_VMDQ_RSS_2Q 0x00000005 #define E1000_MRQC_RSS_FIELD_IPV4_UDP 0x00400000 #define E1000_MRQC_RSS_FIELD_IPV6_UDP 0x00800000 #define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000 -#define E1000_MRQC_ENABLE_RSS_8Q 0x00000002 #define E1000_VMRCTL_MIRROR_PORT_SHIFT 8 #define E1000_VMRCTL_MIRROR_DSTPORT_MASK (7 << \ @@ -182,46 +178,12 @@ struct e1000_adv_context_desc { /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */ #define E1000_IMIR_PORT_IM_EN 0x00010000 /* TCP port enable */ #define E1000_IMIR_PORT_BP 0x00020000 /* TCP port check bypass */ -#define E1000_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */ #define E1000_IMIREXT_CTRL_URG 0x00002000 /* Check URG bit in header */ #define E1000_IMIREXT_CTRL_ACK 0x00004000 /* Check ACK bit in header */ #define E1000_IMIREXT_CTRL_PSH 0x00008000 /* Check PSH bit in header */ #define E1000_IMIREXT_CTRL_RST 0x00010000 /* Check RST bit in header */ #define E1000_IMIREXT_CTRL_SYN 0x00020000 /* Check SYN bit in header */ #define E1000_IMIREXT_CTRL_FIN 0x00040000 /* Check FIN bit in header */ -#define E1000_IMIREXT_CTRL_BP 0x00080000 /* Bypass check of ctrl bits */ - -/* Receive Descriptor - Advanced */ -union e1000_adv_rx_desc { - struct { - __le64 pkt_addr; /* Packet buffer address */ - __le64 hdr_addr; /* Header buffer address */ - } read; - struct { - struct { - union { - __le32 data; - struct { - __le16 pkt_info; /*RSS type, Pkt type*/ - /* Split Header, header buffer len */ - __le16 hdr_info; - } hs_rss; - } lo_dword; - union { - __le32 rss; /* RSS Hash */ - struct { - __le16 ip_id; /* IP id */ - __le16 csum; /* Packet Checksum */ - } csum_ip; - } hi_dword; - } lower; - struct { - __le32 status_error; /* ext status/error */ - __le16 length; /* Packet length */ - __le16 vlan; /* VLAN tag */ - } upper; - } wb; /* writeback */ -}; #define E1000_RXDADV_RSSTYPE_MASK 0x0000000F #define E1000_RXDADV_RSSTYPE_SHIFT 12 @@ -230,7 +192,6 @@ union e1000_adv_rx_desc { #define E1000_RXDADV_SPLITHEADER_EN 0x00001000 #define E1000_RXDADV_SPH 0x8000 #define E1000_RXDADV_STAT_TS 0x10000 /* Pkt was time stamped */ -#define E1000_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */ #define E1000_RXDADV_ERR_HBO 0x00800000 /* RSS Hash results */ @@ -279,20 +240,6 @@ union e1000_adv_rx_desc { #define E1000_RXDADV_IPSEC_ERROR_INVALID_LENGTH 0x10000000 #define E1000_RXDADV_IPSEC_ERROR_AUTHENTICATION_FAILED 0x18000000 -/* Transmit Descriptor - Advanced */ -union e1000_adv_tx_desc { - struct { - __le64 buffer_addr; /* Address of descriptor's data buf */ - __le32 cmd_type_len; - __le32 olinfo_status; - } read; - struct { - __le64 rsvd; /* Reserved */ - __le32 nxtseq_seed; - __le32 status; - } wb; -}; - /* Adv Transmit Descriptor Config Masks */ #define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */ #define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ @@ -315,33 +262,6 @@ union e1000_adv_tx_desc { #define E1000_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */ #define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */ -/* Context descriptors */ -struct e1000_adv_tx_context_desc { - __le32 vlan_macip_lens; - __le32 seqnum_seed; - __le32 type_tucmd_mlhl; - __le32 mss_l4len_idx; -}; - -#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */ -#define E1000_ADVTXD_VLAN_SHIFT 16 /* Adv ctxt vlan tag shift */ -#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */ -#define E1000_ADVTXD_TUCMD_IPV6 0x00000000 /* IP Packet Type: 0=IPv6 */ -#define E1000_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE of UDP */ -#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */ -#define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 Packet TYPE of SCTP */ -#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */ -/* IPSec Encrypt Enable for ESP */ -#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN 0x00004000 -/* Req requires Markers and CRC */ -#define E1000_ADVTXD_TUCMD_MKRREQ 0x00002000 -#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ -#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ -/* Adv ctxt IPSec SA IDX mask */ -#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK 0x000000FF -/* Adv ctxt IPSec ESP len mask */ -#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK 0x000000FF - /* Additional Transmit Descriptor Control definitions */ #define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */ #define E1000_TXDCTL_SWFLSH 0x04000000 /* Tx Desc. wbk flushing */ @@ -381,11 +301,6 @@ struct e1000_adv_tx_context_desc { #define E1000_IMS_LSECPNS E1000_ICR_LSECPNS /* PN threshold - server */ #define E1000_ICS_LSECPNS E1000_ICR_LSECPNS /* PN threshold - server */ -/* ETQF register bit definitions */ -#define E1000_ETQF_FILTER_ENABLE (1 << 26) -#define E1000_ETQF_IMM_INT (1 << 29) -#define E1000_ETQF_1588 (1 << 30) -#define E1000_ETQF_QUEUE_ENABLE (1U << 31) /* * ETQF filter list: one static filter per filter consumer. This is * to avoid filter collisions later. Add new filters @@ -396,10 +311,6 @@ struct e1000_adv_tx_context_desc { */ #define E1000_ETQF_FILTER_EAPOL 0 -#define E1000_FTQF_VF_BP 0x00008000 -#define E1000_FTQF_1588_TIME_STAMP 0x08000000 -#define E1000_FTQF_MASK 0xF0000000 -#define E1000_FTQF_MASK_PROTO_BP 0x10000000 #define E1000_FTQF_MASK_SOURCE_ADDR_BP 0x20000000 #define E1000_FTQF_MASK_DEST_ADDR_BP 0x40000000 #define E1000_FTQF_MASK_SOURCE_PORT_BP 0x80000000 @@ -475,13 +386,14 @@ struct e1000_adv_tx_context_desc { #define ALL_QUEUES 0xFFFF +s32 e1000_reset_init_script_82575(struct e1000_hw *hw); +s32 e1000_init_nvm_params_82575(struct e1000_hw *hw); + /* Rx packet buffer size defines */ #define E1000_RXPBS_SIZE_MASK_82576 0x0000007F void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable); void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf); void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable); -s32 e1000_init_nvm_params_82575(struct e1000_hw *hw); -s32 e1000_init_hw_82575(struct e1000_hw *hw); enum e1000_promisc_type { e1000_promisc_disabled = 0, /* all promisc modes disabled */ diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.c index 4f860166ab..5c778a48bb 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -327,6 +327,26 @@ s32 e1000_set_mac_type(struct e1000_hw *hw) case E1000_DEV_ID_PCH_CMP_I219_V11: mac->type = e1000_pch_cnp; break; + case E1000_DEV_ID_PCH_TGP_I219_LM13: + case E1000_DEV_ID_PCH_TGP_I219_V13: + case E1000_DEV_ID_PCH_TGP_I219_LM14: + case E1000_DEV_ID_PCH_TGP_I219_V14: + case E1000_DEV_ID_PCH_TGP_I219_LM15: + case E1000_DEV_ID_PCH_TGP_I219_V15: + mac->type = e1000_pch_tgp; + break; + case E1000_DEV_ID_PCH_ADL_I219_LM16: + case E1000_DEV_ID_PCH_ADL_I219_V16: + case E1000_DEV_ID_PCH_ADL_I219_LM17: + case E1000_DEV_ID_PCH_ADL_I219_V17: + mac->type = e1000_pch_adp; + break; + case E1000_DEV_ID_PCH_MTP_I219_LM18: + case E1000_DEV_ID_PCH_MTP_I219_V18: + case E1000_DEV_ID_PCH_MTP_I219_LM19: + case E1000_DEV_ID_PCH_MTP_I219_V19: + mac->type = e1000_pch_mtp; + break; case E1000_DEV_ID_82575EB_COPPER: case E1000_DEV_ID_82575EB_FIBER_SERDES: case E1000_DEV_ID_82575GB_QUAD_COPPER: @@ -363,6 +383,7 @@ s32 e1000_set_mac_type(struct e1000_hw *hw) break; case E1000_DEV_ID_I210_COPPER_FLASHLESS: case E1000_DEV_ID_I210_SERDES_FLASHLESS: + case E1000_DEV_ID_I210_SGMII_FLASHLESS: case E1000_DEV_ID_I210_COPPER: case E1000_DEV_ID_I210_COPPER_OEM1: case E1000_DEV_ID_I210_COPPER_IT: @@ -400,10 +421,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw) /** * e1000_setup_init_funcs - Initializes function pointers * @hw: pointer to the HW structure - * @init_device: TRUE will initialize the rest of the function pointers - * getting the device ready for use. FALSE will only set + * @init_device: true will initialize the rest of the function pointers + * getting the device ready for use. false will only set * MAC type and the function pointers for the other init - * functions. Passing FALSE will not generate any hardware + * functions. Passing false will not generate any hardware * reads or writes. * * This function must be called by a driver in order to use the rest @@ -479,6 +500,9 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: e1000_init_function_pointers_ich8lan(hw); break; case e1000_82575: @@ -632,7 +656,7 @@ bool e1000_check_mng_mode(struct e1000_hw *hw) if (hw->mac.ops.check_mng_mode) return hw->mac.ops.check_mng_mode(hw); - return FALSE; + return false; } /** @@ -1162,7 +1186,7 @@ s32 e1000_phy_commit(struct e1000_hw *hw) * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D0 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D0 + * and SmartSpeed is disabled when active is true, else clear lplu for D0 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is @@ -1184,7 +1208,7 @@ s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active) * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D3 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D3 + * and SmartSpeed is disabled when active is true, else clear lplu for D3 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is @@ -1245,6 +1269,21 @@ s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size) return e1000_read_pba_length_generic(hw, pba_num_size); } +/** + * e1000_read_pba_num - Read device part number + * @hw: pointer to the HW structure + * @pba_num: pointer to device part number + * + * Reads the product board assembly (PBA) number from the EEPROM and stores + * the value in pba_num. + * Currently no func pointer exists and all implementations are handled in the + * generic version of this function. + **/ +s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *pba_num) +{ + return e1000_read_pba_num_generic(hw, pba_num); +} + /** * e1000_validate_nvm_checksum - Verifies NVM (EEPROM) checksum * @hw: pointer to the HW structure diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.h index bf5f637cb3..48cf332130 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_api.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -46,7 +46,6 @@ extern void e1000_init_function_pointers_82541(struct e1000_hw *hw); extern void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw); extern void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw); extern void e1000_init_function_pointers_82575(struct e1000_hw *hw); -extern void e1000_rx_fifo_flush_82575(struct e1000_hw *hw); extern void e1000_init_function_pointers_vf(struct e1000_hw *hw); extern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw); extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw); @@ -98,6 +97,7 @@ s32 e1000_phy_commit(struct e1000_hw *hw); void e1000_power_up_phy(struct e1000_hw *hw); void e1000_power_down_phy(struct e1000_hw *hw); s32 e1000_read_mac_addr(struct e1000_hw *hw); +s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *part_num); s32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size); s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size); void e1000_reload_nvm(struct e1000_hw *hw); @@ -140,11 +140,11 @@ u32 e1000_translate_register_82542(u32 reg); * Typical use: * ... * if (TBI_ACCEPT) { - * accept_frame = TRUE; + * accept_frame = true; * e1000_tbi_adjust_stats(adapter, MacAddress); * frame_length--; * } else { - * accept_frame = FALSE; + * accept_frame = false; * } * ... */ diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_base.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_base.c new file mode 100644 index 0000000000..e12a5fbecf --- /dev/null +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_base.c @@ -0,0 +1,221 @@ +/****************************************************************************** + SPDX-License-Identifier: BSD-3-Clause + + Copyright (c) 2001-2020, Intel Corporation + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +******************************************************************************/ +/*$FreeBSD$*/ + +#include "e1000_hw.h" +#include "e1000_82575.h" +#include "e1000_mac.h" +#include "e1000_base.h" +#include "e1000_manage.h" + +/** + * e1000_acquire_phy_base - Acquire rights to access PHY + * @hw: pointer to the HW structure + * + * Acquire access rights to the correct PHY. + **/ +s32 e1000_acquire_phy_base(struct e1000_hw *hw) +{ + u16 mask = E1000_SWFW_PHY0_SM; + + DEBUGFUNC("e1000_acquire_phy_base"); + + if (hw->bus.func == E1000_FUNC_1) + mask = E1000_SWFW_PHY1_SM; + else if (hw->bus.func == E1000_FUNC_2) + mask = E1000_SWFW_PHY2_SM; + else if (hw->bus.func == E1000_FUNC_3) + mask = E1000_SWFW_PHY3_SM; + + return hw->mac.ops.acquire_swfw_sync(hw, mask); +} + +/** + * e1000_release_phy_base - Release rights to access PHY + * @hw: pointer to the HW structure + * + * A wrapper to release access rights to the correct PHY. + **/ +void e1000_release_phy_base(struct e1000_hw *hw) +{ + u16 mask = E1000_SWFW_PHY0_SM; + + DEBUGFUNC("e1000_release_phy_base"); + + if (hw->bus.func == E1000_FUNC_1) + mask = E1000_SWFW_PHY1_SM; + else if (hw->bus.func == E1000_FUNC_2) + mask = E1000_SWFW_PHY2_SM; + else if (hw->bus.func == E1000_FUNC_3) + mask = E1000_SWFW_PHY3_SM; + + hw->mac.ops.release_swfw_sync(hw, mask); +} + +/** + * e1000_init_hw_base - Initialize hardware + * @hw: pointer to the HW structure + * + * This inits the hardware readying it for operation. + **/ +s32 e1000_init_hw_base(struct e1000_hw *hw) +{ + struct e1000_mac_info *mac = &hw->mac; + s32 ret_val; + u16 i, rar_count = mac->rar_entry_count; + + DEBUGFUNC("e1000_init_hw_base"); + + /* Setup the receive address */ + e1000_init_rx_addrs_generic(hw, rar_count); + + /* Zero out the Multicast HASH table */ + DEBUGOUT("Zeroing the MTA\n"); + for (i = 0; i < mac->mta_reg_count; i++) + E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); + + /* Zero out the Unicast HASH table */ + DEBUGOUT("Zeroing the UTA\n"); + for (i = 0; i < mac->uta_reg_count; i++) + E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0); + + /* Setup link and flow control */ + ret_val = mac->ops.setup_link(hw); + + /* Clear all of the statistics registers (clear on read). It is + * important that we do this after we have tried to establish link + * because the symbol error count will increment wildly if there + * is no link. + */ + e1000_clear_hw_cntrs_base_generic(hw); + + return ret_val; +} + +/** + * e1000_power_down_phy_copper_base - Remove link during PHY power down + * @hw: pointer to the HW structure + * + * In the case of a PHY power down to save power, or to turn off link during a + * driver unload, or wake on lan is not enabled, remove the link. + **/ +void e1000_power_down_phy_copper_base(struct e1000_hw *hw) +{ + struct e1000_phy_info *phy = &hw->phy; + + if (!(phy->ops.check_reset_block)) + return; + + /* If the management interface is not enabled, then power down */ + if (phy->ops.check_reset_block(hw)) + e1000_power_down_phy_copper(hw); +} + +/** + * e1000_rx_fifo_flush_base - Clean Rx FIFO after Rx enable + * @hw: pointer to the HW structure + * + * After Rx enable, if manageability is enabled then there is likely some + * bad data at the start of the FIFO and possibly in the DMA FIFO. This + * function clears the FIFOs and flushes any packets that came in as Rx was + * being enabled. + **/ +void e1000_rx_fifo_flush_base(struct e1000_hw *hw) +{ + u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled; + int i, ms_wait; + + DEBUGFUNC("e1000_rx_fifo_flush_base"); + + /* disable IPv6 options as per hardware errata */ + rfctl = E1000_READ_REG(hw, E1000_RFCTL); + rfctl |= E1000_RFCTL_IPV6_EX_DIS; + E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); + + if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN)) + return; + + /* Disable all Rx queues */ + for (i = 0; i < 4; i++) { + rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i)); + E1000_WRITE_REG(hw, E1000_RXDCTL(i), + rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE); + } + /* Poll all queues to verify they have shut down */ + for (ms_wait = 0; ms_wait < 10; ms_wait++) { + msec_delay(1); + rx_enabled = 0; + for (i = 0; i < 4; i++) + rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i)); + if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE)) + break; + } + + if (ms_wait == 10) + DEBUGOUT("Queue disable timed out after 10ms\n"); + + /* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all + * incoming packets are rejected. Set enable and wait 2ms so that + * any packet that was coming in as RCTL.EN was set is flushed + */ + E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF); + + rlpml = E1000_READ_REG(hw, E1000_RLPML); + E1000_WRITE_REG(hw, E1000_RLPML, 0); + + rctl = E1000_READ_REG(hw, E1000_RCTL); + temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP); + temp_rctl |= E1000_RCTL_LPE; + + E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl); + E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN); + E1000_WRITE_FLUSH(hw); + msec_delay(2); + + /* Enable Rx queues that were previously enabled and restore our + * previous state + */ + for (i = 0; i < 4; i++) + E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]); + E1000_WRITE_REG(hw, E1000_RCTL, rctl); + E1000_WRITE_FLUSH(hw); + + E1000_WRITE_REG(hw, E1000_RLPML, rlpml); + E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); + + /* Flush receive errors generated by workaround */ + E1000_READ_REG(hw, E1000_ROC); + E1000_READ_REG(hw, E1000_RNBC); + E1000_READ_REG(hw, E1000_MPC); +} diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_base.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_base.h new file mode 100644 index 0000000000..dca16cd3cf --- /dev/null +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_base.h @@ -0,0 +1,158 @@ +/****************************************************************************** + SPDX-License-Identifier: BSD-3-Clause + + Copyright (c) 2001-2020, Intel Corporation + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +******************************************************************************/ +/*$FreeBSD$*/ + +#ifndef _E1000_BASE_H_ +#define _E1000_BASE_H_ + +/* forward declaration */ +s32 e1000_init_hw_base(struct e1000_hw *hw); +void e1000_power_down_phy_copper_base(struct e1000_hw *hw); +extern void e1000_rx_fifo_flush_base(struct e1000_hw *hw); +s32 e1000_acquire_phy_base(struct e1000_hw *hw); +void e1000_release_phy_base(struct e1000_hw *hw); + +/* Transmit Descriptor - Advanced */ +union e1000_adv_tx_desc { + struct { + __le64 buffer_addr; /* Address of descriptor's data buf */ + __le32 cmd_type_len; + __le32 olinfo_status; + } read; + struct { + __le64 rsvd; /* Reserved */ + __le32 nxtseq_seed; + __le32 status; + } wb; +}; + +/* Context descriptors */ +struct e1000_adv_tx_context_desc { + __le32 vlan_macip_lens; + union { + __le32 launch_time; + __le32 seqnum_seed; + } u; + __le32 type_tucmd_mlhl; + __le32 mss_l4len_idx; +}; + +/* Adv Transmit Descriptor Config Masks */ +#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */ +#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ +#define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */ +#define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */ +#define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */ +#define E1000_ADVTXD_DCMD_DDTYP_ISCSI 0x10000000 /* DDP hdr type or iSCSI */ +#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */ +#define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */ +#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */ +#define E1000_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */ +#define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp pkt */ +#define E1000_ADVTXD_STAT_SN_CRC 0x00000002 /* NXTSEQ/SEED prsnt in WB */ +#define E1000_ADVTXD_IDX_SHIFT 4 /* Adv desc Index shift */ +#define E1000_ADVTXD_POPTS_ISCO_1ST 0x00000000 /* 1st TSO of iSCSI PDU */ +#define E1000_ADVTXD_POPTS_ISCO_MDL 0x00000800 /* Middle TSO of iSCSI PDU */ +#define E1000_ADVTXD_POPTS_ISCO_LAST 0x00001000 /* Last TSO of iSCSI PDU */ +/* 1st & Last TSO-full iSCSI PDU*/ +#define E1000_ADVTXD_POPTS_ISCO_FULL 0x00001800 +#define E1000_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */ +#define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */ + +/* Advanced Transmit Context Descriptor Config */ +#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */ +#define E1000_ADVTXD_VLAN_SHIFT 16 /* Adv ctxt vlan tag shift */ +#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */ +#define E1000_ADVTXD_TUCMD_IPV6 0x00000000 /* IP Packet Type: 0=IPv6 */ +#define E1000_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE of UDP */ +#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */ +#define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 Packet TYPE of SCTP */ +#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */ +/* IPSec Encrypt Enable for ESP */ +#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN 0x00004000 +/* Req requires Markers and CRC */ +#define E1000_ADVTXD_TUCMD_MKRREQ 0x00002000 +#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ +#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ +/* Adv ctxt IPSec SA IDX mask */ +#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK 0x000000FF +/* Adv ctxt IPSec ESP len mask */ +#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK 0x000000FF + +#define E1000_RAR_ENTRIES_BASE 16 + +/* Receive Descriptor - Advanced */ +union e1000_adv_rx_desc { + struct { + __le64 pkt_addr; /* Packet buffer address */ + __le64 hdr_addr; /* Header buffer address */ + } read; + struct { + struct { + union { + __le32 data; + struct { + __le16 pkt_info; /*RSS type, Pkt type*/ + /* Split Header, header buffer len */ + __le16 hdr_info; + } hs_rss; + } lo_dword; + union { + __le32 rss; /* RSS Hash */ + struct { + __le16 ip_id; /* IP id */ + __le16 csum; /* Packet Checksum */ + } csum_ip; + } hi_dword; + } lower; + struct { + __le32 status_error; /* ext status/error */ + __le16 length; /* Packet length */ + __le16 vlan; /* VLAN tag */ + } upper; + } wb; /* writeback */ +}; + +/* Additional Transmit Descriptor Control definitions */ +#define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */ + +/* Additional Receive Descriptor Control definitions */ +#define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Rx Queue */ + +/* SRRCTL bit definitions */ +#define E1000_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */ +#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */ +#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000 + +#endif /* _E1000_BASE_H_ */ diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_defines.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_defines.h index 722596b36e..44281a0fad 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_defines.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_defines.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -281,6 +281,7 @@ #define E1000_CTRL_SWDPIO0 0x00400000 /* SWDPIN 0 Input or output */ #define E1000_CTRL_SWDPIO2 0x01000000 /* SWDPIN 2 input or output */ #define E1000_CTRL_SWDPIO3 0x02000000 /* SWDPIN 3 input or output */ +#define E1000_CTRL_DEV_RST 0x20000000 /* Device reset */ #define E1000_CTRL_RST 0x04000000 /* Global reset */ #define E1000_CTRL_RFCE 0x08000000 /* Receive Flow Control enable */ #define E1000_CTRL_TFCE 0x10000000 /* Transmit flow control enable */ @@ -345,6 +346,7 @@ #define E1000_STATUS_PCIX_SPEED_66 0x00000000 /* PCI-X bus spd 50-66MHz */ #define E1000_STATUS_PCIX_SPEED_100 0x00004000 /* PCI-X bus spd 66-100MHz */ #define E1000_STATUS_PCIX_SPEED_133 0x00008000 /* PCI-X bus spd 100-133MHz*/ +#define E1000_STATUS_PCIM_STATE 0x40000000 /* PCIm function state */ #define SPEED_10 10 #define SPEED_100 100 @@ -428,11 +430,12 @@ #define E1000_SCTL_ENABLE_SERDES_LOOPBACK 0x0410 /* Receive Checksum Control */ -#define E1000_RXCSUM_IPOFL 0x00000100 /* IPv4 checksum offload */ -#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */ -#define E1000_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */ -#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ -#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */ +#define E1000_RXCSUM_IPOFL 0x00000100 /* IPv4 checksum offload */ +#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */ +#define E1000_RXCSUM_IPV6OFL 0x00000400 /* lem(4) IPv6 checksum offload */ +#define E1000_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */ +#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ +#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */ /* Header split receive */ #define E1000_RFCTL_NFSW_DIS 0x00000040 @@ -444,8 +447,8 @@ #define E1000_RFCTL_LEF 0x00040000 /* Collision related configuration parameters */ -#define E1000_COLLISION_THRESHOLD 15 #define E1000_CT_SHIFT 4 +#define E1000_COLLISION_THRESHOLD 15 #define E1000_COLLISION_DISTANCE 63 #define E1000_COLD_SHIFT 12 @@ -803,6 +806,17 @@ #define E1000_TIMINCA_INCPERIOD_SHIFT 24 #define E1000_TIMINCA_INCVALUE_MASK 0x00FFFFFF +/* ETQF register bit definitions */ +#define E1000_ETQF_1588 (1 << 30) +#define E1000_FTQF_VF_BP 0x00008000 +#define E1000_FTQF_1588_TIME_STAMP 0x08000000 +#define E1000_FTQF_MASK 0xF0000000 +#define E1000_FTQF_MASK_PROTO_BP 0x10000000 +/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */ +#define E1000_IMIREXT_CTRL_BP 0x00080000 /* Bypass check of ctrl bits */ +#define E1000_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */ + +#define E1000_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */ #define E1000_TSICR_TXTS 0x00000002 #define E1000_TSIM_TXTS 0x00000002 /* TUPLE Filtering Configuration */ @@ -1069,11 +1083,44 @@ /* NVM Word Offsets */ #define NVM_COMPAT 0x0003 #define NVM_ID_LED_SETTINGS 0x0004 +#define NVM_VERSION 0x0005 #define NVM_SERDES_AMPLITUDE 0x0006 /* SERDES output amplitude */ #define NVM_PHY_CLASS_WORD 0x0007 #define E1000_I210_NVM_FW_MODULE_PTR 0x0010 #define E1000_I350_NVM_FW_MODULE_PTR 0x0051 #define NVM_FUTURE_INIT_WORD1 0x0019 +#define NVM_ETRACK_WORD 0x0042 +#define NVM_ETRACK_HIWORD 0x0043 +#define NVM_COMB_VER_OFF 0x0083 +#define NVM_COMB_VER_PTR 0x003d + +/* NVM version defines */ +#define NVM_MAJOR_MASK 0xF000 +#define NVM_MINOR_MASK 0x0FF0 +#define NVM_IMAGE_ID_MASK 0x000F +#define NVM_COMB_VER_MASK 0x00FF +#define NVM_MAJOR_SHIFT 12 +#define NVM_MINOR_SHIFT 4 +#define NVM_COMB_VER_SHFT 8 +#define NVM_VER_INVALID 0xFFFF +#define NVM_ETRACK_SHIFT 16 +#define NVM_ETRACK_VALID 0x8000 +#define NVM_NEW_DEC_MASK 0x0F00 +#define NVM_HEX_CONV 16 +#define NVM_HEX_TENS 10 + +/* FW version defines */ +/* Offset of "Loader patch ptr" in Firmware Header */ +#define E1000_I350_NVM_FW_LOADER_PATCH_PTR_OFFSET 0x01 +/* Patch generation hour & minutes */ +#define E1000_I350_NVM_FW_VER_WORD1_OFFSET 0x04 +/* Patch generation month & day */ +#define E1000_I350_NVM_FW_VER_WORD2_OFFSET 0x05 +/* Patch generation year */ +#define E1000_I350_NVM_FW_VER_WORD3_OFFSET 0x06 +/* Patch major & minor numbers */ +#define E1000_I350_NVM_FW_VER_WORD4_OFFSET 0x07 + #define NVM_MAC_ADDR 0x0000 #define NVM_SUB_DEV_ID 0x000B #define NVM_SUB_VEN_ID 0x000C @@ -1372,6 +1419,7 @@ #define E1000_MDIC_ERROR 0x40000000 #define E1000_MDIC_DEST 0x80000000 +#define E1000_VFTA_BLOCK_SIZE 8 /* SerDes Control */ #define E1000_GEN_CTL_READY 0x80000000 #define E1000_GEN_CTL_ADDRESS_SHIFT 8 diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_hw.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_hw.h index f521c2c8c5..6ee252e147 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_hw.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_hw.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -161,6 +161,20 @@ struct e1000_hw; #define E1000_DEV_ID_PCH_CMP_I219_V11 0x0D4D #define E1000_DEV_ID_PCH_CMP_I219_LM12 0x0D53 #define E1000_DEV_ID_PCH_CMP_I219_V12 0x0D55 +#define E1000_DEV_ID_PCH_TGP_I219_LM13 0x15FB +#define E1000_DEV_ID_PCH_TGP_I219_V13 0x15FC +#define E1000_DEV_ID_PCH_TGP_I219_LM14 0x15F9 +#define E1000_DEV_ID_PCH_TGP_I219_V14 0x15FA +#define E1000_DEV_ID_PCH_TGP_I219_LM15 0x15F4 +#define E1000_DEV_ID_PCH_TGP_I219_V15 0x15F5 +#define E1000_DEV_ID_PCH_ADL_I219_LM16 0x1A1E +#define E1000_DEV_ID_PCH_ADL_I219_V16 0x1A1F +#define E1000_DEV_ID_PCH_ADL_I219_LM17 0x1A1C +#define E1000_DEV_ID_PCH_ADL_I219_V17 0x1A1D +#define E1000_DEV_ID_PCH_MTP_I219_LM18 0x550A +#define E1000_DEV_ID_PCH_MTP_I219_V18 0x550B +#define E1000_DEV_ID_PCH_MTP_I219_LM19 0x550C +#define E1000_DEV_ID_PCH_MTP_I219_V19 0x550D #define E1000_DEV_ID_82576 0x10C9 #define E1000_DEV_ID_82576_FIBER 0x10E6 #define E1000_DEV_ID_82576_SERDES 0x10E7 @@ -195,6 +209,7 @@ struct e1000_hw; #define E1000_DEV_ID_I210_SGMII 0x1538 #define E1000_DEV_ID_I210_COPPER_FLASHLESS 0x157B #define E1000_DEV_ID_I210_SERDES_FLASHLESS 0x157C +#define E1000_DEV_ID_I210_SGMII_FLASHLESS 0x15F6 #define E1000_DEV_ID_I211_COPPER 0x1539 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS 0x1F40 #define E1000_DEV_ID_I354_SGMII 0x1F41 @@ -248,6 +263,9 @@ enum e1000_mac_type { e1000_pch_lpt, e1000_pch_spt, e1000_pch_cnp, + e1000_pch_tgp, + e1000_pch_adp, + e1000_pch_mtp, e1000_82575, e1000_82576, e1000_82580, @@ -257,7 +275,7 @@ enum e1000_mac_type { e1000_i211, e1000_vfadapt, e1000_vfadapt_i350, - e1000_num_macs /* List is 1-based, so subtract 1 for TRUE count. */ + e1000_num_macs /* List is 1-based, so subtract 1 for true count. */ }; enum e1000_media_type { @@ -980,7 +998,7 @@ struct e1000_dev_spec_ich8lan { enum e1000_ulp_state ulp_state; bool ulp_capability_disabled; bool during_suspend_flow; - bool during_dpg_exit; + bool smbus_disable; }; struct e1000_dev_spec_82575 { @@ -1041,6 +1059,7 @@ struct e1000_hw { #include "e1000_ich8lan.h" #include "e1000_82575.h" #include "e1000_i210.h" +#include "e1000_base.h" /* These functions must be implemented by drivers */ void e1000_pci_clear_mwi(struct e1000_hw *hw); diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.c index 8b1c8aa1b6..da2e786130 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -195,7 +195,9 @@ static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words, } for (i = 0; i < words; i++) { - eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) | + ret_val = -E1000_ERR_NVM; + + eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) | (data[i] << E1000_NVM_RW_REG_DATA) | E1000_NVM_RW_REG_START; @@ -281,9 +283,9 @@ static s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset, switch (offset) { case NVM_MAC_ADDR: ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]); - ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1, + ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1, &data[1]); - ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2, + ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2, &data[2]); if (ret_val != E1000_SUCCESS) DEBUGOUT("MAC Addr not found in iNVM\n"); @@ -343,6 +345,105 @@ static s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset, return ret_val; } +/** + * e1000_read_invm_version - Reads iNVM version and image type + * @hw: pointer to the HW structure + * @invm_ver: version structure for the version read + * + * Reads iNVM version and image type. + **/ +s32 e1000_read_invm_version(struct e1000_hw *hw, + struct e1000_fw_version *invm_ver) +{ + u32 *record = NULL; + u32 *next_record = NULL; + u32 i = 0; + u32 invm_dword = 0; + u32 invm_blocks = E1000_INVM_SIZE - (E1000_INVM_ULT_BYTES_SIZE / + E1000_INVM_RECORD_SIZE_IN_BYTES); + u32 buffer[E1000_INVM_SIZE]; + s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND; + u16 version = 0; + + DEBUGFUNC("e1000_read_invm_version"); + + /* Read iNVM memory */ + for (i = 0; i < E1000_INVM_SIZE; i++) { + invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i)); + buffer[i] = invm_dword; + } + + /* Read version number */ + for (i = 1; i < invm_blocks; i++) { + record = &buffer[invm_blocks - i]; + next_record = &buffer[invm_blocks - i + 1]; + + /* Check if we have first version location used */ + if ((i == 1) && ((*record & E1000_INVM_VER_FIELD_ONE) == 0)) { + version = 0; + status = E1000_SUCCESS; + break; + } + /* Check if we have second version location used */ + else if ((i == 1) && + ((*record & E1000_INVM_VER_FIELD_TWO) == 0)) { + version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3; + status = E1000_SUCCESS; + break; + } + /* + * Check if we have odd version location + * used and it is the last one used + */ + else if ((((*record & E1000_INVM_VER_FIELD_ONE) == 0) && + ((*record & 0x3) == 0)) || (((*record & 0x3) != 0) && + (i != 1))) { + version = (*next_record & E1000_INVM_VER_FIELD_TWO) + >> 13; + status = E1000_SUCCESS; + break; + } + /* + * Check if we have even version location + * used and it is the last one used + */ + else if (((*record & E1000_INVM_VER_FIELD_TWO) == 0) && + ((*record & 0x3) == 0)) { + version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3; + status = E1000_SUCCESS; + break; + } + } + + if (status == E1000_SUCCESS) { + invm_ver->invm_major = (version & E1000_INVM_MAJOR_MASK) + >> E1000_INVM_MAJOR_SHIFT; + invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK; + } + /* Read Image Type */ + for (i = 1; i < invm_blocks; i++) { + record = &buffer[invm_blocks - i]; + next_record = &buffer[invm_blocks - i + 1]; + + /* Check if we have image type in first location used */ + if ((i == 1) && ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) { + invm_ver->invm_img_type = 0; + status = E1000_SUCCESS; + break; + } + /* Check if we have image type in first location used */ + else if ((((*record & 0x3) == 0) && + ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) || + ((((*record & 0x3) != 0) && (i != 1)))) { + invm_ver->invm_img_type = + (*next_record & E1000_INVM_IMGTYPE_FIELD) >> 23; + status = E1000_SUCCESS; + break; + } + } + return status; +} + /** * e1000_validate_nvm_checksum_i210 - Validate EEPROM checksum * @hw: pointer to the HW structure @@ -451,14 +552,14 @@ out: bool e1000_get_flash_presence_i210(struct e1000_hw *hw) { u32 eec = 0; - bool ret_val = FALSE; + bool ret_val = false; DEBUGFUNC("e1000_get_flash_presence_i210"); eec = E1000_READ_REG(hw, E1000_EECD); if (eec & E1000_EECD_FLASH_DETECTED_I210) - ret_val = TRUE; + ret_val = true; return ret_val; } @@ -561,8 +662,6 @@ void e1000_init_function_pointers_i210(struct e1000_hw *hw) { e1000_init_function_pointers_82575(hw); hw->nvm.ops.init_params = e1000_init_nvm_params_i210; - - return; } /** @@ -600,77 +699,6 @@ out: return ret_val; } -/** - * __e1000_access_xmdio_reg - Read/write XMDIO register - * @hw: pointer to the HW structure - * @address: XMDIO address to program - * @dev_addr: device address to program - * @data: pointer to value to read/write from/to the XMDIO address - * @read: boolean flag to indicate read or write - **/ -static s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address, - u8 dev_addr, u16 *data, bool read) -{ - s32 ret_val; - - DEBUGFUNC("__e1000_access_xmdio_reg"); - - ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr); - if (ret_val) - return ret_val; - - ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address); - if (ret_val) - return ret_val; - - ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA | - dev_addr); - if (ret_val) - return ret_val; - - if (read) - ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data); - else - ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data); - if (ret_val) - return ret_val; - - /* Recalibrate the device back to 0 */ - ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0); - if (ret_val) - return ret_val; - - return ret_val; -} - -/** - * e1000_read_xmdio_reg - Read XMDIO register - * @hw: pointer to the HW structure - * @addr: XMDIO address to program - * @dev_addr: device address to program - * @data: value to be read from the EMI address - **/ -s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data) -{ - DEBUGFUNC("e1000_read_xmdio_reg"); - - return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, TRUE); -} - -/** - * e1000_write_xmdio_reg - Write XMDIO register - * @hw: pointer to the HW structure - * @addr: XMDIO address to program - * @dev_addr: device address to program - * @data: value to be written to the XMDIO address - **/ -s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data) -{ - DEBUGFUNC("e1000_read_xmdio_reg"); - - return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data, FALSE); -} - /** * e1000_pll_workaround_i210 * @hw: pointer to the HW structure @@ -685,6 +713,8 @@ static s32 e1000_pll_workaround_i210(struct e1000_hw *hw) u16 nvm_word, phy_word, pci_word, tmp_nvm; int i; + /* Get PHY semaphore */ + hw->phy.ops.acquire(hw); /* Get and set needed register values */ wuc = E1000_READ_REG(hw, E1000_WUC); mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG); @@ -697,10 +727,14 @@ static s32 e1000_pll_workaround_i210(struct e1000_hw *hw) if (ret_val != E1000_SUCCESS) nvm_word = E1000_INVM_DEFAULT_AL; tmp_nvm = nvm_word | E1000_INVM_PLL_WO_VAL; + phy_word = E1000_PHY_PLL_UNCONF; for (i = 0; i < E1000_MAX_PLL_TRIES; i++) { /* check current state directly from internal PHY */ - e1000_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE | - E1000_PHY_PLL_FREQ_REG), &phy_word); + e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0xFC); + usec_delay(20); + e1000_read_phy_reg_mdic(hw, E1000_PHY_PLL_FREQ_REG, &phy_word); + usec_delay(20); + e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0); if ((phy_word & E1000_PHY_PLL_UNCONF) != E1000_PHY_PLL_UNCONF) { ret_val = E1000_SUCCESS; @@ -734,6 +768,8 @@ static s32 e1000_pll_workaround_i210(struct e1000_hw *hw) } /* restore MDICNFG setting */ E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg); + /* Release PHY semaphore */ + hw->phy.ops.release(hw); return ret_val; } @@ -789,6 +825,6 @@ s32 e1000_init_hw_i210(struct e1000_hw *hw) /* Initialize identification LED */ mac->ops.id_led_init(hw); - ret_val = e1000_init_hw_82575(hw); + ret_val = e1000_init_hw_base(hw); return ret_val; } diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.h index ed6262b545..77414b851a 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_i210.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -44,10 +44,8 @@ s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); -s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, - u16 *data); -s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, - u16 data); +s32 e1000_read_invm_version(struct e1000_hw *hw, + struct e1000_fw_version *invm_ver); s32 e1000_init_hw_i210(struct e1000_hw *hw); #define E1000_STM_OPCODE 0xDB00 diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.c index b4f8b6a2b6..3f3e2307f8 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -242,7 +242,7 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) } if (ret_val) - return FALSE; + return false; out: if (hw->mac.type >= e1000_pch_lpt) { /* Only unforce SMBus if ME is not active */ @@ -260,7 +260,7 @@ out: } } - return TRUE; + return true; } /** @@ -324,7 +324,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) /* Gate automatic PHY configuration by hardware on managed and * non-managed 82579 and newer adapters. */ - e1000_gate_hw_phy_config_ich8lan(hw, TRUE); + e1000_gate_hw_phy_config_ich8lan(hw, true); /* It is not possible to be certain of the current state of ULP * so forcibly disable it. @@ -346,6 +346,9 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: if (e1000_phy_is_accessible_pchlan(hw)) break; @@ -362,12 +365,12 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) */ msec_delay(50); - /* fall-through */ + /* FALLTHROUGH */ case e1000_pch2lan: if (e1000_phy_is_accessible_pchlan(hw)) break; - /* fall-through */ + /* FALLTHROUGH */ case e1000_pchlan: if ((hw->mac.type == e1000_pchlan) && (fwsm & E1000_ICH_FWSM_FW_VALID)) @@ -436,7 +439,7 @@ out: if ((hw->mac.type == e1000_pch2lan) && !(fwsm & E1000_ICH_FWSM_FW_VALID)) { msec_delay(10); - e1000_gate_hw_phy_config_ich8lan(hw, FALSE); + e1000_gate_hw_phy_config_ich8lan(hw, false); } return ret_val; @@ -490,11 +493,14 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) return ret_val; if ((phy->id != 0) && (phy->id != PHY_REVISION_MASK)) break; - /* fall-through */ + /* FALLTHROUGH */ case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: /* In case the PHY needs to be in mdio slow mode, * set slow mode and try to get the PHY id again. */ @@ -693,7 +699,7 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw) /* Clear shadow ram */ for (i = 0; i < nvm->word_size; i++) { - dev_spec->shadow_ram[i].modified = FALSE; + dev_spec->shadow_ram[i].modified = false; dev_spec->shadow_ram[i].value = 0xFFFF; } @@ -737,13 +743,13 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) if (mac->type == e1000_ich8lan) mac->rar_entry_count--; /* Set if part includes ASF firmware */ - mac->asf_firmware_present = TRUE; + mac->asf_firmware_present = true; /* FWSM register */ - mac->has_fwsm = TRUE; + mac->has_fwsm = true; /* ARC subsystem not supported */ - mac->arc_subsystem_valid = FALSE; + mac->arc_subsystem_valid = false; /* Adaptive IFS supported */ - mac->adaptive_ifs = TRUE; + mac->adaptive_ifs = true; /* Function pointers */ @@ -790,14 +796,17 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) case e1000_pch2lan: mac->rar_entry_count = E1000_PCH2_RAR_ENTRIES; mac->ops.rar_set = e1000_rar_set_pch2lan; - /* fall-through */ + /* FALLTHROUGH */ case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: /* multicast address update for pch2 */ mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_pch2lan; - /* fall-through */ + /* FALLTHROUGH */ case e1000_pchlan: /* check management mode */ mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan; @@ -824,7 +833,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) /* Enable PCS Lock-loss workaround for ICH8 */ if (mac->type == e1000_ich8lan) - e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, TRUE); + e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, true); return E1000_SUCCESS; } @@ -832,7 +841,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) /** * __e1000_access_emi_reg_locked - Read/write EMI register * @hw: pointer to the HW structure - * @addr: EMI address to program + * @address: EMI address to program * @data: pointer to value to read/write from/to the EMI address * @read: boolean flag to indicate read or write * @@ -871,7 +880,7 @@ s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data) { DEBUGFUNC("e1000_read_emi_reg_locked"); - return __e1000_access_emi_reg_locked(hw, addr, data, TRUE); + return __e1000_access_emi_reg_locked(hw, addr, data, true); } /** @@ -886,7 +895,7 @@ s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data) { DEBUGFUNC("e1000_read_emi_reg_locked"); - return __e1000_access_emi_reg_locked(hw, addr, &data, FALSE); + return __e1000_access_emi_reg_locked(hw, addr, &data, false); } /** @@ -1103,7 +1112,7 @@ static u64 e1000_ltr2ns(u16 ltr) * GbE MAC in the Lynx Point PCH based on Rx buffer size and link speed * when link is up (which must not exceed the maximum latency supported * by the platform), otherwise specify there is no LTR requirement. - * Unlike TRUE-PCIe devices which set the LTR maximum snoop/no-snoop + * Unlike true-PCIe devices which set the LTR maximum snoop/no-snoop * latencies in the LTR Extended Capability Structure in the PCIe Extended * Capability register set, on this device LTR is set by writing the * equivalent snoop/no-snoop latencies in the LTRV register in the MAC and @@ -1298,6 +1307,10 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx) (E1000_READ_REG(hw, E1000_FEXT) & E1000_FEXT_PHY_CABLE_DISCONNECTED) ? "" : "not", i * 50); + if (!(E1000_READ_REG(hw, E1000_FEXT) & + E1000_FEXT_PHY_CABLE_DISCONNECTED)) + return 0; + } ret_val = hw->phy.ops.acquire(hw); @@ -1397,13 +1410,14 @@ out: * If not on an ME enabled system, un-configure the ULP mode by software. * * During nominal operation, this function is called when link is acquired - * to disable ULP mode (force=FALSE); otherwise, for example when unloading - * the driver or during Sx->S0 transitions, this is called with force=TRUE + * to disable ULP mode (force=false); otherwise, for example when unloading + * the driver or during Sx->S0 transitions, this is called with force=true * to forcibly disable ULP. */ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force) { s32 ret_val = E1000_SUCCESS; + u8 ulp_exit_timeout = 30; u32 mac_reg; u16 phy_reg; int i = 0; @@ -1425,10 +1439,12 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force) E1000_WRITE_REG(hw, E1000_H2ME, mac_reg); } - /* Poll up to 300msec for ME to clear ULP_CFG_DONE. */ + if (hw->mac.type == e1000_pch_cnp) + ulp_exit_timeout = 100; + while (E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_ULP_CFG_DONE) { - if (i++ == 30) { + if (i++ == ulp_exit_timeout) { ret_val = -E1000_ERR_PHY; goto out; } @@ -1610,8 +1626,6 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) if (hw->mac.type >= e1000_pch_lpt) { - u16 phy_reg; - hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG, &phy_reg); phy_reg &= ~I217_PLL_CLOCK_GATE_MASK; @@ -1714,7 +1728,6 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) if (ret_val) return ret_val; } - /* Clear link partner's EEE ability */ hw->dev_spec.ich8lan.eee_lp_ability = 0; @@ -1731,23 +1744,26 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE; } - if (hw->dev_spec.ich8lan.disable_k1_off == TRUE) + if (hw->dev_spec.ich8lan.disable_k1_off == true) fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE; E1000_WRITE_REG(hw, E1000_FEXTNVM6, fextnvm6); + + /* Configure K0s minimum time */ + e1000_configure_k0s_lpt(hw, K1_ENTRY_LATENCY, K1_MIN_TIME); } if (!link) return E1000_SUCCESS; /* No link detected */ - mac->get_link_status = FALSE; + mac->get_link_status = false; switch (hw->mac.type) { case e1000_pch2lan: ret_val = e1000_k1_workaround_lv(hw); if (ret_val) return ret_val; - /* fall-thru */ + /* FALLTHROUGH */ case e1000_pchlan: if (hw->phy.type == e1000_phy_82578) { ret_val = e1000_link_stall_workaround_hv(hw); @@ -1832,6 +1848,9 @@ void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: hw->phy.ops.init_params = e1000_init_phy_params_pchlan; break; default: @@ -2192,7 +2211,7 @@ release: static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw) { u32 fwsm; - bool blocked = FALSE; + bool blocked = false; int i = 0; DEBUGFUNC("e1000_check_reset_block_ich8lan"); @@ -2200,11 +2219,11 @@ static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw) do { fwsm = E1000_READ_REG(hw, E1000_FWSM); if (!(fwsm & E1000_ICH_FWSM_RSPCIPHY)) { - blocked = TRUE; + blocked = true; msec_delay(10); continue; } - blocked = FALSE; + blocked = false; } while (blocked && (i++ < 30)); return blocked ? E1000_BLK_PHY_RESET : E1000_SUCCESS; } @@ -2282,12 +2301,15 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; break; } - /* Fall-thru */ + /* FALLTHROUGH */ case e1000_pchlan: case e1000_pch2lan: case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; break; default: @@ -2415,7 +2437,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link) if (status_reg == (BM_CS_STATUS_LINK_UP | BM_CS_STATUS_RESOLVED | BM_CS_STATUS_SPEED_1000)) - k1_enable = FALSE; + k1_enable = false; } if (hw->phy.type == e1000_phy_82577) { @@ -2431,7 +2453,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link) if (status_reg == (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE | HV_M_STATUS_SPEED_1000)) - k1_enable = FALSE; + k1_enable = false; } /* Link stall fix for link up */ @@ -2459,7 +2481,7 @@ release: /** * e1000_configure_k1_ich8lan - Configure K1 power state * @hw: pointer to the HW structure - * @enable: K1 state to configure + * @k1_enable: K1 state to configure * * Configure the K1 power state based on the provided parameter. * Assumes semaphore already acquired. @@ -2607,6 +2629,7 @@ static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw) /** * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be * done after every PHY reset. + * @hw: pointer to the HW structure **/ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) { @@ -2667,7 +2690,7 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) /* Configure the K1 Si workaround during phy reset assuming there is * link so that it disables K1 if link is in 1Gbps. */ - ret_val = e1000_k1_gig_workaround_hv(hw, TRUE); + ret_val = e1000_k1_gig_workaround_hv(hw, true); if (ret_val) return ret_val; @@ -2928,6 +2951,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) /** * e1000_lv_phy_workarounds_ich8lan - A series of Phy workarounds to be * done after every PHY reset. + * @hw: pointer to the HW structure **/ static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw) { @@ -3011,7 +3035,7 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw) /** * e1000_gate_hw_phy_config_ich8lan - disable PHY config via hardware * @hw: pointer to the HW structure - * @gate: boolean set to TRUE to gate, FALSE to ungate + * @gate: boolean set to true to gate, false to ungate * * Gate/ungate the automatic PHY configuration via hardware; perform * the configuration via software instead. @@ -3114,14 +3138,14 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw) return ret_val; /* Configure the LCD with the OEM bits in NVM */ - ret_val = e1000_oem_bits_config_ich8lan(hw, TRUE); + ret_val = e1000_oem_bits_config_ich8lan(hw, true); if (hw->mac.type == e1000_pch2lan) { /* Ungate automatic PHY configuration on non-managed 82579 */ if (!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID)) { msec_delay(10); - e1000_gate_hw_phy_config_ich8lan(hw, FALSE); + e1000_gate_hw_phy_config_ich8lan(hw, false); } /* Set EEE LPI Update Timer to 200usec */ @@ -3154,7 +3178,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) /* Gate automatic PHY configuration by hardware on non-managed 82579 */ if ((hw->mac.type == e1000_pch2lan) && !(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID)) - e1000_gate_hw_phy_config_ich8lan(hw, TRUE); + e1000_gate_hw_phy_config_ich8lan(hw, true); ret_val = e1000_phy_hw_reset_generic(hw); if (ret_val) @@ -3166,7 +3190,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) /** * e1000_set_lplu_state_pchlan - Set Low Power Link Up state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU state according to the active flag. For PCH, if OEM write * bit are disabled in the NVM, writing the LPLU bits in the MAC will not set @@ -3198,7 +3222,7 @@ static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active) /** * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D0 state according to the active flag. When * activating LPLU this function also disables smart speed @@ -3294,7 +3318,7 @@ static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active) /** * e1000_set_d3_lplu_state_ich8lan - Set Low Power Linkup D3 state * @hw: pointer to the HW structure - * @active: TRUE to enable LPLU, FALSE to disable + * @active: true to enable LPLU, false to disable * * Sets the LPLU D3 state according to the active flag. When * activating LPLU this function also disables smart speed @@ -3408,6 +3432,9 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank) switch (hw->mac.type) { case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: bank1_offset = nvm->flash_bank_size; act_offset = E1000_ICH_NVM_SIG_WORD; @@ -3454,7 +3481,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank) return E1000_SUCCESS; } DEBUGOUT("Unable to determine valid NVM bank via EEC - reading flash signature\n"); - /* fall-thru */ + /* FALLTHROUGH */ default: /* set bank to 0 in case flash read fails */ *bank = 0; @@ -3532,8 +3559,9 @@ static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words, for (i = 0; i < words; i += 2) { if (words - i == 1) { - if (dev_spec->shadow_ram[offset+i].modified) { - data[i] = dev_spec->shadow_ram[offset+i].value; + if (dev_spec->shadow_ram[offset + i].modified) { + data[i] = + dev_spec->shadow_ram[offset + i].value; } else { offset_to_read = act_offset + i - ((act_offset + i) % 2); @@ -3550,8 +3578,8 @@ static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words, } } else { offset_to_read = act_offset + i; - if (!(dev_spec->shadow_ram[offset+i].modified) || - !(dev_spec->shadow_ram[offset+i+1].modified)) { + if (!(dev_spec->shadow_ram[offset + i].modified) || + !(dev_spec->shadow_ram[offset + i + 1].modified)) { ret_val = e1000_read_flash_dword_ich8lan(hw, offset_to_read, @@ -3559,15 +3587,16 @@ static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words, if (ret_val) break; } - if (dev_spec->shadow_ram[offset+i].modified) - data[i] = dev_spec->shadow_ram[offset+i].value; + if (dev_spec->shadow_ram[offset + i].modified) + data[i] = + dev_spec->shadow_ram[offset + i].value; else - data[i] = (u16) (dword & 0xFFFF); - if (dev_spec->shadow_ram[offset+i].modified) - data[i+1] = - dev_spec->shadow_ram[offset+i+1].value; + data[i] = (u16)(dword & 0xFFFF); + if (dev_spec->shadow_ram[offset + i + 1].modified) + data[i + 1] = + dev_spec->shadow_ram[offset + i + 1].value; else - data[i+1] = (u16) (dword >> 16 & 0xFFFF); + data[i + 1] = (u16)(dword >> 16 & 0xFFFF); } } @@ -3621,8 +3650,8 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, ret_val = E1000_SUCCESS; for (i = 0; i < words; i++) { - if (dev_spec->shadow_ram[offset+i].modified) { - data[i] = dev_spec->shadow_ram[offset+i].value; + if (dev_spec->shadow_ram[offset + i].modified) { + data[i] = dev_spec->shadow_ram[offset + i].value; } else { ret_val = e1000_read_flash_word_ich8lan(hw, act_offset + i, @@ -4027,8 +4056,8 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, nvm->ops.acquire(hw); for (i = 0; i < words; i++) { - dev_spec->shadow_ram[offset+i].modified = TRUE; - dev_spec->shadow_ram[offset+i].value = data[i]; + dev_spec->shadow_ram[offset + i].modified = true; + dev_spec->shadow_ram[offset + i].value = data[i]; } nvm->ops.release(hw); @@ -4176,7 +4205,7 @@ static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw) /* Great! Everything worked, we can now clear the cached entries. */ for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { - dev_spec->shadow_ram[i].modified = FALSE; + dev_spec->shadow_ram[i].modified = false; dev_spec->shadow_ram[i].value = 0xFFFF; } @@ -4329,7 +4358,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) /* Great! Everything worked, we can now clear the cached entries. */ for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { - dev_spec->shadow_ram[i].modified = FALSE; + dev_spec->shadow_ram[i].modified = false; dev_spec->shadow_ram[i].value = 0xFFFF; } @@ -4377,6 +4406,9 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: word = NVM_COMPAT; valid_csum_mask = NVM_COMPAT_VALID_CSUM; break; @@ -4940,6 +4972,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) u16 kum_cfg; u32 ctrl, reg; s32 ret_val; + u16 pci_cfg; DEBUGFUNC("e1000_reset_hw_ich8lan"); @@ -4978,9 +5011,9 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) return ret_val; if (kum_cfg & E1000_NVM_K1_ENABLE) - dev_spec->nvm_k1_enabled = TRUE; + dev_spec->nvm_k1_enabled = true; else - dev_spec->nvm_k1_enabled = FALSE; + dev_spec->nvm_k1_enabled = false; } ctrl = E1000_READ_REG(hw, E1000_CTRL); @@ -4997,14 +5030,31 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) */ if ((hw->mac.type == e1000_pch2lan) && !(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID)) - e1000_gate_hw_phy_config_ich8lan(hw, TRUE); + e1000_gate_hw_phy_config_ich8lan(hw, true); } ret_val = e1000_acquire_swflag_ich8lan(hw); + + /* Read from EXTCNF_CTRL in e1000_acquire_swflag_ich8lan function + * may occur during global reset and cause system hang. + * Configuration space access creates the needed delay. + * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER value + * insures configuration space read is done before global reset. + */ + e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg); + E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg); DEBUGOUT("Issuing a global reset to ich8lan\n"); E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_RST)); /* cannot issue a flush here because it hangs the hardware */ msec_delay(20); + /* Configuration space access improve HW level time sync mechanism. + * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER + * value to insure configuration space read is done + * before any access to mac register. + */ + e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg); + E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg); + /* Set Phy Config Counter to 50msec */ if (hw->mac.type == e1000_pch2lan) { reg = E1000_READ_REG(hw, E1000_FEXTNVM3); @@ -5489,8 +5539,8 @@ static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw) * @hw: pointer to the HW structure * @state: boolean value used to set the current Kumeran workaround state * - * If ICH8, set the current Kumeran workaround state (enabled - TRUE - * /disabled - FALSE). + * If ICH8, set the current Kumeran workaround state (enabled - true + * /disabled - false). **/ void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, bool state) @@ -5576,7 +5626,7 @@ void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw) void e1000_gig_downshift_workaround_ich8lan(struct e1000_hw *hw) { s32 ret_val; - u16 reg_data; + u16 reg_data = 0; DEBUGFUNC("e1000_gig_downshift_workaround_ich8lan"); @@ -5721,7 +5771,7 @@ out: e1000_gig_downshift_workaround_ich8lan(hw); if (hw->mac.type >= e1000_pchlan) { - e1000_oem_bits_config_ich8lan(hw, FALSE); + e1000_oem_bits_config_ich8lan(hw, false); /* Reset PHY to activate OEM bits on 82577/8 */ if (hw->mac.type == e1000_pchlan) @@ -6096,3 +6146,44 @@ release: } } +/** + * e1000_configure_k0s_lpt - Configure K0s power state + * @hw: pointer to the HW structure + * @entry_latency: Tx idle period for entering K0s - valid values are 0 to 3. + * 0 corresponds to 128ns, each value over 0 doubles the duration. + * @min_time: Minimum Tx idle period allowed - valid values are 0 to 4. + * 0 corresponds to 128ns, each value over 0 doubles the duration. + * + * Configure the K1 power state based on the provided parameter. + * Assumes semaphore already acquired. + * + * Success returns 0, Failure returns: + * -E1000_ERR_PHY (-2) in case of access error + * -E1000_ERR_PARAM (-4) in case of parameters error + **/ +s32 e1000_configure_k0s_lpt(struct e1000_hw *hw, u8 entry_latency, u8 min_time) +{ + s32 ret_val; + u16 kmrn_reg = 0; + + DEBUGFUNC("e1000_configure_k0s_lpt"); + + if (entry_latency > 3 || min_time > 4) + return -E1000_ERR_PARAM; + + ret_val = e1000_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K0S_CTRL, + &kmrn_reg); + if (ret_val) + return ret_val; + + /* for now don't touch the latency */ + kmrn_reg &= ~(E1000_KMRNCTRLSTA_K0S_CTRL_MIN_TIME_MASK); + kmrn_reg |= ((min_time << E1000_KMRNCTRLSTA_K0S_CTRL_MIN_TIME_SHIFT)); + + ret_val = e1000_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K0S_CTRL, + kmrn_reg); + if (ret_val) + return ret_val; + + return E1000_SUCCESS; +} diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.h index db37aab7a3..dfa7684f27 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_ich8lan.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -113,11 +113,12 @@ #define E1000_FEXTNVM7_DISABLE_PB_READ 0x00040000 #define E1000_FEXTNVM7_SIDE_CLK_UNGATE 0x00000004 #define E1000_FEXTNVM7_DISABLE_SMB_PERST 0x00000020 +#define E1000_FEXTNVM8_UNBIND_DPG_FROM_MPHY 0x00000400 #define E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS 0x00000800 #define E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS 0x00001000 #define E1000_FEXTNVM11_DISABLE_PB_READ 0x00000200 #define E1000_FEXTNVM11_DISABLE_MULR_FIX 0x00002000 - +#define E1000_FEXTNVM12_DONT_WAK_DPG_CLKREQ 0x00001000 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */ #define E1000_RXDCTL_THRESH_UNIT_DESC 0x01000000 @@ -327,6 +328,8 @@ #define E1000_SVCR_OFF_TIMER_SHIFT 16 #define E1000_SVT_OFF_HWM_MASK 0x0000001F +#define E1000_PCI_VENDOR_ID_REGISTER 0x00 + void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, bool state); void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); @@ -334,6 +337,7 @@ void e1000_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw); u32 e1000_resume_workarounds_pchlan(struct e1000_hw *hw); s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable); +s32 e1000_configure_k0s_lpt(struct e1000_hw *hw, u8 entry_latency, u8 min_time); void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw); s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable); s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data); diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.c index bd597674bf..b8b8a49195 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -38,7 +38,6 @@ static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw); static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw); static void e1000_config_collision_dist_generic(struct e1000_hw *hw); -static int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index); /** * e1000_init_mac_ops_generic - Initialize MAC function pointers @@ -105,6 +104,8 @@ void e1000_null_mac_generic(struct e1000_hw E1000_UNUSEDARG *hw) /** * e1000_null_link_info - No-op function, return 0 * @hw: pointer to the HW structure + * @s: dummy variable + * @d: dummy variable **/ s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw, u16 E1000_UNUSEDARG *s, u16 E1000_UNUSEDARG *d) @@ -114,18 +115,20 @@ s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw, } /** - * e1000_null_mng_mode - No-op function, return FALSE + * e1000_null_mng_mode - No-op function, return false * @hw: pointer to the HW structure **/ bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw) { DEBUGFUNC("e1000_null_mng_mode"); - return FALSE; + return false; } /** * e1000_null_update_mc - No-op function, return void * @hw: pointer to the HW structure + * @h: dummy variable + * @a: dummy variable **/ void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw, u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a) @@ -137,6 +140,8 @@ void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw, /** * e1000_null_write_vfta - No-op function, return void * @hw: pointer to the HW structure + * @a: dummy variable + * @b: dummy variable **/ void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw, u32 E1000_UNUSEDARG a, u32 E1000_UNUSEDARG b) @@ -148,6 +153,8 @@ void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw, /** * e1000_null_rar_set - No-op function, return 0 * @hw: pointer to the HW structure + * @h: dummy variable + * @a: dummy variable **/ int e1000_null_rar_set(struct e1000_hw E1000_UNUSEDARG *hw, u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a) @@ -476,7 +483,7 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) * Sets the receive address array register at index to the address passed * in by addr. **/ -static int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) +int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) { u32 rar_low, rar_high; @@ -734,7 +741,7 @@ s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw) if (!link) return E1000_SUCCESS; /* No link detected */ - mac->get_link_status = FALSE; + mac->get_link_status = false; /* Check if there was DownShift, must be checked * immediately after link-up @@ -797,7 +804,7 @@ s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw) if ((ctrl & E1000_CTRL_SWDPIN1) && !(status & E1000_STATUS_LU) && !(rxcw & E1000_RXCW_C)) { if (!mac->autoneg_failed) { - mac->autoneg_failed = TRUE; + mac->autoneg_failed = true; return E1000_SUCCESS; } DEBUGOUT("NOT Rx'ing /C/, disable AutoNeg and force link.\n"); @@ -826,7 +833,7 @@ s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } return E1000_SUCCESS; @@ -862,7 +869,7 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) /* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */ if (!(status & E1000_STATUS_LU) && !(rxcw & E1000_RXCW_C)) { if (!mac->autoneg_failed) { - mac->autoneg_failed = TRUE; + mac->autoneg_failed = true; return E1000_SUCCESS; } DEBUGOUT("NOT Rx'ing /C/, disable AutoNeg and force link.\n"); @@ -891,7 +898,7 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; } else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) { /* If we force link for non-auto-negotiation switch, check * link status based on MAC synchronization for internal @@ -902,11 +909,11 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) rxcw = E1000_READ_REG(hw, E1000_RXCW); if (rxcw & E1000_RXCW_SYNCH) { if (!(rxcw & E1000_RXCW_IV)) { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; DEBUGOUT("SERDES: Link up - forced.\n"); } } else { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("SERDES: Link down - force failed.\n"); } } @@ -919,18 +926,18 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) rxcw = E1000_READ_REG(hw, E1000_RXCW); if (rxcw & E1000_RXCW_SYNCH) { if (!(rxcw & E1000_RXCW_IV)) { - mac->serdes_has_link = TRUE; + mac->serdes_has_link = true; DEBUGOUT("SERDES: Link up - autoneg completed successfully.\n"); } else { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("SERDES: Link down - invalid codewords detected in autoneg.\n"); } } else { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("SERDES: Link down - no sync.\n"); } } else { - mac->serdes_has_link = FALSE; + mac->serdes_has_link = false; DEBUGOUT("SERDES: Link down - autoneg failed\n"); } } @@ -1133,7 +1140,7 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) DEBUGFUNC("e1000_poll_fiber_serdes_link_generic"); - /* If we have a signal (the cable is plugged in, or assumed TRUE for + /* If we have a signal (the cable is plugged in, or assumed true for * serdes media) then poll for a "Link-Up" indication in the Device * Status Register. Time-out if a link isn't seen in 500 milliseconds * seconds (Auto-negotiation should complete in less than 500 @@ -1147,7 +1154,7 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) } if (i == FIBER_LINK_UP_LIMIT) { DEBUGOUT("Never got a valid link from auto-neg!!!\n"); - mac->autoneg_failed = TRUE; + mac->autoneg_failed = true; /* AutoNeg failed to achieve a link, so we'll call * mac->check_for_link. This routine will force the * link up if we detect a signal. This will allow us to @@ -1158,9 +1165,9 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) DEBUGOUT("Error while checking for link\n"); return ret_val; } - mac->autoneg_failed = FALSE; + mac->autoneg_failed = false; } else { - mac->autoneg_failed = FALSE; + mac->autoneg_failed = false; DEBUGOUT("Valid Link Found\n"); } @@ -2067,7 +2074,7 @@ void e1000_reset_adaptive_generic(struct e1000_hw *hw) mac->ifs_step_size = IFS_STEP; mac->ifs_ratio = IFS_RATIO; - mac->in_ifs_mode = FALSE; + mac->in_ifs_mode = false; E1000_WRITE_REG(hw, E1000_AIT, 0); } @@ -2091,7 +2098,7 @@ void e1000_update_adaptive_generic(struct e1000_hw *hw) if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) { if (mac->tx_packet_delta > MIN_NUM_XMITS) { - mac->in_ifs_mode = TRUE; + mac->in_ifs_mode = true; if (mac->current_ifs_val < mac->ifs_max_val) { if (!mac->current_ifs_val) mac->current_ifs_val = mac->ifs_min_val; @@ -2106,7 +2113,7 @@ void e1000_update_adaptive_generic(struct e1000_hw *hw) if (mac->in_ifs_mode && (mac->tx_packet_delta <= MIN_NUM_XMITS)) { mac->current_ifs_val = 0; - mac->in_ifs_mode = FALSE; + mac->in_ifs_mode = false; E1000_WRITE_REG(hw, E1000_AIT, 0); } } @@ -2228,17 +2235,17 @@ s32 e1000_get_hw_semaphore(struct e1000_hw *hw) /* In rare circumstances, the SW semaphore may already be held * unintentionally. Clear the semaphore once before giving up. */ - if (hw->dev_spec._82575.clear_semaphore_once) { - hw->dev_spec._82575.clear_semaphore_once = FALSE; - e1000_put_hw_semaphore(hw); - for (i = 0; i < fw_timeout; i++) { - swsm = E1000_READ_REG(hw, E1000_SWSM); - if (!(swsm & E1000_SWSM_SMBI)) - break; + if (hw->dev_spec._82575.clear_semaphore_once) { + hw->dev_spec._82575.clear_semaphore_once = false; + e1000_put_hw_semaphore(hw); + for (i = 0; i < fw_timeout; i++) { + swsm = E1000_READ_REG(hw, E1000_SWSM); + if (!(swsm & E1000_SWSM_SMBI)) + break; - usec_delay(50); - } - } + usec_delay(50); + } + } /* Get the FW semaphore. */ for (i = 0; i < fw_timeout; i++) { @@ -2354,7 +2361,7 @@ e1000_release_swfw_sync(struct e1000_hw *hw, u16 mask) ; /* Empty */ swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC); - swfw_sync &= ~mask; + swfw_sync &= (u32)~mask; E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync); e1000_put_hw_semaphore(hw); diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.h index 66f9459556..370f7f9d8a 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mac.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -70,6 +70,7 @@ s32 e1000_led_on_generic(struct e1000_hw *hw); s32 e1000_led_off_generic(struct e1000_hw *hw); void e1000_update_mc_addr_list_generic(struct e1000_hw *hw, u8 *mc_addr_list, u32 mc_addr_count); +int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index); s32 e1000_set_default_fc_generic(struct e1000_hw *hw); s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw); s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw); diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.c index 5bf4b15acf..08edf1b656 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -34,6 +34,8 @@ /*$FreeBSD$*/ #include "e1000_api.h" +#include "e1000_manage.h" + /** * e1000_calculate_checksum - Calculate checksum for buffer * @buffer: pointer to EEPROM @@ -106,8 +108,8 @@ s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw) * e1000_check_mng_mode_generic - Generic check management mode * @hw: pointer to the HW structure * - * Reads the firmware semaphore register and returns TRUE (>0) if - * manageability is enabled, else FALSE (0). + * Reads the firmware semaphore register and returns true (>0) if + * manageability is enabled, else false (0). **/ bool e1000_check_mng_mode_generic(struct e1000_hw *hw) { @@ -137,11 +139,11 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw) DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic"); - hw->mac.tx_pkt_filtering = TRUE; + hw->mac.tx_pkt_filtering = true; /* No manageability, no filtering */ if (!hw->mac.ops.check_mng_mode(hw)) { - hw->mac.tx_pkt_filtering = FALSE; + hw->mac.tx_pkt_filtering = false; return hw->mac.tx_pkt_filtering; } @@ -150,7 +152,7 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw) */ ret_val = e1000_mng_enable_host_if_generic(hw); if (ret_val != E1000_SUCCESS) { - hw->mac.tx_pkt_filtering = FALSE; + hw->mac.tx_pkt_filtering = false; return hw->mac.tx_pkt_filtering; } @@ -169,13 +171,13 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw) * take the safe route of assuming Tx filtering is enabled. */ if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) { - hw->mac.tx_pkt_filtering = TRUE; + hw->mac.tx_pkt_filtering = true; return hw->mac.tx_pkt_filtering; } /* Cookie area is valid, make the final check for filtering. */ if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) - hw->mac.tx_pkt_filtering = FALSE; + hw->mac.tx_pkt_filtering = false; return hw->mac.tx_pkt_filtering; } @@ -346,12 +348,12 @@ bool e1000_enable_mng_pass_thru(struct e1000_hw *hw) DEBUGFUNC("e1000_enable_mng_pass_thru"); if (!hw->mac.asf_firmware_present) - return FALSE; + return false; manc = E1000_READ_REG(hw, E1000_MANC); if (!(manc & E1000_MANC_RCV_TCO_EN)) - return FALSE; + return false; if (hw->mac.has_fwsm) { fwsm = E1000_READ_REG(hw, E1000_FWSM); @@ -360,7 +362,7 @@ bool e1000_enable_mng_pass_thru(struct e1000_hw *hw) if (!(factps & E1000_FACTPS_MNGCG) && ((fwsm & E1000_FWSM_MODE_MASK) == (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) - return TRUE; + return true; } else if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) { u16 data; @@ -369,18 +371,18 @@ bool e1000_enable_mng_pass_thru(struct e1000_hw *hw) factps = E1000_READ_REG(hw, E1000_FACTPS); ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data); if (ret_val) - return FALSE; + return false; if (!(factps & E1000_FACTPS_MNGCG) && ((data & E1000_NVM_INIT_CTRL2_MNGM) == (e1000_mng_mode_pt << 13))) - return TRUE; + return true; } else if ((manc & E1000_MANC_SMBUS_EN) && !(manc & E1000_MANC_ASF_EN)) { - return TRUE; + return true; } - return FALSE; + return false; } /** @@ -455,6 +457,7 @@ s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length) return E1000_SUCCESS; } + /** * e1000_load_firmware - Writes proxy FW code buffer to host interface * and execute. @@ -573,5 +576,3 @@ s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length) return E1000_SUCCESS; } - - diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.h index 2ef2e3a496..4e4e070708 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_manage.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.c index 19c5778750..970b9ae0e0 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -38,6 +38,7 @@ /** * e1000_null_mbx_check_for_flag - No-op function, return 0 * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to read **/ static s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw, u16 E1000_UNUSEDARG mbx_id) @@ -50,6 +51,9 @@ static s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw, /** * e1000_null_mbx_transact - No-op function, return 0 * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to read **/ static s32 e1000_null_mbx_transact(struct e1000_hw E1000_UNUSEDARG *hw, u32 E1000_UNUSEDARG *msg, @@ -400,7 +404,7 @@ static s32 e1000_check_for_ack_vf(struct e1000_hw *hw, * @hw: pointer to the HW structure * @mbx_id: id of mailbox to check * - * returns TRUE if the PF has set the reset done bit or else FALSE + * returns true if the PF has set the reset done bit or else false **/ static s32 e1000_check_for_rst_vf(struct e1000_hw *hw, u16 E1000_UNUSEDARG mbx_id) diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.h index f0b21992b2..c038001abe 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_mbx.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -63,7 +63,7 @@ #define E1000_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */ /* If it's a E1000_VF_* msg then it originates in the VF and is sent to the - * PF. The reverse is TRUE if it is E1000_PF_*. + * PF. The reverse is true if it is E1000_PF_*. * Message ACK's are the value or'd with 0xF0000000 */ /* Msgs below or'd with this are the ACK */ diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.c index 1bc74288df..8911204f0b 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -63,6 +63,9 @@ void e1000_init_nvm_ops_generic(struct e1000_hw *hw) /** * e1000_null_nvm_read - No-op function, return 0 * @hw: pointer to the HW structure + * @a: dummy variable + * @b: dummy variable + * @c: dummy variable **/ s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw, u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b, @@ -85,6 +88,7 @@ void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw) /** * e1000_null_led_default - No-op function, return 0 * @hw: pointer to the HW structure + * @data: dummy variable **/ s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw, u16 E1000_UNUSEDARG *data) @@ -96,6 +100,9 @@ s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw, /** * e1000_null_write_nvm - No-op function, return 0 * @hw: pointer to the HW structure + * @a: dummy variable + * @b: dummy variable + * @c: dummy variable **/ s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw, u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b, @@ -571,7 +578,7 @@ s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) } for (i = 0; i < words; i++) { - eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) + + eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) + E1000_NVM_RW_REG_START; E1000_WRITE_REG(hw, E1000_EERD, eerd); @@ -776,8 +783,9 @@ s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, DEBUGFUNC("e1000_read_pba_string_generic"); - if ((hw->mac.type >= e1000_i210) && - !e1000_get_flash_presence_i210(hw)) { + if ((hw->mac.type == e1000_i210 || + hw->mac.type == e1000_i211) && + !e1000_get_flash_presence_i210(hw)) { DEBUGOUT("Flashless no PBA string\n"); return -E1000_ERR_NVM_PBA_SECTION; } @@ -931,6 +939,41 @@ s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size) return E1000_SUCCESS; } +/** + * e1000_read_pba_num_generic - Read device part number + * @hw: pointer to the HW structure + * @pba_num: pointer to device part number + * + * Reads the product board assembly (PBA) number from the EEPROM and stores + * the value in pba_num. + **/ +s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num) +{ + s32 ret_val; + u16 nvm_data; + + DEBUGFUNC("e1000_read_pba_num_generic"); + + ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data); + if (ret_val) { + DEBUGOUT("NVM Read Error\n"); + return ret_val; + } else if (nvm_data == NVM_PBA_PTR_GUARD) { + DEBUGOUT("NVM Not Supported\n"); + return -E1000_NOT_IMPLEMENTED; + } + *pba_num = (u32)(nvm_data << 16); + + ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data); + if (ret_val) { + DEBUGOUT("NVM Read Error\n"); + return ret_val; + } + *pba_num |= nvm_data; + + return E1000_SUCCESS; +} + /** * e1000_read_pba_raw @@ -1233,4 +1276,116 @@ static void e1000_reload_nvm_generic(struct e1000_hw *hw) E1000_WRITE_FLUSH(hw); } +/** + * e1000_get_fw_version - Get firmware version information + * @hw: pointer to the HW structure + * @fw_vers: pointer to output version structure + * + * unsupported/not present features return 0 in version structure + **/ +void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers) +{ + u16 eeprom_verh, eeprom_verl, etrack_test, fw_version; + u8 q, hval, rem, result; + u16 comb_verh, comb_verl, comb_offset; + + memset(fw_vers, 0, sizeof(struct e1000_fw_version)); + + /* basic eeprom version numbers, bits used vary by part and by tool + * used to create the nvm images */ + /* Check which data format we have */ + switch (hw->mac.type) { + case e1000_i211: + e1000_read_invm_version(hw, fw_vers); + return; + case e1000_82575: + case e1000_82576: + case e1000_82580: + case e1000_i354: + hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test); + /* Use this format, unless EETRACK ID exists, + * then use alternate format + */ + if ((etrack_test & NVM_MAJOR_MASK) != NVM_ETRACK_VALID) { + hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version); + fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK) + >> NVM_MAJOR_SHIFT; + fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK) + >> NVM_MINOR_SHIFT; + fw_vers->eep_build = (fw_version & NVM_IMAGE_ID_MASK); + goto etrack_id; + } + break; + case e1000_i210: + if (!(e1000_get_flash_presence_i210(hw))) { + e1000_read_invm_version(hw, fw_vers); + return; + } + /* FALLTHROUGH */ + case e1000_i350: + hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test); + /* find combo image version */ + hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset); + if ((comb_offset != 0x0) && + (comb_offset != NVM_VER_INVALID)) { + + hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset + + 1), 1, &comb_verh); + hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset), + 1, &comb_verl); + + /* get Option Rom version if it exists and is valid */ + if ((comb_verh && comb_verl) && + ((comb_verh != NVM_VER_INVALID) && + (comb_verl != NVM_VER_INVALID))) { + + fw_vers->or_valid = true; + fw_vers->or_major = + comb_verl >> NVM_COMB_VER_SHFT; + fw_vers->or_build = + (comb_verl << NVM_COMB_VER_SHFT) + | (comb_verh >> NVM_COMB_VER_SHFT); + fw_vers->or_patch = + comb_verh & NVM_COMB_VER_MASK; + } + } + break; + default: + hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test); + return; + } + hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version); + fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK) + >> NVM_MAJOR_SHIFT; + + /* check for old style version format in newer images*/ + if ((fw_version & NVM_NEW_DEC_MASK) == 0x0) { + eeprom_verl = (fw_version & NVM_COMB_VER_MASK); + } else { + eeprom_verl = (fw_version & NVM_MINOR_MASK) + >> NVM_MINOR_SHIFT; + } + /* Convert minor value to hex before assigning to output struct + * Val to be converted will not be higher than 99, per tool output + */ + q = eeprom_verl / NVM_HEX_CONV; + hval = q * NVM_HEX_TENS; + rem = eeprom_verl % NVM_HEX_CONV; + result = hval + rem; + fw_vers->eep_minor = result; + +etrack_id: + if ((etrack_test & NVM_MAJOR_MASK) == NVM_ETRACK_VALID) { + hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl); + hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh); + fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) + | eeprom_verl; + } else if ((etrack_test & NVM_ETRACK_VALID) == 0) { + hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh); + hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl); + fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) | + eeprom_verl; + } +} + diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.h index 4f40f9ae29..86fd5d1e89 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_nvm.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -41,6 +41,22 @@ struct e1000_pba { u16 *pba_block; }; +struct e1000_fw_version { + u32 etrack_id; + u16 eep_major; + u16 eep_minor; + u16 eep_build; + + u8 invm_major; + u8 invm_minor; + u8 invm_img_type; + + bool or_valid; + u16 or_major; + u16 or_build; + u16 or_patch; +}; + void e1000_init_nvm_ops_generic(struct e1000_hw *hw); s32 e1000_null_read_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c); @@ -51,6 +67,7 @@ s32 e1000_acquire_nvm_generic(struct e1000_hw *hw); s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg); s32 e1000_read_mac_addr_generic(struct e1000_hw *hw); +s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num); s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size); s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size); @@ -75,6 +92,8 @@ s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw); void e1000_stop_nvm(struct e1000_hw *hw); void e1000_release_nvm_generic(struct e1000_hw *hw); +void e1000_get_fw_version(struct e1000_hw *hw, + struct e1000_fw_version *fw_vers); #define E1000_STM_OPCODE 0xDB00 diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.c index 4d4347c143..0536a975a5 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.h index 219710b2e6..fa9dedab86 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_osdep.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -120,8 +120,6 @@ safe_pause_ms(int x) { #define DEBUGFUNC(F) DEBUGOUT(F "\n") #define STATIC static -#define FALSE 0 -#define TRUE 1 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ #define PCI_COMMAND_REGISTER PCIR_COMMAND @@ -150,8 +148,8 @@ typedef int8_t s8; #endif #endif /*__FreeBSD_version < 800000 */ -#ifdef INVARIANTS -#define ASSERT_CTX_LOCK_HELD(hw) sx_assert(iflib_ctx_lock_get(((struct e1000_osdep *)hw->back)->ctx), SX_XLOCKED) +#if defined(INVARIANTS) && !defined(__HAIKU__) +#define ASSERT_CTX_LOCK_HELD(hw) (sx_assert(iflib_ctx_lock_get(((struct e1000_osdep *)hw->back)->ctx), SX_XLOCKED)) #else #define ASSERT_CTX_LOCK_HELD(hw) #endif diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.c index 32c3d29217..5c346b2163 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -104,6 +104,7 @@ void e1000_init_phy_ops_generic(struct e1000_hw *hw) /** * e1000_null_set_page - No-op function, return 0 * @hw: pointer to the HW structure + * @data: dummy variable **/ s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw, u16 E1000_UNUSEDARG data) @@ -115,6 +116,8 @@ s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw, /** * e1000_null_read_reg - No-op function, return 0 * @hw: pointer to the HW structure + * @offset: dummy variable + * @data: dummy variable **/ s32 e1000_null_read_reg(struct e1000_hw E1000_UNUSEDARG *hw, u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data) @@ -136,6 +139,7 @@ void e1000_null_phy_generic(struct e1000_hw E1000_UNUSEDARG *hw) /** * e1000_null_lplu_state - No-op function, return 0 * @hw: pointer to the HW structure + * @active: dummy variable **/ s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw, bool E1000_UNUSEDARG active) @@ -147,6 +151,8 @@ s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw, /** * e1000_null_write_reg - No-op function, return 0 * @hw: pointer to the HW structure + * @offset: dummy variable + * @data: dummy variable **/ s32 e1000_null_write_reg(struct e1000_hw E1000_UNUSEDARG *hw, u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data) @@ -468,7 +474,7 @@ s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data) DEBUGFUNC("e1000_write_phy_reg_i2c"); - /* Prevent overwritting SFP I2C EEPROM which is at A0 address.*/ + /* Prevent overwriting SFP I2C EEPROM which is at A0 address.*/ if ((hw->phy.addr == 0) || (hw->phy.addr > 7)) { DEBUGOUT1("PHY I2C Address %d is out of range.\n", hw->phy.addr); @@ -615,7 +621,7 @@ s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data) * lane and update whole word */ data_local = i2ccmd & 0xFF00; - data_local |= data; + data_local |= (u32)data; i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) | E1000_I2CCMD_OPCODE_WRITE | data_local); @@ -770,7 +776,7 @@ static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, **/ s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) { - return __e1000_read_phy_reg_igp(hw, offset, data, FALSE); + return __e1000_read_phy_reg_igp(hw, offset, data, false); } /** @@ -784,7 +790,7 @@ s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) **/ s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data) { - return __e1000_read_phy_reg_igp(hw, offset, data, TRUE); + return __e1000_read_phy_reg_igp(hw, offset, data, true); } /** @@ -838,7 +844,7 @@ static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, **/ s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) { - return __e1000_write_phy_reg_igp(hw, offset, data, FALSE); + return __e1000_write_phy_reg_igp(hw, offset, data, false); } /** @@ -852,7 +858,7 @@ s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) **/ s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data) { - return __e1000_write_phy_reg_igp(hw, offset, data, TRUE); + return __e1000_write_phy_reg_igp(hw, offset, data, true); } /** @@ -912,7 +918,7 @@ static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, **/ s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data) { - return __e1000_read_kmrn_reg(hw, offset, data, FALSE); + return __e1000_read_kmrn_reg(hw, offset, data, false); } /** @@ -927,7 +933,7 @@ s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data) **/ s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) { - return __e1000_read_kmrn_reg(hw, offset, data, TRUE); + return __e1000_read_kmrn_reg(hw, offset, data, true); } /** @@ -983,7 +989,7 @@ static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, **/ s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data) { - return __e1000_write_kmrn_reg(hw, offset, data, FALSE); + return __e1000_write_kmrn_reg(hw, offset, data, false); } /** @@ -997,7 +1003,7 @@ s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data) **/ s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) { - return __e1000_write_kmrn_reg(hw, offset, data, TRUE); + return __e1000_write_kmrn_reg(hw, offset, data, true); } /** @@ -1032,7 +1038,7 @@ static s32 e1000_set_master_slave_mode(struct e1000_hw *hw) break; case e1000_ms_auto: phy_data &= ~CR_1000T_MS_ENABLE; - /* fall-through */ + /* FALLTHROUGH */ default: break; } @@ -1092,6 +1098,7 @@ s32 e1000_copper_link_setup_82577(struct e1000_hw *hw) phy_data |= I82577_PHY_CTRL2_MANUAL_MDIX; break; case 0: + /* FALLTHROUGH */ default: phy_data |= I82577_PHY_CTRL2_AUTO_MDI_MDIX; break; @@ -1148,6 +1155,7 @@ s32 e1000_copper_link_setup_m88(struct e1000_hw *hw) phy_data |= M88E1000_PSCR_AUTO_X_1000T; break; case 0: + /* FALLTHROUGH */ default: phy_data |= M88E1000_PSCR_AUTO_X_MODE; break; @@ -1300,6 +1308,7 @@ s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw) } /* FALLTHROUGH */ case 0: + /* FALLTHROUGH */ default: phy_data |= M88E1000_PSCR_AUTO_X_MODE; break; @@ -1384,7 +1393,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw) */ if (phy->type == e1000_phy_igp) { /* disable lplu d3 during driver init */ - ret_val = hw->phy.ops.set_d3_lplu_state(hw, FALSE); + ret_val = hw->phy.ops.set_d3_lplu_state(hw, false); if (ret_val) { DEBUGOUT("Error Disabling LPLU D3\n"); return ret_val; @@ -1393,7 +1402,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw) /* disable lplu d0 during driver init */ if (hw->phy.ops.set_d0_lplu_state) { - ret_val = hw->phy.ops.set_d0_lplu_state(hw, FALSE); + ret_val = hw->phy.ops.set_d0_lplu_state(hw, false); if (ret_val) { DEBUGOUT("Error Disabling LPLU D0\n"); return ret_val; @@ -1414,6 +1423,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw) data |= IGP01E1000_PSCR_FORCE_MDI_MDIX; break; case 0: + /* FALLTHROUGH */ default: data |= IGP01E1000_PSCR_AUTO_MDIX; break; @@ -1672,7 +1682,7 @@ s32 e1000_copper_link_autoneg(struct e1000_hw *hw) } } - hw->mac.get_link_status = TRUE; + hw->mac.get_link_status = true; return ret_val; } @@ -1689,7 +1699,7 @@ s32 e1000_copper_link_autoneg(struct e1000_hw *hw) s32 e1000_setup_copper_link_generic(struct e1000_hw *hw) { s32 ret_val; - bool link; + bool link = true; DEBUGFUNC("e1000_setup_copper_link_generic"); @@ -1857,7 +1867,7 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw) return ret_val; if (!link) { - bool reset_dsp = TRUE; + bool reset_dsp = true; switch (hw->phy.id) { case I347AT4_E_PHY_ID: @@ -1866,11 +1876,11 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw) case M88E1543_E_PHY_ID: case M88E1512_E_PHY_ID: case I210_I_PHY_ID: - reset_dsp = FALSE; + reset_dsp = false; break; default: if (hw->phy.type != e1000_phy_m88) - reset_dsp = FALSE; + reset_dsp = false; break; } @@ -2069,7 +2079,7 @@ void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) * Success returns 0, Failure returns 1 * * The low power link up (lplu) state is set to the power management level D3 - * and SmartSpeed is disabled when active is TRUE, else clear lplu for D3 + * and SmartSpeed is disabled when active is true, else clear lplu for D3 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU * is used during Dx states where the power conservation is most important. * During driver activity, SmartSpeed should be enabled so performance is @@ -2184,7 +2194,7 @@ s32 e1000_check_downshift_generic(struct e1000_hw *hw) break; default: /* speed downshift not supported */ - phy->speed_downgraded = FALSE; + phy->speed_downgraded = false; return E1000_SUCCESS; } @@ -2717,7 +2727,7 @@ s32 e1000_get_phy_info_igp(struct e1000_hw *hw) return -E1000_ERR_CONFIG; } - phy->polarity_correction = TRUE; + phy->polarity_correction = true; ret_val = e1000_check_polarity_igp(hw); if (ret_val) @@ -3088,6 +3098,7 @@ s32 e1000_determine_phy_address(struct e1000_hw *hw) /** * e1000_get_phy_addr_for_bm_page - Retrieve PHY page address * @page: page to access + * @reg: register to access * * Returns the phy address for the page requested. **/ @@ -3124,7 +3135,7 @@ s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) /* Page 800 works differently than the rest so it has its own func */ if (page == BM_WUC_PAGE) { ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, - FALSE, false); + false, false); goto release; } @@ -3184,7 +3195,7 @@ s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) /* Page 800 works differently than the rest so it has its own func */ if (page == BM_WUC_PAGE) { ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, - TRUE, FALSE); + true, false); goto release; } @@ -3243,7 +3254,7 @@ s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) /* Page 800 works differently than the rest so it has its own func */ if (page == BM_WUC_PAGE) { ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, - TRUE, FALSE); + true, false); goto release; } @@ -3288,7 +3299,7 @@ s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) /* Page 800 works differently than the rest so it has its own func */ if (page == BM_WUC_PAGE) { ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, - FALSE, false); + false, false); goto release; } @@ -3423,7 +3434,7 @@ s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg) * Steps 1 and 2 are done by e1000_enable_phy_wakeup_reg_access_bm() and * step 5 is done by e1000_disable_phy_wakeup_reg_access_bm(). * - * Assumes semaphore is already acquired. When page_set==TRUE, assumes + * Assumes semaphore is already acquired. When page_set==true, assumes * the PHY page is set to BM_WUC_PAGE (i.e. a function in the call stack * is responsible for calls to e1000_[enable|disable]_phy_wakeup_reg_bm()). **/ @@ -3525,6 +3536,7 @@ void e1000_power_down_phy_copper(struct e1000_hw *hw) * @offset: register offset to be read * @data: pointer to the read data * @locked: semaphore has already been acquired or not + * @page_set: BM_WUC_PAGE already set and access enabled * * Acquires semaphore, if necessary, then reads the PHY register at offset * and stores the retrieved information in data. Release any acquired @@ -3548,13 +3560,13 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, /* Page 800 works differently than the rest so it has its own func */ if (page == BM_WUC_PAGE) { ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, - TRUE, page_set); + true, page_set); goto out; } if (page > 0 && page < HV_INTC_FC_PAGE_START) { ret_val = e1000_access_phy_debug_regs_hv(hw, offset, - data, TRUE); + data, true); goto out; } @@ -3598,7 +3610,7 @@ out: **/ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) { - return __e1000_read_phy_reg_hv(hw, offset, data, FALSE, false); + return __e1000_read_phy_reg_hv(hw, offset, data, false, false); } /** @@ -3612,7 +3624,7 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) **/ s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data) { - return __e1000_read_phy_reg_hv(hw, offset, data, TRUE, FALSE); + return __e1000_read_phy_reg_hv(hw, offset, data, true, false); } /** @@ -3626,7 +3638,7 @@ s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data) **/ s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data) { - return __e1000_read_phy_reg_hv(hw, offset, data, TRUE, true); + return __e1000_read_phy_reg_hv(hw, offset, data, true, true); } /** @@ -3635,6 +3647,7 @@ s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data) * @offset: register offset to write to * @data: data to write at register offset * @locked: semaphore has already been acquired or not + * @page_set: BM_WUC_PAGE already set and access enabled * * Acquires semaphore, if necessary, then writes the data to PHY register * at the offset. Release any acquired semaphores before exiting. @@ -3657,13 +3670,13 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, /* Page 800 works differently than the rest so it has its own func */ if (page == BM_WUC_PAGE) { ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, - FALSE, page_set); + false, page_set); goto out; } if (page > 0 && page < HV_INTC_FC_PAGE_START) { ret_val = e1000_access_phy_debug_regs_hv(hw, offset, - &data, FALSE); + &data, false); goto out; } @@ -3682,7 +3695,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, u16 data2 = 0x7EFF; ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3, - &data2, FALSE); + &data2, false); if (ret_val) goto out; } @@ -3723,7 +3736,7 @@ out: **/ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) { - return __e1000_write_phy_reg_hv(hw, offset, data, FALSE, false); + return __e1000_write_phy_reg_hv(hw, offset, data, false, false); } /** @@ -3737,7 +3750,7 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) **/ s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data) { - return __e1000_write_phy_reg_hv(hw, offset, data, TRUE, FALSE); + return __e1000_write_phy_reg_hv(hw, offset, data, true, false); } /** @@ -3751,7 +3764,7 @@ s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data) **/ s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data) { - return __e1000_write_phy_reg_hv(hw, offset, data, TRUE, true); + return __e1000_write_phy_reg_hv(hw, offset, data, true, true); } /** @@ -3966,7 +3979,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw) return -E1000_ERR_CONFIG; } - phy->polarity_correction = TRUE; + phy->polarity_correction = true; ret_val = e1000_check_polarity_82577(hw); if (ret_val) @@ -4109,7 +4122,7 @@ release: s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data) { u32 mphy_ctrl = 0; - bool locked = FALSE; + bool locked = false; bool ready; DEBUGFUNC("e1000_read_phy_reg_mphy"); @@ -4122,7 +4135,7 @@ s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data) /* Check if mPHY access is disabled and enable it if so */ mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL); if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) { - locked = TRUE; + locked = true; ready = e1000_is_mphy_ready(hw); if (!ready) return -E1000_ERR_PHY; @@ -4171,7 +4184,7 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, bool line_override) { u32 mphy_ctrl = 0; - bool locked = FALSE; + bool locked = false; bool ready; DEBUGFUNC("e1000_write_phy_reg_mphy"); @@ -4184,7 +4197,7 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, /* Check if mPHY access is disabled and enable it if so */ mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL); if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) { - locked = TRUE; + locked = true; ready = e1000_is_mphy_ready(hw); if (!ready) return -E1000_ERR_PHY; @@ -4233,7 +4246,7 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw) { u16 retry_count = 0; u32 mphy_ctrl = 0; - bool ready = FALSE; + bool ready = false; while (retry_count < 2) { mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL); @@ -4242,7 +4255,7 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw) retry_count++; continue; } - ready = TRUE; + ready = true; break; } @@ -4251,3 +4264,75 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw) return ready; } + +/** + * __e1000_access_xmdio_reg - Read/write XMDIO register + * @hw: pointer to the HW structure + * @address: XMDIO address to program + * @dev_addr: device address to program + * @data: pointer to value to read/write from/to the XMDIO address + * @read: boolean flag to indicate read or write + **/ +static s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address, + u8 dev_addr, u16 *data, bool read) +{ + s32 ret_val; + + DEBUGFUNC("__e1000_access_xmdio_reg"); + + ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr); + if (ret_val) + return ret_val; + + ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address); + if (ret_val) + return ret_val; + + ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA | + dev_addr); + if (ret_val) + return ret_val; + + if (read) + ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data); + else + ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data); + if (ret_val) + return ret_val; + + /* Recalibrate the device back to 0 */ + ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0); + if (ret_val) + return ret_val; + + return ret_val; +} + +/** + * e1000_read_xmdio_reg - Read XMDIO register + * @hw: pointer to the HW structure + * @addr: XMDIO address to program + * @dev_addr: device address to program + * @data: value to be read from the EMI address + **/ +s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data) +{ + DEBUGFUNC("e1000_read_xmdio_reg"); + + return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true); +} + +/** + * e1000_write_xmdio_reg - Write XMDIO register + * @hw: pointer to the HW structure + * @addr: XMDIO address to program + * @dev_addr: device address to program + * @data: value to be written to the XMDIO address + **/ +s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data) +{ + DEBUGFUNC("e1000_write_xmdio_reg"); + + return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data, + false); +} diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.h index 6d0687fc65..3a5b231b8b 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_phy.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -122,6 +122,11 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, bool line_override); bool e1000_is_mphy_ready(struct e1000_hw *hw); +s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, + u16 *data); +s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, + u16 data); + #define E1000_MAX_PHY_ADDR 8 /* IGP01E1000 Specific Registers */ @@ -276,6 +281,13 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw); #define E1000_KMRNCTRLSTA_K1_CONFIG 0x7 #define E1000_KMRNCTRLSTA_K1_ENABLE 0x0002 /* enable K1 */ #define E1000_KMRNCTRLSTA_HD_CTRL 0x10 /* Kumeran HD Control */ +#define E1000_KMRNCTRLSTA_K0S_CTRL 0x1E /* Kumeran K0s Control */ +#define E1000_KMRNCTRLSTA_K0S_CTRL_ENTRY_LTNCY_SHIFT 0 +#define E1000_KMRNCTRLSTA_K0S_CTRL_MIN_TIME_SHIFT 4 +#define E1000_KMRNCTRLSTA_K0S_CTRL_ENTRY_LTNCY_MASK \ + (3 << E1000_KMRNCTRLSTA_K0S_CTRL_ENTRY_LTNCY_SHIFT) +#define E1000_KMRNCTRLSTA_K0S_CTRL_MIN_TIME_MASK \ + (7 << E1000_KMRNCTRLSTA_K0S_CTRL_MIN_TIME_SHIFT) #define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10 #define IFE_PHY_SPECIAL_CONTROL 0x11 /* 100BaseTx PHY Special Ctrl */ diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_regs.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_regs.h index 246968e9f9..b3fb854f8a 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_regs.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_regs.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -64,11 +64,15 @@ #define E1000_FEXTNVM 0x00028 /* Future Extended NVM - RW */ #define E1000_FEXTNVM3 0x0003C /* Future Extended NVM 3 - RW */ #define E1000_FEXTNVM4 0x00024 /* Future Extended NVM 4 - RW */ +#define E1000_FEXTNVM5 0x00014 /* Future Extended NVM 5 - RW */ #define E1000_FEXTNVM6 0x00010 /* Future Extended NVM 6 - RW */ #define E1000_FEXTNVM7 0x000E4 /* Future Extended NVM 7 - RW */ +#define E1000_FEXTNVM8 0x5BB0 /* Future Extended NVM 8 - RW */ #define E1000_FEXTNVM9 0x5BB4 /* Future Extended NVM 9 - RW */ #define E1000_FEXTNVM11 0x5BBC /* Future Extended NVM 11 - RW */ +#define E1000_FEXTNVM12 0x5BC0 /* Future Extended NVM 12 - RW */ #define E1000_PCIEANACFG 0x00F18 /* PCIE Analog Config */ +#define E1000_DPGFR 0x00FAC /* Dynamic Power Gate Force Control Register */ #define E1000_FCT 0x00030 /* Flow Control Type - RW */ #define E1000_CONNSW 0x00034 /* Copper/Fiber switch control - RW */ #define E1000_VET 0x00038 /* VLAN Ether Type - RW */ @@ -167,7 +171,10 @@ #define E1000_RADV 0x0282C /* Rx Interrupt Absolute Delay Timer - RW */ #define E1000_EMIADD 0x10 /* Extended Memory Indirect Address */ #define E1000_EMIDATA 0x11 /* Extended Memory Indirect Data */ -#define E1000_SRWR 0x12018 /* Shadow Ram Write Register - RW */ +/* Shadow Ram Write Register - RW */ +#define E1000_SRWR 0x12018 +#define E1000_EEC_REG 0x12010 + #define E1000_I210_FLMNGCTL 0x12038 #define E1000_I210_FLMNGDATA 0x1203C #define E1000_I210_FLMNGCNT 0x12040 @@ -178,6 +185,9 @@ #define E1000_I210_FLA 0x1201C +#define E1000_SHADOWINF 0x12068 +#define E1000_FLFWUPDATE 0x12108 + #define E1000_INVM_DATA_REG(_n) (0x12120 + 4*(_n)) #define E1000_INVM_SIZE 64 /* Number of INVM Data Registers */ @@ -312,6 +322,7 @@ #define E1000_TIDV 0x03820 /* Tx Interrupt Delay Value - RW */ #define E1000_TADV 0x0382C /* Tx Interrupt Absolute Delay Val - RW */ #define E1000_TSPMT 0x03830 /* TCP Segmentation PAD & Min Threshold - RW */ +/* Statistics Register Descriptions */ #define E1000_CRCERRS 0x04000 /* CRC Error Count - R/clr */ #define E1000_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */ #define E1000_SYMERRS 0x04008 /* Symbol Error Count - R/clr */ @@ -371,6 +382,7 @@ #define E1000_TSCTC 0x040F8 /* TCP Segmentation Context Tx - R/clr */ #define E1000_TSCTFC 0x040FC /* TCP Segmentation Context Tx Fail - R/clr */ #define E1000_IAC 0x04100 /* Interrupt Assertion Count */ +/* Interrupt Cause */ #define E1000_ICRXPTC 0x04104 /* Interrupt Cause Rx Pkt Timer Expire Count */ #define E1000_ICRXATC 0x04108 /* Interrupt Cause Rx Abs Timer Expire Count */ #define E1000_ICTXPTC 0x0410C /* Interrupt Cause Tx Pkt Timer Expire Count */ @@ -493,12 +505,14 @@ #define E1000_WUC 0x05800 /* Wakeup Control - RW */ #define E1000_WUFC 0x05808 /* Wakeup Filter Control - RW */ #define E1000_WUS 0x05810 /* Wakeup Status - RO */ +/* Management registers */ #define E1000_MANC 0x05820 /* Management Control - RW */ #define E1000_IPAV 0x05838 /* IP Address Valid - RW */ #define E1000_IP4AT 0x05840 /* IPv4 Address Table - RW Array */ #define E1000_IP6AT 0x05880 /* IPv6 Address Table - RW Array */ #define E1000_WUPL 0x05900 /* Wakeup Packet Length - RW */ #define E1000_WUPM 0x05A00 /* Wakeup Packet Memory - RO A */ +/* MSI-X Table Register Descriptions */ #define E1000_PBACL 0x05B68 /* MSIx PBA Clear - Read/Write 1's to clear */ #define E1000_FFLT 0x05F00 /* Flexible Filter Length Table - RW Array */ #define E1000_HOST_IF 0x08800 /* Host Interface */ @@ -513,17 +527,20 @@ #define E1000_MANC2H 0x05860 /* Management Control To Host - RW */ /* Management Decision Filters */ #define E1000_MDEF(_n) (0x05890 + (4 * (_n))) +/* Semaphore registers */ #define E1000_SW_FW_SYNC 0x05B5C /* SW-FW Synchronization - RW */ #define E1000_CCMCTL 0x05B48 /* CCM Control Register */ #define E1000_GIOCTL 0x05B44 /* GIO Analog Control Register */ #define E1000_SCCTL 0x05B4C /* PCIc PLL Configuration Register */ +/* PCIe Register Description */ #define E1000_GCR 0x05B00 /* PCI-Ex Control */ #define E1000_GCR2 0x05B64 /* PCI-Ex Control #2 */ #define E1000_GSCL_1 0x05B10 /* PCI-Ex Statistic Control #1 */ #define E1000_GSCL_2 0x05B14 /* PCI-Ex Statistic Control #2 */ #define E1000_GSCL_3 0x05B18 /* PCI-Ex Statistic Control #3 */ #define E1000_GSCL_4 0x05B1C /* PCI-Ex Statistic Control #4 */ -#define E1000_FACTPS 0x05B30 /* Function Active and Power State to MNG */ +/* Function Active and Power State to MNG */ +#define E1000_FACTPS 0x05B30 #define E1000_SWSM 0x05B50 /* SW Semaphore */ #define E1000_FWSM 0x05B54 /* FW Semaphore */ /* Driver-only SW semaphore (not used by BOOT agents) */ @@ -542,8 +559,10 @@ #define E1000_IMIREXT(_i) (0x05AA0 + ((_i) * 4)) /* Immediate INTR Ext*/ #define E1000_IMIRVP 0x05AC0 /* Immediate INT Rx VLAN Priority -RW */ #define E1000_MSIXBM(_i) (0x01600 + ((_i) * 4)) /* MSI-X Alloc Reg -RW */ -#define E1000_RETA(_i) (0x05C00 + ((_i) * 4)) /* Redirection Table - RW */ -#define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */ +/* Redirection Table - RW Array */ +#define E1000_RETA(_i) (0x05C00 + ((_i) * 4)) +/* RSS Random Key - RW Array */ +#define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) #define E1000_RSSIM 0x05864 /* RSS Interrupt Mask */ #define E1000_RSSIR 0x05868 /* RSS Interrupt Request */ /* VT Registers */ @@ -613,6 +632,14 @@ #define E1000_SYNQF(_n) (0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */ #define E1000_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */ +/* ETQF register bit definitions */ +#define E1000_ETQF_FILTER_ENABLE (1 << 26) +#define E1000_ETQF_IMM_INT (1 << 29) +#define E1000_ETQF_QUEUE_ENABLE (1U << 31) +#define E1000_ETQF_QUEUE_SHIFT 16 +#define E1000_ETQF_QUEUE_MASK 0x00070000 +#define E1000_ETQF_ETYPE_MASK 0x0000FFFF + #define E1000_RTTDCS 0x3600 /* Reedtown Tx Desc plane control and status */ #define E1000_RTTPCS 0x3474 /* Reedtown Tx Packet Plane control and status */ #define E1000_RTRPCS 0x2474 /* Rx packet plane control and status */ diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.c index 035b580bd2..12c89a0897 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.c @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -104,11 +104,11 @@ static s32 e1000_init_mac_params_vf(struct e1000_hw *hw) hw->phy.media_type = e1000_media_type_unknown; /* No ASF features for the VF driver */ - mac->asf_firmware_present = FALSE; + mac->asf_firmware_present = false; /* ARC subsystem not supported */ - mac->arc_subsystem_valid = FALSE; + mac->arc_subsystem_valid = false; /* Disable adaptive IFS mode so the generic funcs don't do anything */ - mac->adaptive_ifs = FALSE; + mac->adaptive_ifs = false; /* VF's have no MTA Registers - PF feature only */ mac->mta_reg_count = 128; /* VF's have no access to RAR entries */ @@ -419,12 +419,13 @@ void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); + msgbuf[0] = E1000_VF_SET_MULTICAST; + if (mc_addr_count > 30) { msgbuf[0] |= E1000_VF_SET_MULTICAST_OVERFLOW; mc_addr_count = 30; } - msgbuf[0] = E1000_VF_SET_MULTICAST; msgbuf[0] |= mc_addr_count << E1000_VT_MSGINFO_SHIFT; for (i = 0; i < mc_addr_count; i++) { @@ -441,7 +442,7 @@ void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, * e1000_vfta_set_vf - Set/Unset vlan filter table address * @hw: pointer to the HW structure * @vid: determines the vfta register and bit to set/unset - * @set: if TRUE then set bit, else clear bit + * @set: if true then set bit, else clear bit **/ void e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set) { @@ -449,7 +450,7 @@ void e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set) msgbuf[0] = E1000_VF_SET_VLAN; msgbuf[1] = vid; - /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ + /* Setting the 8 bit field MSG INFO to true indicates "add" */ if (set) msgbuf[0] |= E1000_VF_SET_VLAN_ADD; @@ -548,7 +549,7 @@ static s32 e1000_check_for_link_vf(struct e1000_hw *hw) /* If we were hit with a reset or timeout drop the link */ if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) - mac->get_link_status = TRUE; + mac->get_link_status = true; if (!mac->get_link_status) goto out; @@ -580,7 +581,7 @@ static s32 e1000_check_for_link_vf(struct e1000_hw *hw) /* if we passed all the tests above then the link is up and we no * longer need to check for link */ - mac->get_link_status = FALSE; + mac->get_link_status = false; out: return ret_val; diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.h index 9c76b63201..abf62f676a 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/e1000_vf.h @@ -1,32 +1,32 @@ /****************************************************************************** SPDX-License-Identifier: BSD-3-Clause - Copyright (c) 2001-2015, Intel Corporation + Copyright (c) 2001-2020, Intel Corporation All rights reserved. - - Redistribution and use in source and binary forms, with or without + + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, + + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - - 3. Neither the name of the Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from this software without specific prior written permission. - + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @@ -160,7 +160,7 @@ enum e1000_mac_type { e1000_undefined = 0, e1000_vfadapt, e1000_vfadapt_i350, - e1000_num_macs /* List is 1-based, so subtract 1 for TRUE count. */ + e1000_num_macs /* List is 1-based, so subtract 1 for true count. */ }; struct e1000_vf_stats { diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/em_txrx.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/em_txrx.c index 458de96a7b..aebafca73c 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/em_txrx.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/em_txrx.c @@ -42,9 +42,9 @@ /********************************************************************* * Local Function prototypes *********************************************************************/ -static int em_tso_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_upper, +static int em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower); -static int em_transmit_checksum_setup(struct adapter *adapter, if_pkt_info_t pi, +static int em_transmit_checksum_setup(struct e1000_softc *sc, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower); static int em_isc_txd_encap(void *arg, if_pkt_info_t pi); static void em_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx); @@ -62,8 +62,7 @@ static int lem_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget); static int lem_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri); -static void lem_receive_checksum(int status, int errors, if_rxd_info_t ri); -static void em_receive_checksum(uint32_t status, if_rxd_info_t ri); +static void em_receive_checksum(uint16_t, uint8_t, if_rxd_info_t); static int em_determine_rsstype(u32 pkt_info); extern int em_intr(void *arg); @@ -92,9 +91,9 @@ struct if_txrx lem_txrx = { extern if_shared_ctx_t em_sctx; void -em_dump_rs(struct adapter *adapter) +em_dump_rs(struct e1000_softc *sc) { - if_softc_ctx_t scctx = adapter->shared; + if_softc_ctx_t scctx = sc->shared; struct em_tx_queue *que; struct tx_ring *txr; qidx_t i, ntxd, qid, cur; @@ -103,8 +102,8 @@ em_dump_rs(struct adapter *adapter) printf("\n"); ntxd = scctx->isc_ntxd[0]; - for (qid = 0; qid < adapter->tx_num_queues; qid++) { - que = &adapter->tx_queues[qid]; + for (qid = 0; qid < sc->tx_num_queues; qid++) { + que = &sc->tx_queues[qid]; txr = &que->txr; rs_cidx = txr->tx_rs_cidx; if (rs_cidx != txr->tx_rs_pidx) { @@ -133,10 +132,10 @@ em_dump_rs(struct adapter *adapter) * **********************************************************************/ static int -em_tso_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower) +em_tso_setup(struct e1000_softc *sc, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower) { - if_softc_ctx_t scctx = adapter->shared; - struct em_tx_queue *que = &adapter->tx_queues[pi->ipi_qsidx]; + if_softc_ctx_t scctx = sc->shared; + struct em_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx]; struct tx_ring *txr = &que->txr; struct e1000_context_desc *TXD; int cur, hdr_len; @@ -179,18 +178,18 @@ em_tso_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_upper, u32 *txd TXD->tcp_seg_setup.fields.mss = htole16(pi->ipi_tso_segsz); TXD->tcp_seg_setup.fields.hdr_len = hdr_len; - TXD->cmd_and_length = htole32(adapter->txd_cmd | + TXD->cmd_and_length = htole32(sc->txd_cmd | E1000_TXD_CMD_DEXT | /* Extended descr */ E1000_TXD_CMD_TSE | /* TSE context */ E1000_TXD_CMD_IP | /* Do IP csum */ E1000_TXD_CMD_TCP | /* Do TCP checksum */ (pi->ipi_len - hdr_len)); /* Total len */ - txr->tx_tso = TRUE; + txr->tx_tso = true; if (++cur == scctx->isc_ntxd[0]) { cur = 0; } - DPRINTF(iflib_get_dev(adapter->ctx), "%s: pidx: %d cur: %d\n", __FUNCTION__, pi->ipi_pidx, cur); + DPRINTF(iflib_get_dev(sc->ctx), "%s: pidx: %d cur: %d\n", __FUNCTION__, pi->ipi_pidx, cur); return (cur); } @@ -216,11 +215,11 @@ em_tso_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_upper, u32 *txd **********************************************************************/ static int -em_transmit_checksum_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower) +em_transmit_checksum_setup(struct e1000_softc *sc, if_pkt_info_t pi, u32 *txd_upper, u32 *txd_lower) { struct e1000_context_desc *TXD = NULL; - if_softc_ctx_t scctx = adapter->shared; - struct em_tx_queue *que = &adapter->tx_queues[pi->ipi_qsidx]; + if_softc_ctx_t scctx = sc->shared; + struct em_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx]; struct tx_ring *txr = &que->txr; int csum_flags = pi->ipi_csum_flags; int cur, hdr_len; @@ -228,7 +227,7 @@ em_transmit_checksum_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_u cur = pi->ipi_pidx; hdr_len = pi->ipi_ehdrlen + pi->ipi_ip_hlen; - cmd = adapter->txd_cmd; + cmd = sc->txd_cmd; /* * The 82574L can only remember the *last* context used @@ -238,7 +237,7 @@ em_transmit_checksum_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_u * second note. */ if (DONT_FORCE_CTX && - adapter->tx_num_queues == 1 && + sc->tx_num_queues == 1 && txr->csum_lhlen == pi->ipi_ehdrlen && txr->csum_iphlen == pi->ipi_ip_hlen && txr->csum_flags == csum_flags) { @@ -294,7 +293,7 @@ em_transmit_checksum_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_u if (++cur == scctx->isc_ntxd[0]) { cur = 0; } - DPRINTF(iflib_get_dev(adapter->ctx), "checksum_setup csum_flags=%x txd_upper=%x txd_lower=%x hdr_len=%d cmd=%x\n", + DPRINTF(iflib_get_dev(sc->ctx), "checksum_setup csum_flags=%x txd_upper=%x txd_lower=%x hdr_len=%d cmd=%x\n", csum_flags, *txd_upper, *txd_lower, hdr_len, cmd); return (cur); } @@ -302,7 +301,7 @@ em_transmit_checksum_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_u static int em_isc_txd_encap(void *arg, if_pkt_info_t pi) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; struct em_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx]; struct tx_ring *txr = &que->txr; @@ -319,7 +318,7 @@ em_isc_txd_encap(void *arg, if_pkt_info_t pi) txd_flags = pi->ipi_flags & IPI_TX_INTR ? E1000_TXD_CMD_RS : 0; i = first = pi->ipi_pidx; do_tso = (csum_flags & CSUM_TSO); - tso_desc = FALSE; + tso_desc = false; ntxd = scctx->isc_ntxd[0]; /* * TSO Hardware workaround, if this packet is not @@ -327,16 +326,16 @@ em_isc_txd_encap(void *arg, if_pkt_info_t pi) * it follows a TSO burst, then we need to add a * sentinel descriptor to prevent premature writeback. */ - if ((!do_tso) && (txr->tx_tso == TRUE)) { + if ((!do_tso) && (txr->tx_tso == true)) { if (nsegs == 1) - tso_desc = TRUE; - txr->tx_tso = FALSE; + tso_desc = true; + txr->tx_tso = false; } /* Do hardware assists */ if (do_tso) { i = em_tso_setup(sc, pi, &txd_upper, &txd_lower); - tso_desc = TRUE; + tso_desc = true; } else if (csum_flags & EM_CSUM_OFFLOAD) { i = em_transmit_checksum_setup(sc, pi, &txd_upper, &txd_lower); } @@ -349,7 +348,7 @@ em_isc_txd_encap(void *arg, if_pkt_info_t pi) } DPRINTF(iflib_get_dev(sc->ctx), "encap: set up tx: nsegs=%d first=%d i=%d\n", nsegs, first, i); - /* XXX adapter->pcix_82544 -- lem_fill_descriptors */ + /* XXX sc->pcix_82544 -- lem_fill_descriptors */ /* Set up our transmit descriptors */ for (j = 0; j < nsegs; j++) { @@ -417,19 +416,19 @@ em_isc_txd_encap(void *arg, if_pkt_info_t pi) static void em_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) { - struct adapter *adapter = arg; - struct em_tx_queue *que = &adapter->tx_queues[txqid]; + struct e1000_softc *sc = arg; + struct em_tx_queue *que = &sc->tx_queues[txqid]; struct tx_ring *txr = &que->txr; - E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), pidx); + E1000_WRITE_REG(&sc->hw, E1000_TDT(txr->me), pidx); } static int em_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) { - struct adapter *adapter = arg; - if_softc_ctx_t scctx = adapter->shared; - struct em_tx_queue *que = &adapter->tx_queues[txqid]; + struct e1000_softc *sc = arg; + if_softc_ctx_t scctx = sc->shared; + struct em_tx_queue *que = &sc->tx_queues[txqid]; struct tx_ring *txr = &que->txr; qidx_t processed = 0; @@ -462,7 +461,7 @@ em_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) if (delta < 0) delta += ntxd; MPASS(delta > 0); - DPRINTF(iflib_get_dev(adapter->ctx), + DPRINTF(iflib_get_dev(sc->ctx), "%s: cidx_processed=%u cur=%u clear=%d delta=%d\n", __FUNCTION__, prev, cur, clear, delta); @@ -484,7 +483,7 @@ em_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) static void lem_isc_rxd_refill(void *arg, if_rxd_update_t iru) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; struct em_rx_queue *que = &sc->rx_queues[iru->iru_qsidx]; struct rx_ring *rxr = &que->rxr; @@ -512,7 +511,7 @@ lem_isc_rxd_refill(void *arg, if_rxd_update_t iru) static void em_isc_rxd_refill(void *arg, if_rxd_update_t iru) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; uint16_t rxqid = iru->iru_qsidx; struct em_rx_queue *que = &sc->rx_queues[rxqid]; @@ -541,7 +540,7 @@ em_isc_rxd_refill(void *arg, if_rxd_update_t iru) static void em_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; struct em_rx_queue *que = &sc->rx_queues[rxqid]; struct rx_ring *rxr = &que->rxr; @@ -551,7 +550,7 @@ em_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx) static int lem_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; struct em_rx_queue *que = &sc->rx_queues[rxqid]; struct rx_ring *rxr = &que->rxr; @@ -576,7 +575,7 @@ lem_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) static int em_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; struct em_rx_queue *que = &sc->rx_queues[rxqid]; struct rx_ring *rxr = &que->rxr; @@ -601,9 +600,9 @@ em_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) static int lem_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) { - struct adapter *adapter = arg; - if_softc_ctx_t scctx = adapter->shared; - struct em_rx_queue *que = &adapter->rx_queues[ri->iri_qsidx]; + struct e1000_softc *sc = arg; + if_softc_ctx_t scctx = sc->shared; + struct em_rx_queue *que = &sc->rx_queues[ri->iri_qsidx]; struct rx_ring *rxr = &que->rxr; struct e1000_rx_desc *rxd; u16 len; @@ -629,7 +628,7 @@ lem_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) /* Make sure bad packets are discarded */ if (errors & E1000_RXD_ERR_FRAME_ERR_MASK) { - adapter->dropped_pkts++; + sc->dropped_pkts++; /* XXX fixup if common */ return (EBADMSG); } @@ -646,8 +645,8 @@ lem_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) } while (!eop); /* XXX add a faster way to look this up */ - if (adapter->hw.mac.type >= e1000_82543 && !(status & E1000_RXD_STAT_IXSM)) - lem_receive_checksum(status, errors, ri); + if (sc->hw.mac.type >= e1000_82543) + em_receive_checksum(status, errors, ri); if (status & E1000_RXD_STAT_VP) { ri->iri_vtag = le16toh(rxd->special); @@ -662,9 +661,9 @@ lem_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) static int em_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) { - struct adapter *adapter = arg; - if_softc_ctx_t scctx = adapter->shared; - struct em_rx_queue *que = &adapter->rx_queues[ri->iri_qsidx]; + struct e1000_softc *sc = arg; + if_softc_ctx_t scctx = sc->shared; + struct em_rx_queue *que = &sc->rx_queues[ri->iri_qsidx]; struct rx_ring *rxr = &que->rxr; union e1000_rx_desc_extended *rxd; @@ -672,9 +671,9 @@ em_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) u32 pkt_info; u32 staterr = 0; bool eop; - int i, cidx, vtag; + int i, cidx; - i = vtag = 0; + i = 0; cidx = ri->iri_cidx; do { @@ -692,7 +691,7 @@ em_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) /* Make sure bad packets are discarded */ if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { - adapter->dropped_pkts++; + sc->dropped_pkts++; return EBADMSG; } @@ -707,17 +706,13 @@ em_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) i++; } while (!eop); - /* XXX add a faster way to look this up */ - if (adapter->hw.mac.type >= e1000_82543) - em_receive_checksum(staterr, ri); + if (scctx->isc_capenable & IFCAP_RXCSUM) + em_receive_checksum(staterr, staterr >> 24, ri); if (staterr & E1000_RXD_STAT_VP) { - vtag = le16toh(rxd->wb.upper.vlan); - } - - ri->iri_vtag = vtag; - if (vtag) + ri->iri_vtag = le16toh(rxd->wb.upper.vlan); ri->iri_flags |= M_VLANTAG; + } ri->iri_flowid = le32toh(rxd->wb.lower.hi_dword.rss); ri->iri_rsstype = em_determine_rsstype(pkt_info); @@ -734,19 +729,24 @@ em_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) * *********************************************************************/ static void -lem_receive_checksum(int status, int errors, if_rxd_info_t ri) +em_receive_checksum(uint16_t status, uint8_t errors, if_rxd_info_t ri) { - /* Did it pass? */ - if (status & E1000_RXD_STAT_IPCS && !(errors & E1000_RXD_ERR_IPE)) - ri->iri_csum_flags = (CSUM_IP_CHECKED|CSUM_IP_VALID); + if (__predict_false(status & E1000_RXD_STAT_IXSM)) + return; - if (status & E1000_RXD_STAT_TCPCS) { - /* Did it pass? */ - if (!(errors & E1000_RXD_ERR_TCPE)) { - ri->iri_csum_flags |= - (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); - ri->iri_csum_data = htons(0xffff); - } + /* If there is a layer 3 or 4 error we are done */ + if (__predict_false(errors & (E1000_RXD_ERR_IPE | E1000_RXD_ERR_TCPE))) + return; + + /* IP Checksum Good */ + if (status & E1000_RXD_STAT_IPCS) + ri->iri_csum_flags = (CSUM_IP_CHECKED | CSUM_IP_VALID); + + /* Valid L4E checksum */ + if (__predict_true(status & + (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) { + ri->iri_csum_flags |= CSUM_DATA_VALID | CSUM_PSEUDO_HDR; + ri->iri_csum_data = htons(0xffff); } } @@ -775,30 +775,3 @@ em_determine_rsstype(u32 pkt_info) return M_HASHTYPE_OPAQUE; } } - -static void -em_receive_checksum(uint32_t status, if_rxd_info_t ri) -{ - ri->iri_csum_flags = 0; - - /* Ignore Checksum bit is set */ - if (status & E1000_RXD_STAT_IXSM) - return; - - /* If the IP checksum exists and there is no IP Checksum error */ - if ((status & (E1000_RXD_STAT_IPCS | E1000_RXDEXT_STATERR_IPE)) == - E1000_RXD_STAT_IPCS) { - ri->iri_csum_flags = (CSUM_IP_CHECKED | CSUM_IP_VALID); - } - - /* TCP or UDP checksum */ - if ((status & (E1000_RXD_STAT_TCPCS | E1000_RXDEXT_STATERR_TCPE)) == - E1000_RXD_STAT_TCPCS) { - ri->iri_csum_flags |= (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); - ri->iri_csum_data = htons(0xffff); - } - if (status & E1000_RXD_STAT_UDPCS) { - ri->iri_csum_flags |= (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); - ri->iri_csum_data = htons(0xffff); - } -} diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.c index 324d621e46..428e3f7368 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.c @@ -29,8 +29,11 @@ /* $FreeBSD$ */ #include "if_em.h" #include +#ifndef __HAIKU__ +#include +#endif -#define em_mac_min e1000_82547 +#define em_mac_min e1000_82571 #define igb_mac_min e1000_82575 /********************************************************************* @@ -50,181 +53,196 @@ char em_driver_version[] = "7.6.1-k"; static pci_vendor_info_t em_vendor_info_array[] = { - /* Intel(R) PRO/1000 Network Connection - Legacy em*/ - PVID(0x8086, E1000_DEV_ID_82540EM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82540EM_LOM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82540EP, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82540EP_LOM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82540EP_LP, "Intel(R) PRO/1000 Network Connection"), + /* Intel(R) - lem-class legacy devices */ + PVID(0x8086, E1000_DEV_ID_82540EM, "Intel(R) Legacy PRO/1000 MT 82540EM"), + PVID(0x8086, E1000_DEV_ID_82540EM_LOM, "Intel(R) Legacy PRO/1000 MT 82540EM (LOM)"), + PVID(0x8086, E1000_DEV_ID_82540EP, "Intel(R) Legacy PRO/1000 MT 82540EP"), + PVID(0x8086, E1000_DEV_ID_82540EP_LOM, "Intel(R) Legacy PRO/1000 MT 82540EP (LOM)"), + PVID(0x8086, E1000_DEV_ID_82540EP_LP, "Intel(R) Legacy PRO/1000 MT 82540EP (Mobile)"), - PVID(0x8086, E1000_DEV_ID_82541EI, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82541ER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82541ER_LOM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82541EI_MOBILE, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82541GI, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82541GI_LF, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82541GI_MOBILE, "Intel(R) PRO/1000 Network Connection"), + PVID(0x8086, E1000_DEV_ID_82541EI, "Intel(R) Legacy PRO/1000 MT 82541EI (Copper)"), + PVID(0x8086, E1000_DEV_ID_82541ER, "Intel(R) Legacy PRO/1000 82541ER"), + PVID(0x8086, E1000_DEV_ID_82541ER_LOM, "Intel(R) Legacy PRO/1000 MT 82541ER"), + PVID(0x8086, E1000_DEV_ID_82541EI_MOBILE, "Intel(R) Legacy PRO/1000 MT 82541EI (Mobile)"), + PVID(0x8086, E1000_DEV_ID_82541GI, "Intel(R) Legacy PRO/1000 MT 82541GI"), + PVID(0x8086, E1000_DEV_ID_82541GI_LF, "Intel(R) Legacy PRO/1000 GT 82541PI"), + PVID(0x8086, E1000_DEV_ID_82541GI_MOBILE, "Intel(R) Legacy PRO/1000 MT 82541GI (Mobile)"), - PVID(0x8086, E1000_DEV_ID_82542, "Intel(R) PRO/1000 Network Connection"), + PVID(0x8086, E1000_DEV_ID_82542, "Intel(R) Legacy PRO/1000 82542 (Fiber)"), - PVID(0x8086, E1000_DEV_ID_82543GC_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82543GC_COPPER, "Intel(R) PRO/1000 Network Connection"), + PVID(0x8086, E1000_DEV_ID_82543GC_FIBER, "Intel(R) Legacy PRO/1000 F 82543GC (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82543GC_COPPER, "Intel(R) Legacy PRO/1000 T 82543GC (Copper)"), - PVID(0x8086, E1000_DEV_ID_82544EI_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82544EI_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82544GC_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82544GC_LOM, "Intel(R) PRO/1000 Network Connection"), + PVID(0x8086, E1000_DEV_ID_82544EI_COPPER, "Intel(R) Legacy PRO/1000 XT 82544EI (Copper)"), + PVID(0x8086, E1000_DEV_ID_82544EI_FIBER, "Intel(R) Legacy PRO/1000 XF 82544EI (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82544GC_COPPER, "Intel(R) Legacy PRO/1000 T 82544GC (Copper)"), + PVID(0x8086, E1000_DEV_ID_82544GC_LOM, "Intel(R) Legacy PRO/1000 XT 82544GC (LOM)"), - PVID(0x8086, E1000_DEV_ID_82545EM_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82545EM_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82545GM_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82545GM_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82545GM_SERDES, "Intel(R) PRO/1000 Network Connection"), + PVID(0x8086, E1000_DEV_ID_82545EM_COPPER, "Intel(R) Legacy PRO/1000 MT 82545EM (Copper)"), + PVID(0x8086, E1000_DEV_ID_82545EM_FIBER, "Intel(R) Legacy PRO/1000 MF 82545EM (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82545GM_COPPER, "Intel(R) Legacy PRO/1000 MT 82545GM (Copper)"), + PVID(0x8086, E1000_DEV_ID_82545GM_FIBER, "Intel(R) Legacy PRO/1000 MF 82545GM (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82545GM_SERDES, "Intel(R) Legacy PRO/1000 MB 82545GM (SERDES)"), - PVID(0x8086, E1000_DEV_ID_82546EB_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546EB_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546GB_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546GB_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546GB_SERDES, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546GB_PCIE, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3, "Intel(R) PRO/1000 Network Connection"), + PVID(0x8086, E1000_DEV_ID_82546EB_COPPER, "Intel(R) Legacy PRO/1000 MT 82546EB (Copper)"), + PVID(0x8086, E1000_DEV_ID_82546EB_FIBER, "Intel(R) Legacy PRO/1000 MF 82546EB (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, "Intel(R) Legacy PRO/1000 MT 82546EB (Quad Copper"), + PVID(0x8086, E1000_DEV_ID_82546GB_COPPER, "Intel(R) Legacy PRO/1000 MT 82546GB (Copper)"), + PVID(0x8086, E1000_DEV_ID_82546GB_FIBER, "Intel(R) Legacy PRO/1000 MF 82546GB (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82546GB_SERDES, "Intel(R) Legacy PRO/1000 MB 82546GB (SERDES)"), + PVID(0x8086, E1000_DEV_ID_82546GB_PCIE, "Intel(R) Legacy PRO/1000 P 82546GB (PCIe)"), + PVID(0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER, "Intel(R) Legacy PRO/1000 GT 82546GB (Quad Copper)"), + PVID(0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3, "Intel(R) Legacy PRO/1000 GT 82546GB (Quad Copper)"), - PVID(0x8086, E1000_DEV_ID_82547EI, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82547EI_MOBILE, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82547GI, "Intel(R) PRO/1000 Network Connection"), + PVID(0x8086, E1000_DEV_ID_82547EI, "Intel(R) Legacy PRO/1000 CT 82547EI"), + PVID(0x8086, E1000_DEV_ID_82547EI_MOBILE, "Intel(R) Legacy PRO/1000 CT 82547EI (Mobile)"), + PVID(0x8086, E1000_DEV_ID_82547GI, "Intel(R) Legacy PRO/1000 CT 82547GI"), - /* Intel(R) PRO/1000 Network Connection - em */ - PVID(0x8086, E1000_DEV_ID_82571EB_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571EB_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571EB_SERDES, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571EB_SERDES_DUAL, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571EB_SERDES_QUAD, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER_LP, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571EB_QUAD_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82571PT_QUAD_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82572EI, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82572EI_COPPER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82572EI_FIBER, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82572EI_SERDES, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82573E, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82573E_IAMT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82573L, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82583V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_IGP_M_AMT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_IGP_AMT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_IGP_C, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_IFE, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_IFE_GT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_IFE_G, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_IGP_M, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH8_82567V_3, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IGP_M_AMT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IGP_AMT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IGP_C, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IGP_M, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IGP_M_V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IFE, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IFE_GT, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_IFE_G, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH9_BM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82574L, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_82574LA, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_LM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_LF, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_LM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_LF, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_M_HV_LM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_M_HV_LC, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_D_HV_DM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_D_HV_DC, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH2_LV_LM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH2_LV_V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_LPT_I217_LM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_LPT_I217_V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_LPTLP_I218_LM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_LPTLP_I218_V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_I218_LM2, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_I218_V2, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_I218_LM3, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_I218_V3, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM2, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V2, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_LBG_I219_LM3, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM4, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V4, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM5, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V5, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_LM6, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_V6, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_LM7, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_V7, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_LM8, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_V8, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_LM9, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_V9, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_LM10, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_V10, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_LM11, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_V11, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_LM12, "Intel(R) PRO/1000 Network Connection"), - PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_V12, "Intel(R) PRO/1000 Network Connection"), + /* Intel(R) - em-class devices */ + PVID(0x8086, E1000_DEV_ID_82571EB_COPPER, "Intel(R) PRO/1000 PT 82571EB/82571GB (Copper)"), + PVID(0x8086, E1000_DEV_ID_82571EB_FIBER, "Intel(R) PRO/1000 PF 82571EB/82571GB (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82571EB_SERDES, "Intel(R) PRO/1000 PB 82571EB (SERDES)"), + PVID(0x8086, E1000_DEV_ID_82571EB_SERDES_DUAL, "Intel(R) PRO/1000 82571EB (Dual Mezzanine)"), + PVID(0x8086, E1000_DEV_ID_82571EB_SERDES_QUAD, "Intel(R) PRO/1000 82571EB (Quad Mezzanine)"), + PVID(0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER, "Intel(R) PRO/1000 PT 82571EB/82571GB (Quad Copper)"), + PVID(0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER_LP, "Intel(R) PRO/1000 PT 82571EB/82571GB (Quad Copper)"), + PVID(0x8086, E1000_DEV_ID_82571EB_QUAD_FIBER, "Intel(R) PRO/1000 PF 82571EB (Quad Fiber)"), + PVID(0x8086, E1000_DEV_ID_82571PT_QUAD_COPPER, "Intel(R) PRO/1000 PT 82571PT (Quad Copper)"), + PVID(0x8086, E1000_DEV_ID_82572EI, "Intel(R) PRO/1000 PT 82572EI (Copper)"), + PVID(0x8086, E1000_DEV_ID_82572EI_COPPER, "Intel(R) PRO/1000 PT 82572EI (Copper)"), + PVID(0x8086, E1000_DEV_ID_82572EI_FIBER, "Intel(R) PRO/1000 PF 82572EI (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82572EI_SERDES, "Intel(R) PRO/1000 82572EI (SERDES)"), + PVID(0x8086, E1000_DEV_ID_82573E, "Intel(R) PRO/1000 82573E (Copper)"), + PVID(0x8086, E1000_DEV_ID_82573E_IAMT, "Intel(R) PRO/1000 82573E AMT (Copper)"), + PVID(0x8086, E1000_DEV_ID_82573L, "Intel(R) PRO/1000 82573L"), + PVID(0x8086, E1000_DEV_ID_82583V, "Intel(R) 82583V"), + PVID(0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT, "Intel(R) 80003ES2LAN (Copper)"), + PVID(0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT, "Intel(R) 80003ES2LAN (SERDES)"), + PVID(0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT, "Intel(R) 80003ES2LAN (Dual Copper)"), + PVID(0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT, "Intel(R) 80003ES2LAN (Dual SERDES)"), + PVID(0x8086, E1000_DEV_ID_ICH8_IGP_M_AMT, "Intel(R) 82566MM ICH8 AMT (Mobile)"), + PVID(0x8086, E1000_DEV_ID_ICH8_IGP_AMT, "Intel(R) 82566DM ICH8 AMT"), + PVID(0x8086, E1000_DEV_ID_ICH8_IGP_C, "Intel(R) 82566DC ICH8"), + PVID(0x8086, E1000_DEV_ID_ICH8_IFE, "Intel(R) 82562V ICH8"), + PVID(0x8086, E1000_DEV_ID_ICH8_IFE_GT, "Intel(R) 82562GT ICH8"), + PVID(0x8086, E1000_DEV_ID_ICH8_IFE_G, "Intel(R) 82562G ICH8"), + PVID(0x8086, E1000_DEV_ID_ICH8_IGP_M, "Intel(R) 82566MC ICH8"), + PVID(0x8086, E1000_DEV_ID_ICH8_82567V_3, "Intel(R) 82567V-3 ICH8"), + PVID(0x8086, E1000_DEV_ID_ICH9_IGP_M_AMT, "Intel(R) 82567LM ICH9 AMT"), + PVID(0x8086, E1000_DEV_ID_ICH9_IGP_AMT, "Intel(R) 82566DM-2 ICH9 AMT"), + PVID(0x8086, E1000_DEV_ID_ICH9_IGP_C, "Intel(R) 82566DC-2 ICH9"), + PVID(0x8086, E1000_DEV_ID_ICH9_IGP_M, "Intel(R) 82567LF ICH9"), + PVID(0x8086, E1000_DEV_ID_ICH9_IGP_M_V, "Intel(R) 82567V ICH9"), + PVID(0x8086, E1000_DEV_ID_ICH9_IFE, "Intel(R) 82562V-2 ICH9"), + PVID(0x8086, E1000_DEV_ID_ICH9_IFE_GT, "Intel(R) 82562GT-2 ICH9"), + PVID(0x8086, E1000_DEV_ID_ICH9_IFE_G, "Intel(R) 82562G-2 ICH9"), + PVID(0x8086, E1000_DEV_ID_ICH9_BM, "Intel(R) 82567LM-4 ICH9"), + PVID(0x8086, E1000_DEV_ID_82574L, "Intel(R) Gigabit CT 82574L"), + PVID(0x8086, E1000_DEV_ID_82574LA, "Intel(R) 82574L-Apple"), + PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_LM, "Intel(R) 82567LM-2 ICH10"), + PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_LF, "Intel(R) 82567LF-2 ICH10"), + PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_V, "Intel(R) 82567V-2 ICH10"), + PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_LM, "Intel(R) 82567LM-3 ICH10"), + PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_LF, "Intel(R) 82567LF-3 ICH10"), + PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_V, "Intel(R) 82567V-4 ICH10"), + PVID(0x8086, E1000_DEV_ID_PCH_M_HV_LM, "Intel(R) 82577LM"), + PVID(0x8086, E1000_DEV_ID_PCH_M_HV_LC, "Intel(R) 82577LC"), + PVID(0x8086, E1000_DEV_ID_PCH_D_HV_DM, "Intel(R) 82578DM"), + PVID(0x8086, E1000_DEV_ID_PCH_D_HV_DC, "Intel(R) 82578DC"), + PVID(0x8086, E1000_DEV_ID_PCH2_LV_LM, "Intel(R) 82579LM"), + PVID(0x8086, E1000_DEV_ID_PCH2_LV_V, "Intel(R) 82579V"), + PVID(0x8086, E1000_DEV_ID_PCH_LPT_I217_LM, "Intel(R) I217-LM LPT"), + PVID(0x8086, E1000_DEV_ID_PCH_LPT_I217_V, "Intel(R) I217-V LPT"), + PVID(0x8086, E1000_DEV_ID_PCH_LPTLP_I218_LM, "Intel(R) I218-LM LPTLP"), + PVID(0x8086, E1000_DEV_ID_PCH_LPTLP_I218_V, "Intel(R) I218-V LPTLP"), + PVID(0x8086, E1000_DEV_ID_PCH_I218_LM2, "Intel(R) I218-LM (2)"), + PVID(0x8086, E1000_DEV_ID_PCH_I218_V2, "Intel(R) I218-V (2)"), + PVID(0x8086, E1000_DEV_ID_PCH_I218_LM3, "Intel(R) I218-LM (3)"), + PVID(0x8086, E1000_DEV_ID_PCH_I218_V3, "Intel(R) I218-V (3)"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM, "Intel(R) I219-LM SPT"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V, "Intel(R) I219-V SPT"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM2, "Intel(R) I219-LM SPT-H(2)"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V2, "Intel(R) I219-V SPT-H(2)"), + PVID(0x8086, E1000_DEV_ID_PCH_LBG_I219_LM3, "Intel(R) I219-LM LBG(3)"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM4, "Intel(R) I219-LM SPT(4)"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V4, "Intel(R) I219-V SPT(4)"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM5, "Intel(R) I219-LM SPT(5)"), + PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V5, "Intel(R) I219-V SPT(5)"), + PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_LM6, "Intel(R) I219-LM CNP(6)"), + PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_V6, "Intel(R) I219-V CNP(6)"), + PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_LM7, "Intel(R) I219-LM CNP(7)"), + PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_V7, "Intel(R) I219-V CNP(7)"), + PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_LM8, "Intel(R) I219-LM ICP(8)"), + PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_V8, "Intel(R) I219-V ICP(8)"), + PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_LM9, "Intel(R) I219-LM ICP(9)"), + PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_V9, "Intel(R) I219-V ICP(9)"), + PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_LM10, "Intel(R) I219-LM CMP(10)"), + PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_V10, "Intel(R) I219-V CMP(10)"), + PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_LM11, "Intel(R) I219-LM CMP(11)"), + PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_V11, "Intel(R) I219-V CMP(11)"), + PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_LM12, "Intel(R) I219-LM CMP(12)"), + PVID(0x8086, E1000_DEV_ID_PCH_CMP_I219_V12, "Intel(R) I219-V CMP(12)"), + PVID(0x8086, E1000_DEV_ID_PCH_TGP_I219_LM13, "Intel(R) I219-LM TGP(13)"), + PVID(0x8086, E1000_DEV_ID_PCH_TGP_I219_V13, "Intel(R) I219-V TGP(13)"), + PVID(0x8086, E1000_DEV_ID_PCH_TGP_I219_LM14, "Intel(R) I219-LM TGP(14)"), + PVID(0x8086, E1000_DEV_ID_PCH_TGP_I219_V14, "Intel(R) I219-V GTP(14)"), + PVID(0x8086, E1000_DEV_ID_PCH_TGP_I219_LM15, "Intel(R) I219-LM TGP(15)"), + PVID(0x8086, E1000_DEV_ID_PCH_TGP_I219_V15, "Intel(R) I219-V TGP(15)"), + PVID(0x8086, E1000_DEV_ID_PCH_ADL_I219_LM16, "Intel(R) I219-LM ADL(16)"), + PVID(0x8086, E1000_DEV_ID_PCH_ADL_I219_V16, "Intel(R) I219-V ADL(16)"), + PVID(0x8086, E1000_DEV_ID_PCH_ADL_I219_LM17, "Intel(R) I219-LM ADL(17)"), + PVID(0x8086, E1000_DEV_ID_PCH_ADL_I219_V17, "Intel(R) I219-V ADL(17)"), + PVID(0x8086, E1000_DEV_ID_PCH_MTP_I219_LM18, "Intel(R) I219-LM MTP(18)"), + PVID(0x8086, E1000_DEV_ID_PCH_MTP_I219_V18, "Intel(R) I219-V MTP(18)"), + PVID(0x8086, E1000_DEV_ID_PCH_MTP_I219_LM19, "Intel(R) I219-LM MTP(19)"), + PVID(0x8086, E1000_DEV_ID_PCH_MTP_I219_V19, "Intel(R) I219-V MTP(19)"), /* required last entry */ PVID_END }; static pci_vendor_info_t igb_vendor_info_array[] = { - /* Intel(R) PRO/1000 Network Connection - igb */ - PVID(0x8086, E1000_DEV_ID_82575EB_COPPER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82575EB_FIBER_SERDES, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82575GB_QUAD_COPPER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_NS, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_NS_SERDES, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_FIBER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_SERDES, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_SERDES_QUAD, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_QUAD_COPPER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_QUAD_COPPER_ET2, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82576_VF, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82580_COPPER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82580_FIBER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82580_SERDES, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82580_SGMII, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82580_COPPER_DUAL, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_82580_QUAD_FIBER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_DH89XXCC_SERDES, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_DH89XXCC_SGMII, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_DH89XXCC_SFP, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_DH89XXCC_BACKPLANE, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I350_COPPER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I350_FIBER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I350_SERDES, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I350_SGMII, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I350_VF, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_COPPER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_COPPER_IT, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_COPPER_OEM1, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_COPPER_FLASHLESS, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_SERDES_FLASHLESS, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_FIBER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_SERDES, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I210_SGMII, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I211_COPPER, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I354_BACKPLANE_1GBPS, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS, "Intel(R) PRO/1000 PCI-Express Network Driver"), - PVID(0x8086, E1000_DEV_ID_I354_SGMII, "Intel(R) PRO/1000 PCI-Express Network Driver"), + /* Intel(R) - igb-class devices */ + PVID(0x8086, E1000_DEV_ID_82575EB_COPPER, "Intel(R) PRO/1000 82575EB (Copper)"), + PVID(0x8086, E1000_DEV_ID_82575EB_FIBER_SERDES, "Intel(R) PRO/1000 82575EB (SERDES)"), + PVID(0x8086, E1000_DEV_ID_82575GB_QUAD_COPPER, "Intel(R) PRO/1000 VT 82575GB (Quad Copper)"), + PVID(0x8086, E1000_DEV_ID_82576, "Intel(R) PRO/1000 82576"), + PVID(0x8086, E1000_DEV_ID_82576_NS, "Intel(R) PRO/1000 82576NS"), + PVID(0x8086, E1000_DEV_ID_82576_NS_SERDES, "Intel(R) PRO/1000 82576NS (SERDES)"), + PVID(0x8086, E1000_DEV_ID_82576_FIBER, "Intel(R) PRO/1000 EF 82576 (Dual Fiber)"), + PVID(0x8086, E1000_DEV_ID_82576_SERDES, "Intel(R) PRO/1000 82576 (Dual SERDES)"), + PVID(0x8086, E1000_DEV_ID_82576_SERDES_QUAD, "Intel(R) PRO/1000 ET 82576 (Quad SERDES)"), + PVID(0x8086, E1000_DEV_ID_82576_QUAD_COPPER, "Intel(R) PRO/1000 ET 82576 (Quad Copper)"), + PVID(0x8086, E1000_DEV_ID_82576_QUAD_COPPER_ET2, "Intel(R) PRO/1000 ET(2) 82576 (Quad Copper)"), + PVID(0x8086, E1000_DEV_ID_82576_VF, "Intel(R) PRO/1000 82576 Virtual Function"), + PVID(0x8086, E1000_DEV_ID_82580_COPPER, "Intel(R) I340 82580 (Copper)"), + PVID(0x8086, E1000_DEV_ID_82580_FIBER, "Intel(R) I340 82580 (Fiber)"), + PVID(0x8086, E1000_DEV_ID_82580_SERDES, "Intel(R) I340 82580 (SERDES)"), + PVID(0x8086, E1000_DEV_ID_82580_SGMII, "Intel(R) I340 82580 (SGMII)"), + PVID(0x8086, E1000_DEV_ID_82580_COPPER_DUAL, "Intel(R) I340-T2 82580 (Dual Copper)"), + PVID(0x8086, E1000_DEV_ID_82580_QUAD_FIBER, "Intel(R) I340-F4 82580 (Quad Fiber)"), + PVID(0x8086, E1000_DEV_ID_DH89XXCC_SERDES, "Intel(R) DH89XXCC (SERDES)"), + PVID(0x8086, E1000_DEV_ID_DH89XXCC_SGMII, "Intel(R) I347-AT4 DH89XXCC"), + PVID(0x8086, E1000_DEV_ID_DH89XXCC_SFP, "Intel(R) DH89XXCC (SFP)"), + PVID(0x8086, E1000_DEV_ID_DH89XXCC_BACKPLANE, "Intel(R) DH89XXCC (Backplane)"), + PVID(0x8086, E1000_DEV_ID_I350_COPPER, "Intel(R) I350 (Copper)"), + PVID(0x8086, E1000_DEV_ID_I350_FIBER, "Intel(R) I350 (Fiber)"), + PVID(0x8086, E1000_DEV_ID_I350_SERDES, "Intel(R) I350 (SERDES)"), + PVID(0x8086, E1000_DEV_ID_I350_SGMII, "Intel(R) I350 (SGMII)"), + PVID(0x8086, E1000_DEV_ID_I350_VF, "Intel(R) I350 Virtual Function"), + PVID(0x8086, E1000_DEV_ID_I210_COPPER, "Intel(R) I210 (Copper)"), + PVID(0x8086, E1000_DEV_ID_I210_COPPER_IT, "Intel(R) I210 IT (Copper)"), + PVID(0x8086, E1000_DEV_ID_I210_COPPER_OEM1, "Intel(R) I210 (OEM)"), + PVID(0x8086, E1000_DEV_ID_I210_COPPER_FLASHLESS, "Intel(R) I210 Flashless (Copper)"), + PVID(0x8086, E1000_DEV_ID_I210_SERDES_FLASHLESS, "Intel(R) I210 Flashless (SERDES)"), + PVID(0x8086, E1000_DEV_ID_I210_SGMII_FLASHLESS, "Intel(R) I210 Flashless (SGMII)"), + PVID(0x8086, E1000_DEV_ID_I210_FIBER, "Intel(R) I210 (Fiber)"), + PVID(0x8086, E1000_DEV_ID_I210_SERDES, "Intel(R) I210 (SERDES)"), + PVID(0x8086, E1000_DEV_ID_I210_SGMII, "Intel(R) I210 (SGMII)"), + PVID(0x8086, E1000_DEV_ID_I211_COPPER, "Intel(R) I211 (Copper)"), + PVID(0x8086, E1000_DEV_ID_I354_BACKPLANE_1GBPS, "Intel(R) I354 (1.0 GbE Backplane)"), + PVID(0x8086, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS, "Intel(R) I354 (2.5 GbE Backplane)"), + PVID(0x8086, E1000_DEV_ID_I354_SGMII, "Intel(R) I354 (SGMII)"), /* required last entry */ PVID_END }; @@ -232,93 +250,101 @@ static pci_vendor_info_t igb_vendor_info_array[] = /********************************************************************* * Function prototypes *********************************************************************/ -static void *em_register(device_t dev); -static void *igb_register(device_t dev); -static int em_if_attach_pre(if_ctx_t ctx); -static int em_if_attach_post(if_ctx_t ctx); -static int em_if_detach(if_ctx_t ctx); -static int em_if_shutdown(if_ctx_t ctx); -static int em_if_suspend(if_ctx_t ctx); -static int em_if_resume(if_ctx_t ctx); +static void *em_register(device_t); +static void *igb_register(device_t); +static int em_if_attach_pre(if_ctx_t); +static int em_if_attach_post(if_ctx_t); +static int em_if_detach(if_ctx_t); +static int em_if_shutdown(if_ctx_t); +static int em_if_suspend(if_ctx_t); +static int em_if_resume(if_ctx_t); -static int em_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs, int ntxqsets); -static int em_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nrxqs, int nrxqsets); -static void em_if_queues_free(if_ctx_t ctx); +static int em_if_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, int); +static int em_if_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, int); +static void em_if_queues_free(if_ctx_t); static uint64_t em_if_get_counter(if_ctx_t, ift_counter); -static void em_if_init(if_ctx_t ctx); -static void em_if_stop(if_ctx_t ctx); +static void em_if_init(if_ctx_t); +static void em_if_stop(if_ctx_t); static void em_if_media_status(if_ctx_t, struct ifmediareq *); -static int em_if_media_change(if_ctx_t ctx); -static int em_if_mtu_set(if_ctx_t ctx, uint32_t mtu); -static void em_if_timer(if_ctx_t ctx, uint16_t qid); -static void em_if_vlan_register(if_ctx_t ctx, u16 vtag); -static void em_if_vlan_unregister(if_ctx_t ctx, u16 vtag); -static void em_if_watchdog_reset(if_ctx_t ctx); -static bool em_if_needs_restart(if_ctx_t ctx, enum iflib_restart_event event); +static int em_if_media_change(if_ctx_t); +static int em_if_mtu_set(if_ctx_t, uint32_t); +static void em_if_timer(if_ctx_t, uint16_t); +static void em_if_vlan_register(if_ctx_t, u16); +static void em_if_vlan_unregister(if_ctx_t, u16); +static void em_if_watchdog_reset(if_ctx_t); +static bool em_if_needs_restart(if_ctx_t, enum iflib_restart_event); -static void em_identify_hardware(if_ctx_t ctx); -static int em_allocate_pci_resources(if_ctx_t ctx); -static void em_free_pci_resources(if_ctx_t ctx); -static void em_reset(if_ctx_t ctx); -static int em_setup_interface(if_ctx_t ctx); -static int em_setup_msix(if_ctx_t ctx); +static void em_identify_hardware(if_ctx_t); +static int em_allocate_pci_resources(if_ctx_t); +static void em_free_pci_resources(if_ctx_t); +static void em_reset(if_ctx_t); +static int em_setup_interface(if_ctx_t); +static int em_setup_msix(if_ctx_t); -static void em_initialize_transmit_unit(if_ctx_t ctx); -static void em_initialize_receive_unit(if_ctx_t ctx); +static void em_initialize_transmit_unit(if_ctx_t); +static void em_initialize_receive_unit(if_ctx_t); -static void em_if_intr_enable(if_ctx_t ctx); -static void em_if_intr_disable(if_ctx_t ctx); -static void igb_if_intr_enable(if_ctx_t ctx); -static void igb_if_intr_disable(if_ctx_t ctx); -static int em_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid); -static int em_if_tx_queue_intr_enable(if_ctx_t ctx, uint16_t txqid); -static int igb_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid); -static int igb_if_tx_queue_intr_enable(if_ctx_t ctx, uint16_t txqid); -static void em_if_multi_set(if_ctx_t ctx); -static void em_if_update_admin_status(if_ctx_t ctx); -static void em_if_debug(if_ctx_t ctx); -static void em_update_stats_counters(struct adapter *); -static void em_add_hw_stats(struct adapter *adapter); -static int em_if_set_promisc(if_ctx_t ctx, int flags); -static void em_setup_vlan_hw_support(struct adapter *); +static void em_if_intr_enable(if_ctx_t); +static void em_if_intr_disable(if_ctx_t); +static void igb_if_intr_enable(if_ctx_t); +static void igb_if_intr_disable(if_ctx_t); +static int em_if_rx_queue_intr_enable(if_ctx_t, uint16_t); +static int em_if_tx_queue_intr_enable(if_ctx_t, uint16_t); +static int igb_if_rx_queue_intr_enable(if_ctx_t, uint16_t); +static int igb_if_tx_queue_intr_enable(if_ctx_t, uint16_t); +static void em_if_multi_set(if_ctx_t); +static void em_if_update_admin_status(if_ctx_t); +static void em_if_debug(if_ctx_t); +static void em_update_stats_counters(struct e1000_softc *); +static void em_add_hw_stats(struct e1000_softc *); +static int em_if_set_promisc(if_ctx_t, int); +static bool em_if_vlan_filter_capable(if_ctx_t); +static bool em_if_vlan_filter_used(if_ctx_t); +static void em_if_vlan_filter_enable(struct e1000_softc *); +static void em_if_vlan_filter_disable(struct e1000_softc *); +static void em_if_vlan_filter_write(struct e1000_softc *); +static void em_setup_vlan_hw_support(if_ctx_t ctx); static int em_sysctl_nvm_info(SYSCTL_HANDLER_ARGS); -static void em_print_nvm_info(struct adapter *); +static void em_print_nvm_info(struct e1000_softc *); +static void em_fw_version_locked(if_ctx_t); +static void em_sbuf_fw_version(struct e1000_fw_version *, struct sbuf *); +static void em_print_fw_version(struct e1000_softc *); +static int em_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS); static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); static int em_get_rs(SYSCTL_HANDLER_ARGS); -static void em_print_debug_info(struct adapter *); +static void em_print_debug_info(struct e1000_softc *); static int em_is_valid_ether_addr(u8 *); static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS); -static void em_add_int_delay_sysctl(struct adapter *, const char *, +static void em_add_int_delay_sysctl(struct e1000_softc *, const char *, const char *, struct em_int_delay_info *, int, int); /* Management and WOL Support */ -static void em_init_manageability(struct adapter *); -static void em_release_manageability(struct adapter *); -static void em_get_hw_control(struct adapter *); -static void em_release_hw_control(struct adapter *); -static void em_get_wakeup(if_ctx_t ctx); -static void em_enable_wakeup(if_ctx_t ctx); -static int em_enable_phy_wakeup(struct adapter *); -static void em_disable_aspm(struct adapter *); +static void em_init_manageability(struct e1000_softc *); +static void em_release_manageability(struct e1000_softc *); +static void em_get_hw_control(struct e1000_softc *); +static void em_release_hw_control(struct e1000_softc *); +static void em_get_wakeup(if_ctx_t); +static void em_enable_wakeup(if_ctx_t); +static int em_enable_phy_wakeup(struct e1000_softc *); +static void em_disable_aspm(struct e1000_softc *); -int em_intr(void *arg); -static void em_disable_promisc(if_ctx_t ctx); +int em_intr(void *); /* MSI-X handlers */ static int em_if_msix_intr_assign(if_ctx_t, int); static int em_msix_link(void *); -static void em_handle_link(void *context); +static void em_handle_link(void *); static void em_enable_vectors_82574(if_ctx_t); static int em_set_flowcntl(SYSCTL_HANDLER_ARGS); static int em_sysctl_eee(SYSCTL_HANDLER_ARGS); -static void em_if_led_func(if_ctx_t ctx, int onoff); +static void em_if_led_func(if_ctx_t, int); static int em_get_regs(SYSCTL_HANDLER_ARGS); -static void lem_smartspeed(struct adapter *adapter); -static void igb_configure_queues(struct adapter *adapter); +static void lem_smartspeed(struct e1000_softc *); +static void igb_configure_queues(struct e1000_softc *); /********************************************************************* @@ -350,7 +376,7 @@ static device_method_t igb_methods[] = { static driver_t em_driver = { - "em", em_methods, sizeof(struct adapter), + "em", em_methods, sizeof(struct e1000_softc), }; static devclass_t em_devclass; @@ -363,7 +389,7 @@ MODULE_DEPEND(em, iflib, 1, 1, 1); IFLIB_PNP_INFO(pci, em, em_vendor_info_array); static driver_t igb_driver = { - "igb", igb_methods, sizeof(struct adapter), + "igb", igb_methods, sizeof(struct e1000_softc), }; static devclass_t igb_devclass; @@ -410,7 +436,7 @@ static device_method_t em_if_methods[] = { }; static driver_t em_if_driver = { - "em_if", em_if_methods, sizeof(struct adapter) + "em_if", em_if_methods, sizeof(struct e1000_softc) }; static device_method_t igb_if_methods[] = { @@ -448,7 +474,7 @@ static device_method_t igb_if_methods[] = { }; static driver_t igb_if_driver = { - "igb_if", igb_if_methods, sizeof(struct adapter) + "igb_if", igb_if_methods, sizeof(struct e1000_softc) }; /********************************************************************* @@ -489,12 +515,12 @@ SYSCTL_INT(_hw_em, OID_AUTO, rx_abs_int_delay, CTLFLAG_RDTUN, &em_rx_abs_int_delay_dflt, 0, "Default receive interrupt delay limit in usecs"); -static int em_smart_pwr_down = FALSE; +static int em_smart_pwr_down = false; SYSCTL_INT(_hw_em, OID_AUTO, smart_pwr_down, CTLFLAG_RDTUN, &em_smart_pwr_down, 0, "Set to true to leave smart power down enabled on newer adapters"); /* Controls whether promiscuous also shows bad packets */ -static int em_debug_sbp = TRUE; +static int em_debug_sbp = false; SYSCTL_INT(_hw_em, OID_AUTO, sbp, CTLFLAG_RDTUN, &em_debug_sbp, 0, "Show bad packets in promiscuous mode"); @@ -553,8 +579,6 @@ static struct if_shared_ctx em_sctx_init = { .isc_ntxd_default = {EM_DEFAULT_TXD}, }; -if_shared_ctx_t em_sctx = &em_sctx_init; - static struct if_shared_ctx igb_sctx_init = { .isc_magic = IFLIB_MAGIC, .isc_q_align = PAGE_SIZE, @@ -582,8 +606,6 @@ static struct if_shared_ctx igb_sctx_init = { .isc_ntxd_default = {EM_DEFAULT_TXD}, }; -if_shared_ctx_t igb_sctx = &igb_sctx_init; - /***************************************************************** * * Dump Registers @@ -593,8 +615,8 @@ if_shared_ctx_t igb_sctx = &igb_sctx_init; static int em_get_regs(SYSCTL_HANDLER_ARGS) { - struct adapter *adapter = (struct adapter *)arg1; - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = (struct e1000_softc *)arg1; + struct e1000_hw *hw = &sc->hw; struct sbuf *sb; u32 *regs_buff; int rc; @@ -643,7 +665,7 @@ static int em_get_regs(SYSCTL_HANDLER_ARGS) sbuf_printf(sb, "General Registers\n"); sbuf_printf(sb, "\tCTRL\t %08x\n", regs_buff[0]); sbuf_printf(sb, "\tSTATUS\t %08x\n", regs_buff[1]); - sbuf_printf(sb, "\tCTRL_EXIT\t %08x\n\n", regs_buff[2]); + sbuf_printf(sb, "\tCTRL_EXT\t %08x\n\n", regs_buff[2]); sbuf_printf(sb, "Interrupt Registers\n"); sbuf_printf(sb, "\tICR\t %08x\n\n", regs_buff[3]); @@ -674,7 +696,7 @@ static int em_get_regs(SYSCTL_HANDLER_ARGS) #ifdef DUMP_DESCS { - if_softc_ctx_t scctx = adapter->shared; + if_softc_ctx_t scctx = sc->shared; struct rx_ring *rxr = &rx_que->rxr; struct tx_ring *txr = &tx_que->txr; int ntxd = scctx->isc_ntxd[0]; @@ -706,23 +728,23 @@ static int em_get_regs(SYSCTL_HANDLER_ARGS) static void * em_register(device_t dev) { - return (em_sctx); + return (&em_sctx_init); } static void * igb_register(device_t dev) { - return (igb_sctx); + return (&igb_sctx_init); } static int em_set_num_queues(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); int maxqueues; /* Sanity check based on HW */ - switch (adapter->hw.mac.type) { + switch (sc->hw.mac.type) { case e1000_82576: case e1000_82580: case e1000_i350: @@ -772,62 +794,65 @@ em_set_num_queues(if_ctx_t ctx) static int em_if_attach_pre(if_ctx_t ctx) { - struct adapter *adapter; + struct e1000_softc *sc; if_softc_ctx_t scctx; device_t dev; struct e1000_hw *hw; + struct sysctl_oid_list *child; + struct sysctl_ctx_list *ctx_list; int error = 0; INIT_DEBUGOUT("em_if_attach_pre: begin"); dev = iflib_get_dev(ctx); - adapter = iflib_get_softc(ctx); + sc = iflib_get_softc(ctx); - adapter->ctx = adapter->osdep.ctx = ctx; - adapter->dev = adapter->osdep.dev = dev; - scctx = adapter->shared = iflib_get_softc_ctx(ctx); - adapter->media = iflib_get_media(ctx); - hw = &adapter->hw; + sc->ctx = sc->osdep.ctx = ctx; + sc->dev = sc->osdep.dev = dev; + scctx = sc->shared = iflib_get_softc_ctx(ctx); + sc->media = iflib_get_media(ctx); + hw = &sc->hw; - adapter->tx_process_limit = scctx->isc_ntxd[0]; - - /* SYSCTL stuff */ - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "nvm", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, - adapter, 0, em_sysctl_nvm_info, "I", "NVM Information"); - - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "debug", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, - adapter, 0, em_sysctl_debug_info, "I", "Debug Information"); - - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "fc", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, - adapter, 0, em_set_flowcntl, "I", "Flow Control"); - - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "reg_dump", - CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, adapter, 0, - em_get_regs, "A", "Dump Registers"); - - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "rs_dump", - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, adapter, 0, - em_get_rs, "I", "Dump RS indexes"); + sc->tx_process_limit = scctx->isc_ntxd[0]; /* Determine hardware and mac info */ em_identify_hardware(ctx); + /* SYSCTL stuff */ + ctx_list = device_get_sysctl_ctx(dev); + child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); + + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "nvm", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, + em_sysctl_nvm_info, "I", "NVM Information"); + + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version", + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, + em_sysctl_print_fw_version, "A", + "Prints FW/NVM Versions"); + + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "debug", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, + em_sysctl_debug_info, "I", "Debug Information"); + + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, + em_set_flowcntl, "I", "Flow Control"); + + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "reg_dump", + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, + em_get_regs, "A", "Dump Registers"); + + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "rs_dump", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, + em_get_rs, "I", "Dump RS indexes"); + scctx->isc_tx_nsegments = EM_MAX_SCATTER; scctx->isc_nrxqsets_max = scctx->isc_ntxqsets_max = em_set_num_queues(ctx); if (bootverbose) device_printf(dev, "attach_pre capping queues at %d\n", scctx->isc_ntxqsets_max); - if (adapter->hw.mac.type >= igb_mac_min) { + if (hw->mac.type >= igb_mac_min) { scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0] * sizeof(union e1000_adv_tx_desc), EM_DBA_ALIGN); scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * sizeof(union e1000_adv_rx_desc), EM_DBA_ALIGN); scctx->isc_txd_size[0] = sizeof(union e1000_adv_tx_desc); @@ -839,7 +864,7 @@ em_if_attach_pre(if_ctx_t ctx) scctx->isc_capabilities = scctx->isc_capenable = IGB_CAPS; scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_TSO | CSUM_IP6_TCP | CSUM_IP6_UDP; - if (adapter->hw.mac.type != e1000_82575) + if (hw->mac.type != e1000_82575) scctx->isc_tx_csum_flags |= CSUM_SCTP | CSUM_IP6_SCTP; /* ** Some new devices, as with ixgbe, now may @@ -847,7 +872,7 @@ em_if_attach_pre(if_ctx_t ctx) ** track of which is used. */ scctx->isc_msix_bar = pci_msix_table_bar(dev); - } else if (adapter->hw.mac.type >= em_mac_min) { + } else if (hw->mac.type >= em_mac_min) { scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0]* sizeof(struct e1000_tx_desc), EM_DBA_ALIGN); scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * sizeof(union e1000_rx_desc_extended), EM_DBA_ALIGN); scctx->isc_txd_size[0] = sizeof(struct e1000_tx_desc); @@ -879,7 +904,7 @@ em_if_attach_pre(if_ctx_t ctx) * We support MSI-X with 82574 only, but indicate to iflib(4) * that it shall give MSI at least a try with other devices. */ - if (adapter->hw.mac.type == e1000_82574) { + if (hw->mac.type == e1000_82574) { scctx->isc_msix_bar = pci_msix_table_bar(dev);; } else { scctx->isc_msix_bar = -1; @@ -892,11 +917,15 @@ em_if_attach_pre(if_ctx_t ctx) scctx->isc_rxd_size[0] = sizeof(struct e1000_rx_desc); scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP; scctx->isc_txrx = &lem_txrx; - scctx->isc_capabilities = scctx->isc_capenable = LEM_CAPS; - if (adapter->hw.mac.type < e1000_82543) - scctx->isc_capenable &= ~(IFCAP_HWCSUM|IFCAP_VLAN_HWCSUM); + scctx->isc_capabilities = LEM_CAPS; + if (hw->mac.type < e1000_82543) + scctx->isc_capabilities &= ~(IFCAP_HWCSUM|IFCAP_VLAN_HWCSUM); + /* 82541ER doesn't do HW tagging */ + if (hw->device_id == E1000_DEV_ID_82541ER || hw->device_id == E1000_DEV_ID_82541ER_LOM) + scctx->isc_capabilities &= ~IFCAP_VLAN_HWTAGGING; /* INTx only */ scctx->isc_msix_bar = 0; + scctx->isc_capenable = scctx->isc_capabilities; } /* Setup PCI resources */ @@ -919,19 +948,19 @@ em_if_attach_pre(if_ctx_t ctx) (hw->mac.type == e1000_pch2lan) || (hw->mac.type == e1000_pch_lpt)) { int rid = EM_BAR_TYPE_FLASH; - adapter->flash = bus_alloc_resource_any(dev, + sc->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (adapter->flash == NULL) { + if (sc->flash == NULL) { device_printf(dev, "Mapping of Flash failed\n"); error = ENXIO; goto err_pci; } /* This is used in the shared code */ - hw->flash_address = (u8 *)adapter->flash; - adapter->osdep.flash_bus_space_tag = - rman_get_bustag(adapter->flash); - adapter->osdep.flash_bus_space_handle = - rman_get_bushandle(adapter->flash); + hw->flash_address = (u8 *)sc->flash; + sc->osdep.flash_bus_space_tag = + rman_get_bustag(sc->flash); + sc->osdep.flash_bus_space_handle = + rman_get_bushandle(sc->flash); } /* ** In the new SPT device flash is not a @@ -940,15 +969,15 @@ em_if_attach_pre(if_ctx_t ctx) ** FLASH read/write macros in the shared code. */ else if (hw->mac.type >= e1000_pch_spt) { - adapter->osdep.flash_bus_space_tag = - adapter->osdep.mem_bus_space_tag; - adapter->osdep.flash_bus_space_handle = - adapter->osdep.mem_bus_space_handle + sc->osdep.flash_bus_space_tag = + sc->osdep.mem_bus_space_tag; + sc->osdep.flash_bus_space_handle = + sc->osdep.mem_bus_space_handle + E1000_FLASH_BASE_ADDR; } /* Do Shared Code initialization */ - error = e1000_setup_init_funcs(hw, TRUE); + error = e1000_setup_init_funcs(hw, true); if (error) { device_printf(dev, "Setup of Shared code failed, error %d\n", error); @@ -960,40 +989,40 @@ em_if_attach_pre(if_ctx_t ctx) e1000_get_bus_info(hw); /* Set up some sysctls for the tunable interrupt delays */ - em_add_int_delay_sysctl(adapter, "rx_int_delay", - "receive interrupt delay in usecs", &adapter->rx_int_delay, + em_add_int_delay_sysctl(sc, "rx_int_delay", + "receive interrupt delay in usecs", &sc->rx_int_delay, E1000_REGISTER(hw, E1000_RDTR), em_rx_int_delay_dflt); - em_add_int_delay_sysctl(adapter, "tx_int_delay", - "transmit interrupt delay in usecs", &adapter->tx_int_delay, + em_add_int_delay_sysctl(sc, "tx_int_delay", + "transmit interrupt delay in usecs", &sc->tx_int_delay, E1000_REGISTER(hw, E1000_TIDV), em_tx_int_delay_dflt); - em_add_int_delay_sysctl(adapter, "rx_abs_int_delay", + em_add_int_delay_sysctl(sc, "rx_abs_int_delay", "receive interrupt delay limit in usecs", - &adapter->rx_abs_int_delay, + &sc->rx_abs_int_delay, E1000_REGISTER(hw, E1000_RADV), em_rx_abs_int_delay_dflt); - em_add_int_delay_sysctl(adapter, "tx_abs_int_delay", + em_add_int_delay_sysctl(sc, "tx_abs_int_delay", "transmit interrupt delay limit in usecs", - &adapter->tx_abs_int_delay, + &sc->tx_abs_int_delay, E1000_REGISTER(hw, E1000_TADV), em_tx_abs_int_delay_dflt); - em_add_int_delay_sysctl(adapter, "itr", + em_add_int_delay_sysctl(sc, "itr", "interrupt delay limit in usecs/4", - &adapter->tx_itr, + &sc->tx_itr, E1000_REGISTER(hw, E1000_ITR), DEFAULT_ITR); hw->mac.autoneg = DO_AUTO_NEG; - hw->phy.autoneg_wait_to_complete = FALSE; + hw->phy.autoneg_wait_to_complete = false; hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; - if (adapter->hw.mac.type < em_mac_min) { - e1000_init_script_state_82541(&adapter->hw, TRUE); - e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE); + if (hw->mac.type < em_mac_min) { + e1000_init_script_state_82541(hw, true); + e1000_set_tbi_compatibility_82543(hw, true); } /* Copper options */ if (hw->phy.media_type == e1000_media_type_copper) { hw->phy.mdix = AUTO_ALL_MODES; - hw->phy.disable_polarity_correction = FALSE; + hw->phy.disable_polarity_correction = false; hw->phy.ms_type = EM_MASTER_SLAVE; } @@ -1001,7 +1030,7 @@ em_if_attach_pre(if_ctx_t ctx) * Set the frame limits assuming * standard ethernet sized frames. */ - scctx->isc_max_frame_size = adapter->hw.mac.max_frame_size = + scctx->isc_max_frame_size = hw->mac.max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHERNET_FCS_SIZE; /* @@ -1011,9 +1040,9 @@ em_if_attach_pre(if_ctx_t ctx) hw->mac.report_tx_early = 1; /* Allocate multicast array memory. */ - adapter->mta = malloc(sizeof(u8) * ETHER_ADDR_LEN * + sc->mta = malloc(sizeof(u8) * ETHER_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT); - if (adapter->mta == NULL) { + if (sc->mta == NULL) { device_printf(dev, "Can not allocate multicast setup array\n"); error = ENOMEM; goto err_late; @@ -1026,12 +1055,9 @@ em_if_attach_pre(if_ctx_t ctx) /* Sysctl for setting Energy Efficient Ethernet */ hw->dev_spec.ich8lan.eee_disable = eee_setting; - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "eee_control", - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, - adapter, 0, em_sysctl_eee, "I", - "Disable Energy Efficient Ethernet"); + SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_control", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, + em_sysctl_eee, "I", "Disable Energy Efficient Ethernet"); /* ** Start from a known state, this is @@ -1064,13 +1090,27 @@ em_if_attach_pre(if_ctx_t ctx) } if (!em_is_valid_ether_addr(hw->mac.addr)) { - device_printf(dev, "Invalid MAC address\n"); - error = EIO; - goto err_late; +#ifndef __HAIKU__ + if (sc->vf_ifp) { + ether_gen_addr(iflib_get_ifp(ctx), + (struct ether_addr *)hw->mac.addr); + } else { +#else + { +#endif + device_printf(dev, "Invalid MAC address\n"); + error = EIO; + goto err_late; + } } + /* Save the EEPROM/NVM versions, must be done under IFLIB_CTX_LOCK */ + em_fw_version_locked(ctx); + + em_print_fw_version(sc); + /* Disable ULP support */ - e1000_disable_ulp_lpt_lp(hw, TRUE); + e1000_disable_ulp_lpt_lp(hw, true); /* * Get Wake-on-Lan and Management info for later use @@ -1079,7 +1119,7 @@ em_if_attach_pre(if_ctx_t ctx) /* Enable only WOL MAGIC by default */ scctx->isc_capenable &= ~IFCAP_WOL; - if (adapter->wol != 0) + if (sc->wol != 0) scctx->isc_capenable |= IFCAP_WOL_MAGIC; iflib_set_mac(ctx, hw->mac.addr); @@ -1087,10 +1127,10 @@ em_if_attach_pre(if_ctx_t ctx) return (0); err_late: - em_release_hw_control(adapter); + em_release_hw_control(sc); err_pci: em_free_pci_resources(ctx); - free(adapter->mta, M_DEVBUF); + free(sc->mta, M_DEVBUF); return (error); } @@ -1098,38 +1138,35 @@ err_pci: static int em_if_attach_post(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; int error = 0; - + /* Setup OS specific network interface */ error = em_setup_interface(ctx); if (error != 0) { + device_printf(sc->dev, "Interface setup failed: %d\n", error); goto err_late; } em_reset(ctx); /* Initialize statistics */ - em_update_stats_counters(adapter); + em_update_stats_counters(sc); hw->mac.get_link_status = 1; em_if_update_admin_status(ctx); - em_add_hw_stats(adapter); + em_add_hw_stats(sc); /* Non-AMT based hardware can now take control from firmware */ - if (adapter->has_manage && !adapter->has_amt) - em_get_hw_control(adapter); + if (sc->has_manage && !sc->has_amt) + em_get_hw_control(sc); INIT_DEBUGOUT("em_if_attach_post: end"); - return (error); + return (0); err_late: - em_release_hw_control(adapter); - em_free_pci_resources(ctx); - em_if_queues_free(ctx); - free(adapter->mta, M_DEVBUF); - + /* upon attach_post() error, iflib calls _if_detach() to free resources. */ return (error); } @@ -1145,15 +1182,17 @@ err_late: static int em_if_detach(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); INIT_DEBUGOUT("em_if_detach: begin"); - e1000_phy_hw_reset(&adapter->hw); + e1000_phy_hw_reset(&sc->hw); - em_release_manageability(adapter); - em_release_hw_control(adapter); + em_release_manageability(sc); + em_release_hw_control(sc); em_free_pci_resources(ctx); + free(sc->mta, M_DEVBUF); + sc->mta = NULL; return (0); } @@ -1176,10 +1215,10 @@ em_if_shutdown(if_ctx_t ctx) static int em_if_suspend(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); - em_release_manageability(adapter); - em_release_hw_control(adapter); + em_release_manageability(sc); + em_release_hw_control(sc); em_enable_wakeup(ctx); return (0); } @@ -1187,12 +1226,12 @@ em_if_suspend(if_ctx_t ctx) static int em_if_resume(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); - if (adapter->hw.mac.type == e1000_pch2lan) - e1000_resume_workarounds_pchlan(&adapter->hw); + if (sc->hw.mac.type == e1000_pch2lan) + e1000_resume_workarounds_pchlan(&sc->hw); em_if_init(ctx); - em_init_manageability(adapter); + em_init_manageability(sc); return(0); } @@ -1201,12 +1240,12 @@ static int em_if_mtu_set(if_ctx_t ctx, uint32_t mtu) { int max_frame_size; - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); if_softc_ctx_t scctx = iflib_get_softc_ctx(ctx); - IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); + IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); - switch (adapter->hw.mac.type) { + switch (sc->hw.mac.type) { case e1000_82571: case e1000_82572: case e1000_ich9lan: @@ -1215,6 +1254,9 @@ em_if_mtu_set(if_ctx_t ctx, uint32_t mtu) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: case e1000_82574: case e1000_82583: case e1000_80003es2lan: @@ -1230,7 +1272,7 @@ em_if_mtu_set(if_ctx_t ctx, uint32_t mtu) max_frame_size = ETHER_MAX_LEN; break; default: - if (adapter->hw.mac.type >= igb_mac_min) + if (sc->hw.mac.type >= igb_mac_min) max_frame_size = 9234; else /* lem */ max_frame_size = MAX_JUMBO_FRAME_SIZE; @@ -1239,7 +1281,7 @@ em_if_mtu_set(if_ctx_t ctx, uint32_t mtu) return (EINVAL); } - scctx->isc_max_frame_size = adapter->hw.mac.max_frame_size = + scctx->isc_max_frame_size = sc->hw.mac.max_frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; return (0); } @@ -1256,8 +1298,8 @@ em_if_mtu_set(if_ctx_t ctx, uint32_t mtu) static void em_if_init(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - if_softc_ctx_t scctx = adapter->shared; + struct e1000_softc *sc = iflib_get_softc(ctx); + if_softc_ctx_t scctx = sc->shared; struct ifnet *ifp = iflib_get_ifp(ctx); struct em_tx_queue *tx_que; int i; @@ -1265,11 +1307,11 @@ em_if_init(if_ctx_t ctx) INIT_DEBUGOUT("em_if_init: begin"); /* Get the latest mac address, User can use a LAA */ - bcopy(if_getlladdr(ifp), adapter->hw.mac.addr, + bcopy(if_getlladdr(ifp), sc->hw.mac.addr, ETHER_ADDR_LEN); /* Put the address into the Receive Address Array */ - e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); + e1000_rar_set(&sc->hw, sc->hw.mac.addr, 0); /* * With the 82571 adapter, RAR[0] may be overwritten @@ -1277,9 +1319,9 @@ em_if_init(if_ctx_t ctx) * in RAR[14] for that eventuality, this assures * the interface continues to function. */ - if (adapter->hw.mac.type == e1000_82571) { - e1000_set_laa_state_82571(&adapter->hw, TRUE); - e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, + if (sc->hw.mac.type == e1000_82571) { + e1000_set_laa_state_82571(&sc->hw, true); + e1000_rar_set(&sc->hw, sc->hw.mac.addr, E1000_RAR_ENTRIES - 1); } @@ -1288,7 +1330,7 @@ em_if_init(if_ctx_t ctx) em_reset(ctx); em_if_update_admin_status(ctx); - for (i = 0, tx_que = adapter->tx_queues; i < adapter->tx_num_queues; i++, tx_que++) { + for (i = 0, tx_que = sc->tx_queues; i < sc->tx_num_queues; i++, tx_que++) { struct tx_ring *txr = &tx_que->txr; txr->tx_rs_cidx = txr->tx_rs_pidx; @@ -1302,14 +1344,14 @@ em_if_init(if_ctx_t ctx) } /* Setup VLAN support, basic and offload if available */ - E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN); + E1000_WRITE_REG(&sc->hw, E1000_VET, ETHERTYPE_VLAN); /* Clear bad data from Rx FIFOs */ - if (adapter->hw.mac.type >= igb_mac_min) - e1000_rx_fifo_flush_82575(&adapter->hw); + if (sc->hw.mac.type >= igb_mac_min) + e1000_rx_fifo_flush_base(&sc->hw); /* Configure for OS presence */ - em_init_manageability(adapter); + em_init_manageability(sc); /* Prepare transmit descriptors and buffers */ em_initialize_transmit_unit(ctx); @@ -1317,57 +1359,42 @@ em_if_init(if_ctx_t ctx) /* Setup Multicast table */ em_if_multi_set(ctx); - adapter->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); + sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); em_initialize_receive_unit(ctx); - /* Use real VLAN Filter support? */ - if (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) { - if (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) - /* Use real VLAN Filter support */ - em_setup_vlan_hw_support(adapter); - else { - u32 ctrl; - ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL); - ctrl |= E1000_CTRL_VME; - E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl); - } - } else { - u32 ctrl; - ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL); - ctrl &= ~E1000_CTRL_VME; - E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl); - } + /* Set up VLAN support and filter */ + em_setup_vlan_hw_support(ctx); /* Don't lose promiscuous settings */ em_if_set_promisc(ctx, if_getflags(ifp)); - e1000_clear_hw_cntrs_base_generic(&adapter->hw); + e1000_clear_hw_cntrs_base_generic(&sc->hw); /* MSI-X configuration for 82574 */ - if (adapter->hw.mac.type == e1000_82574) { - int tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); + if (sc->hw.mac.type == e1000_82574) { + int tmp = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); tmp |= E1000_CTRL_EXT_PBA_CLR; - E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp); + E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, tmp); /* Set the IVAR - interrupt vector routing. */ - E1000_WRITE_REG(&adapter->hw, E1000_IVAR, adapter->ivars); - } else if (adapter->intr_type == IFLIB_INTR_MSIX) /* Set up queue routing */ - igb_configure_queues(adapter); + E1000_WRITE_REG(&sc->hw, E1000_IVAR, sc->ivars); + } else if (sc->intr_type == IFLIB_INTR_MSIX) /* Set up queue routing */ + igb_configure_queues(sc); /* this clears any pending interrupts */ - E1000_READ_REG(&adapter->hw, E1000_ICR); - E1000_WRITE_REG(&adapter->hw, E1000_ICS, E1000_ICS_LSC); + E1000_READ_REG(&sc->hw, E1000_ICR); + E1000_WRITE_REG(&sc->hw, E1000_ICS, E1000_ICS_LSC); /* AMT based hardware can now take control from firmware */ - if (adapter->has_manage && adapter->has_amt) - em_get_hw_control(adapter); + if (sc->has_manage && sc->has_amt) + em_get_hw_control(sc); /* Set Energy Efficient Ethernet */ - if (adapter->hw.mac.type >= igb_mac_min && - adapter->hw.phy.media_type == e1000_media_type_copper) { - if (adapter->hw.mac.type == e1000_i354) - e1000_set_eee_i354(&adapter->hw, TRUE, TRUE); + if (sc->hw.mac.type >= igb_mac_min && + sc->hw.phy.media_type == e1000_media_type_copper) { + if (sc->hw.mac.type == e1000_i354) + e1000_set_eee_i354(&sc->hw, true, true); else - e1000_set_eee_i350(&adapter->hw, TRUE, TRUE); + e1000_set_eee_i350(&sc->hw, true, true); } } @@ -1379,11 +1406,11 @@ em_if_init(if_ctx_t ctx) int em_intr(void *arg) { - struct adapter *adapter = arg; - if_ctx_t ctx = adapter->ctx; + struct e1000_softc *sc = arg; + if_ctx_t ctx = sc->ctx; u32 reg_icr; - reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); + reg_icr = E1000_READ_REG(&sc->hw, E1000_ICR); /* Hot eject? */ if (reg_icr == 0xffffffff) @@ -1397,7 +1424,7 @@ em_intr(void *arg) * Starting with the 82571 chip, bit 31 should be used to * determine whether the interrupt belongs to us. */ - if (adapter->hw.mac.type >= e1000_82571 && + if (sc->hw.mac.type >= e1000_82571 && (reg_icr & E1000_ICR_INT_ASSERTED) == 0) return FILTER_STRAY; @@ -1414,7 +1441,7 @@ em_intr(void *arg) em_handle_link(ctx); if (reg_icr & E1000_ICR_RXO) - adapter->rx_overruns++; + sc->rx_overruns++; return (FILTER_SCHEDULE_THREAD); } @@ -1422,40 +1449,40 @@ em_intr(void *arg) static int em_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) { - struct adapter *adapter = iflib_get_softc(ctx); - struct em_rx_queue *rxq = &adapter->rx_queues[rxqid]; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct em_rx_queue *rxq = &sc->rx_queues[rxqid]; - E1000_WRITE_REG(&adapter->hw, E1000_IMS, rxq->eims); + E1000_WRITE_REG(&sc->hw, E1000_IMS, rxq->eims); return (0); } static int em_if_tx_queue_intr_enable(if_ctx_t ctx, uint16_t txqid) { - struct adapter *adapter = iflib_get_softc(ctx); - struct em_tx_queue *txq = &adapter->tx_queues[txqid]; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct em_tx_queue *txq = &sc->tx_queues[txqid]; - E1000_WRITE_REG(&adapter->hw, E1000_IMS, txq->eims); + E1000_WRITE_REG(&sc->hw, E1000_IMS, txq->eims); return (0); } static int igb_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid) { - struct adapter *adapter = iflib_get_softc(ctx); - struct em_rx_queue *rxq = &adapter->rx_queues[rxqid]; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct em_rx_queue *rxq = &sc->rx_queues[rxqid]; - E1000_WRITE_REG(&adapter->hw, E1000_EIMS, rxq->eims); + E1000_WRITE_REG(&sc->hw, E1000_EIMS, rxq->eims); return (0); } static int igb_if_tx_queue_intr_enable(if_ctx_t ctx, uint16_t txqid) { - struct adapter *adapter = iflib_get_softc(ctx); - struct em_tx_queue *txq = &adapter->tx_queues[txqid]; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct em_tx_queue *txq = &sc->tx_queues[txqid]; - E1000_WRITE_REG(&adapter->hw, E1000_EIMS, txq->eims); + E1000_WRITE_REG(&sc->hw, E1000_EIMS, txq->eims); return (0); } @@ -1482,37 +1509,35 @@ em_msix_que(void *arg) static int em_msix_link(void *arg) { - struct adapter *adapter = arg; + struct e1000_softc *sc = arg; u32 reg_icr; - ++adapter->link_irq; - MPASS(adapter->hw.back != NULL); - reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); + ++sc->link_irq; + MPASS(sc->hw.back != NULL); + reg_icr = E1000_READ_REG(&sc->hw, E1000_ICR); if (reg_icr & E1000_ICR_RXO) - adapter->rx_overruns++; + sc->rx_overruns++; - if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { - em_handle_link(adapter->ctx); - } else if (adapter->hw.mac.type == e1000_82574) { - /* Only re-arm 82574 if em_if_update_admin_status() won't. */ - E1000_WRITE_REG(&adapter->hw, E1000_IMS, EM_MSIX_LINK | - E1000_IMS_LSC); - } + if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) + em_handle_link(sc->ctx); - if (adapter->hw.mac.type == e1000_82574) { + /* Re-arm unconditionally */ + if (sc->hw.mac.type >= igb_mac_min) { + E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC); + E1000_WRITE_REG(&sc->hw, E1000_EIMS, sc->link_mask); + } else if (sc->hw.mac.type == e1000_82574) { + E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC | + E1000_IMS_OTHER); /* * Because we must read the ICR for this interrupt it may * clear other causes using autoclear, for this reason we * simply create a soft interrupt for all these vectors. */ if (reg_icr) - E1000_WRITE_REG(&adapter->hw, E1000_ICS, adapter->ims); - } else { - /* Re-arm unconditionally */ - E1000_WRITE_REG(&adapter->hw, E1000_IMS, E1000_IMS_LSC); - E1000_WRITE_REG(&adapter->hw, E1000_EIMS, adapter->link_mask); - } + E1000_WRITE_REG(&sc->hw, E1000_ICS, sc->ims); + } else + E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC); return (FILTER_HANDLED); } @@ -1521,9 +1546,9 @@ static void em_handle_link(void *context) { if_ctx_t ctx = context; - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); - adapter->hw.mac.get_link_status = 1; + sc->hw.mac.get_link_status = 1; iflib_admin_intr_deferred(ctx); } @@ -1538,7 +1563,7 @@ em_handle_link(void *context) static void em_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); u_char fiber_type = IFM_1000_SX; INIT_DEBUGOUT("em_if_media_status: begin"); @@ -1548,19 +1573,19 @@ em_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) ifmr->ifm_status = IFM_AVALID; ifmr->ifm_active = IFM_ETHER; - if (!adapter->link_active) { + if (!sc->link_active) { return; } ifmr->ifm_status |= IFM_ACTIVE; - if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || - (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) { - if (adapter->hw.mac.type == e1000_82545) + if ((sc->hw.phy.media_type == e1000_media_type_fiber) || + (sc->hw.phy.media_type == e1000_media_type_internal_serdes)) { + if (sc->hw.mac.type == e1000_82545) fiber_type = IFM_1000_LX; ifmr->ifm_active |= fiber_type | IFM_FDX; } else { - switch (adapter->link_speed) { + switch (sc->link_speed) { case 10: ifmr->ifm_active |= IFM_10_T; break; @@ -1571,7 +1596,7 @@ em_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) ifmr->ifm_active |= IFM_1000_T; break; } - if (adapter->link_duplex == FULL_DUPLEX) + if (sc->link_duplex == FULL_DUPLEX) ifmr->ifm_active |= IFM_FDX; else ifmr->ifm_active |= IFM_HDX; @@ -1589,7 +1614,7 @@ em_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr) static int em_if_media_change(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); struct ifmedia *ifm = iflib_get_media(ctx); INIT_DEBUGOUT("em_if_media_change: begin"); @@ -1599,33 +1624,33 @@ em_if_media_change(if_ctx_t ctx) switch (IFM_SUBTYPE(ifm->ifm_media)) { case IFM_AUTO: - adapter->hw.mac.autoneg = DO_AUTO_NEG; - adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; + sc->hw.mac.autoneg = DO_AUTO_NEG; + sc->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; break; case IFM_1000_LX: case IFM_1000_SX: case IFM_1000_T: - adapter->hw.mac.autoneg = DO_AUTO_NEG; - adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; + sc->hw.mac.autoneg = DO_AUTO_NEG; + sc->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; break; case IFM_100_TX: - adapter->hw.mac.autoneg = FALSE; - adapter->hw.phy.autoneg_advertised = 0; + sc->hw.mac.autoneg = false; + sc->hw.phy.autoneg_advertised = 0; if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) - adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL; + sc->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL; else - adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF; + sc->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF; break; case IFM_10_T: - adapter->hw.mac.autoneg = FALSE; - adapter->hw.phy.autoneg_advertised = 0; + sc->hw.mac.autoneg = false; + sc->hw.phy.autoneg_advertised = 0; if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) - adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL; + sc->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL; else - adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF; + sc->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF; break; default: - device_printf(adapter->dev, "Unsupported media type\n"); + device_printf(sc->dev, "Unsupported media type\n"); } em_if_init(ctx); @@ -1636,58 +1661,50 @@ em_if_media_change(if_ctx_t ctx) static int em_if_set_promisc(if_ctx_t ctx, int flags) { - struct adapter *adapter = iflib_get_softc(ctx); - u32 reg_rctl; - - em_disable_promisc(ctx); - - reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); - - if (flags & IFF_PROMISC) { - reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); - /* Turn this on if you want to see bad packets */ - if (em_debug_sbp) - reg_rctl |= E1000_RCTL_SBP; - E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); - } else if (flags & IFF_ALLMULTI) { - reg_rctl |= E1000_RCTL_MPE; - reg_rctl &= ~E1000_RCTL_UPE; - E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); - } - return (0); -} - -static void -em_disable_promisc(if_ctx_t ctx) -{ - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); struct ifnet *ifp = iflib_get_ifp(ctx); u32 reg_rctl; int mcnt = 0; - reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); - reg_rctl &= (~E1000_RCTL_UPE); - if (if_getflags(ifp) & IFF_ALLMULTI) + reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); + reg_rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_UPE); + if (flags & IFF_ALLMULTI) mcnt = MAX_NUM_MULTICAST_ADDRESSES; else - mcnt = if_llmaddr_count(ifp); - /* Don't disable if in MAX groups */ + mcnt = min(if_llmaddr_count(ifp), MAX_NUM_MULTICAST_ADDRESSES); + if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) - reg_rctl &= (~E1000_RCTL_MPE); - reg_rctl &= (~E1000_RCTL_SBP); - E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); + reg_rctl &= (~E1000_RCTL_MPE); + E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); + + if (flags & IFF_PROMISC) { + reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); + em_if_vlan_filter_disable(sc); + /* Turn this on if you want to see bad packets */ + if (em_debug_sbp) + reg_rctl |= E1000_RCTL_SBP; + E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); + } else { + if (flags & IFF_ALLMULTI) { + reg_rctl |= E1000_RCTL_MPE; + reg_rctl &= ~E1000_RCTL_UPE; + E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); + } + if (em_if_vlan_filter_used(ctx)) + em_if_vlan_filter_enable(sc); + } + return (0); } - static u_int -em_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) +em_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int idx) { u8 *mta = arg; - if (cnt == MAX_NUM_MULTICAST_ADDRESSES) - return (1); + if (idx == MAX_NUM_MULTICAST_ADDRESSES) + return (0); - bcopy(LLADDR(sdl), &mta[cnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN); + bcopy(LLADDR(sdl), &mta[idx * ETHER_ADDR_LEN], ETHER_ADDR_LEN); return (1); } @@ -1698,48 +1715,56 @@ em_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) * This routine is called whenever multicast address list is updated. * **********************************************************************/ - static void em_if_multi_set(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); struct ifnet *ifp = iflib_get_ifp(ctx); - u32 reg_rctl = 0; u8 *mta; /* Multicast array memory */ + u32 reg_rctl = 0; int mcnt = 0; IOCTL_DEBUGOUT("em_set_multi: begin"); - mta = adapter->mta; + mta = sc->mta; bzero(mta, sizeof(u8) * ETHER_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES); - if (adapter->hw.mac.type == e1000_82542 && - adapter->hw.revision_id == E1000_REVISION_2) { - reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); - if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) - e1000_pci_clear_mwi(&adapter->hw); + if (sc->hw.mac.type == e1000_82542 && + sc->hw.revision_id == E1000_REVISION_2) { + reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); + if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) + e1000_pci_clear_mwi(&sc->hw); reg_rctl |= E1000_RCTL_RST; - E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); + E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); msec_delay(5); } mcnt = if_foreach_llmaddr(ifp, em_copy_maddr, mta); - if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { - reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); - reg_rctl |= E1000_RCTL_MPE; - E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); - } else - e1000_update_mc_addr_list(&adapter->hw, mta, mcnt); + reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); - if (adapter->hw.mac.type == e1000_82542 && - adapter->hw.revision_id == E1000_REVISION_2) { - reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); + if (if_getflags(ifp) & IFF_PROMISC) + reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); + else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES || + if_getflags(ifp) & IFF_ALLMULTI) { + reg_rctl |= E1000_RCTL_MPE; + reg_rctl &= ~E1000_RCTL_UPE; + } else + reg_rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); + + E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); + + if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) + e1000_update_mc_addr_list(&sc->hw, mta, mcnt); + + if (sc->hw.mac.type == e1000_82542 && + sc->hw.revision_id == E1000_REVISION_2) { + reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); reg_rctl &= ~E1000_RCTL_RST; - E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl); + E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); msec_delay(5); - if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) - e1000_pci_set_mwi(&adapter->hw); + if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) + e1000_pci_set_mwi(&sc->hw); } } @@ -1764,8 +1789,8 @@ em_if_timer(if_ctx_t ctx, uint16_t qid) static void em_if_update_admin_status(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; device_t dev = iflib_get_dev(ctx); u32 link_check, thstat, ctrl; @@ -1782,7 +1807,7 @@ em_if_update_admin_status(if_ctx_t ctx) if (link_check) /* ESB2 fix */ e1000_cfg_on_link_up(hw); } else { - link_check = TRUE; + link_check = true; } break; case e1000_media_type_fiber: @@ -1792,7 +1817,7 @@ em_if_update_admin_status(if_ctx_t ctx) break; case e1000_media_type_internal_serdes: e1000_check_for_link(hw); - link_check = adapter->hw.mac.serdes_has_link; + link_check = hw->mac.serdes_has_link; break; /* VF device is type_unknown */ case e1000_media_type_unknown: @@ -1810,11 +1835,11 @@ em_if_update_admin_status(if_ctx_t ctx) } /* Now check for a transition */ - if (link_check && (adapter->link_active == 0)) { - e1000_get_speed_and_duplex(hw, &adapter->link_speed, - &adapter->link_duplex); + if (link_check && (sc->link_active == 0)) { + e1000_get_speed_and_duplex(hw, &sc->link_speed, + &sc->link_duplex); /* Check if we must disable SPEED_MODE bit on PCI-E */ - if ((adapter->link_speed != SPEED_1000) && + if ((sc->link_speed != SPEED_1000) && ((hw->mac.type == e1000_82571) || (hw->mac.type == e1000_82572))) { int tarc0; @@ -1824,11 +1849,11 @@ em_if_update_admin_status(if_ctx_t ctx) } if (bootverbose) device_printf(dev, "Link is up %d Mbps %s\n", - adapter->link_speed, - ((adapter->link_duplex == FULL_DUPLEX) ? + sc->link_speed, + ((sc->link_duplex == FULL_DUPLEX) ? "Full Duplex" : "Half Duplex")); - adapter->link_active = 1; - adapter->smartspeed = 0; + sc->link_active = 1; + sc->smartspeed = 0; if ((ctrl & E1000_CTRL_EXT_LINK_MODE_MASK) == E1000_CTRL_EXT_LINK_MODE_GMII && (thstat & E1000_THSTAT_LINK_THROTTLE)) @@ -1839,44 +1864,40 @@ em_if_update_admin_status(if_ctx_t ctx) (hw->phy.id == I210_I_PHY_ID)) msec_delay(I210_LINK_DELAY); /* Reset if the media type changed. */ - if ((hw->dev_spec._82575.media_changed) && - (adapter->hw.mac.type >= igb_mac_min)) { + if (hw->dev_spec._82575.media_changed && + hw->mac.type >= igb_mac_min) { hw->dev_spec._82575.media_changed = false; - adapter->flags |= IGB_MEDIA_RESET; + sc->flags |= IGB_MEDIA_RESET; em_reset(ctx); } iflib_link_state_change(ctx, LINK_STATE_UP, - IF_Mbps(adapter->link_speed)); - } else if (!link_check && (adapter->link_active == 1)) { - adapter->link_speed = 0; - adapter->link_duplex = 0; - adapter->link_active = 0; + IF_Mbps(sc->link_speed)); + } else if (!link_check && (sc->link_active == 1)) { + sc->link_speed = 0; + sc->link_duplex = 0; + sc->link_active = 0; iflib_link_state_change(ctx, LINK_STATE_DOWN, 0); } - em_update_stats_counters(adapter); + em_update_stats_counters(sc); /* Reset LAA into RAR[0] on 82571 */ if (hw->mac.type == e1000_82571 && e1000_get_laa_state_82571(hw)) e1000_rar_set(hw, hw->mac.addr, 0); if (hw->mac.type < em_mac_min) - lem_smartspeed(adapter); - else if (hw->mac.type == e1000_82574 && - adapter->intr_type == IFLIB_INTR_MSIX) - E1000_WRITE_REG(&adapter->hw, E1000_IMS, EM_MSIX_LINK | - E1000_IMS_LSC); + lem_smartspeed(sc); } static void em_if_watchdog_reset(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); /* * Just count the event; iflib(4) will already trigger a * sufficient reset of the controller. */ - adapter->watchdog_events++; + sc->watchdog_events++; } /********************************************************************* @@ -1888,16 +1909,16 @@ em_if_watchdog_reset(if_ctx_t ctx) static void em_if_stop(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); INIT_DEBUGOUT("em_if_stop: begin"); - e1000_reset_hw(&adapter->hw); - if (adapter->hw.mac.type >= e1000_82544) - E1000_WRITE_REG(&adapter->hw, E1000_WUFC, 0); + e1000_reset_hw(&sc->hw); + if (sc->hw.mac.type >= e1000_82544) + E1000_WRITE_REG(&sc->hw, E1000_WUFC, 0); - e1000_led_off(&adapter->hw); - e1000_cleanup_led(&adapter->hw); + e1000_led_off(&sc->hw); + e1000_cleanup_led(&sc->hw); } /********************************************************************* @@ -1909,49 +1930,56 @@ static void em_identify_hardware(if_ctx_t ctx) { device_t dev = iflib_get_dev(ctx); - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); /* Make sure our PCI config space has the necessary stuff set */ - adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); + sc->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); /* Save off the information about this board */ - adapter->hw.vendor_id = pci_get_vendor(dev); - adapter->hw.device_id = pci_get_device(dev); - adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); - adapter->hw.subsystem_vendor_id = + sc->hw.vendor_id = pci_get_vendor(dev); + sc->hw.device_id = pci_get_device(dev); + sc->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); + sc->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2); - adapter->hw.subsystem_device_id = + sc->hw.subsystem_device_id = pci_read_config(dev, PCIR_SUBDEV_0, 2); /* Do Shared Code Init and Setup */ - if (e1000_set_mac_type(&adapter->hw)) { + if (e1000_set_mac_type(&sc->hw)) { device_printf(dev, "Setup init failure\n"); return; } + + /* Are we a VF device? */ + if ((sc->hw.mac.type == e1000_vfadapt) || + (sc->hw.mac.type == e1000_vfadapt_i350)) + sc->vf_ifp = 1; + else + sc->vf_ifp = 0; } static int em_allocate_pci_resources(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); device_t dev = iflib_get_dev(ctx); int rid, val; rid = PCIR_BAR(0); - adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + sc->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (adapter->memory == NULL) { + if (sc->memory == NULL) { device_printf(dev, "Unable to allocate bus resource: memory\n"); return (ENXIO); } - adapter->osdep.mem_bus_space_tag = rman_get_bustag(adapter->memory); - adapter->osdep.mem_bus_space_handle = - rman_get_bushandle(adapter->memory); - adapter->hw.hw_addr = (u8 *)&adapter->osdep.mem_bus_space_handle; + sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->memory); + sc->osdep.mem_bus_space_handle = + rman_get_bushandle(sc->memory); + sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle; /* Only older adapters use IO mapping */ - if (adapter->hw.mac.type < em_mac_min && - adapter->hw.mac.type > e1000_82543) { + if (sc->hw.mac.type < em_mac_min && + sc->hw.mac.type > e1000_82543) { /* Figure our where our IO BAR is ? */ for (rid = PCIR_BAR(0); rid < PCIR_CIS;) { val = pci_read_config(dev, rid, 4); @@ -1967,21 +1995,21 @@ em_allocate_pci_resources(if_ctx_t ctx) device_printf(dev, "Unable to locate IO BAR\n"); return (ENXIO); } - adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT, + sc->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); - if (adapter->ioport == NULL) { + if (sc->ioport == NULL) { device_printf(dev, "Unable to allocate bus resource: " "ioport\n"); return (ENXIO); } - adapter->hw.io_base = 0; - adapter->osdep.io_bus_space_tag = - rman_get_bustag(adapter->ioport); - adapter->osdep.io_bus_space_handle = - rman_get_bushandle(adapter->ioport); + sc->hw.io_base = 0; + sc->osdep.io_bus_space_tag = + rman_get_bustag(sc->ioport); + sc->osdep.io_bus_space_handle = + rman_get_bushandle(sc->ioport); } - adapter->hw.back = &adapter->osdep; + sc->hw.back = &sc->osdep; return (0); } @@ -1994,20 +2022,20 @@ em_allocate_pci_resources(if_ctx_t ctx) static int em_if_msix_intr_assign(if_ctx_t ctx, int msix) { - struct adapter *adapter = iflib_get_softc(ctx); - struct em_rx_queue *rx_que = adapter->rx_queues; - struct em_tx_queue *tx_que = adapter->tx_queues; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct em_rx_queue *rx_que = sc->rx_queues; + struct em_tx_queue *tx_que = sc->tx_queues; int error, rid, i, vector = 0, rx_vectors; char buf[16]; /* First set up ring resources */ - for (i = 0; i < adapter->rx_num_queues; i++, rx_que++, vector++) { + for (i = 0; i < sc->rx_num_queues; i++, rx_que++, vector++) { rid = vector + 1; snprintf(buf, sizeof(buf), "rxq%d", i); error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid, IFLIB_INTR_RXTX, em_msix_que, rx_que, rx_que->me, buf); if (error) { device_printf(iflib_get_dev(ctx), "Failed to allocate que int %d err: %d", i, error); - adapter->rx_num_queues = i + 1; + sc->rx_num_queues = i + 1; goto fail; } @@ -2019,11 +2047,11 @@ em_if_msix_intr_assign(if_ctx_t ctx, int msix) * are for RX0 and RX1, note this has * NOTHING to do with the MSI-X vector */ - if (adapter->hw.mac.type == e1000_82574) { + if (sc->hw.mac.type == e1000_82574) { rx_que->eims = 1 << (20 + i); - adapter->ims |= rx_que->eims; - adapter->ivars |= (8 | rx_que->msix) << (i * 4); - } else if (adapter->hw.mac.type == e1000_82575) + sc->ims |= rx_que->eims; + sc->ivars |= (8 | rx_que->msix) << (i * 4); + } else if (sc->hw.mac.type == e1000_82575) rx_que->eims = E1000_EICR_TX_QUEUE0 << vector; else rx_que->eims = 1 << vector; @@ -2031,14 +2059,14 @@ em_if_msix_intr_assign(if_ctx_t ctx, int msix) rx_vectors = vector; vector = 0; - for (i = 0; i < adapter->tx_num_queues; i++, tx_que++, vector++) { + for (i = 0; i < sc->tx_num_queues; i++, tx_que++, vector++) { snprintf(buf, sizeof(buf), "txq%d", i); - tx_que = &adapter->tx_queues[i]; + tx_que = &sc->tx_queues[i]; iflib_softirq_alloc_generic(ctx, - &adapter->rx_queues[i % adapter->rx_num_queues].que_irq, + &sc->rx_queues[i % sc->rx_num_queues].que_irq, IFLIB_INTR_TX, tx_que, tx_que->me, buf); - tx_que->msix = (vector % adapter->rx_num_queues); + tx_que->msix = (vector % sc->rx_num_queues); /* * Set the bit to enable interrupt @@ -2046,11 +2074,11 @@ em_if_msix_intr_assign(if_ctx_t ctx, int msix) * are for TX0 and TX1, note this has * NOTHING to do with the MSI-X vector */ - if (adapter->hw.mac.type == e1000_82574) { + if (sc->hw.mac.type == e1000_82574) { tx_que->eims = 1 << (22 + i); - adapter->ims |= tx_que->eims; - adapter->ivars |= (8 | tx_que->msix) << (8 + (i * 4)); - } else if (adapter->hw.mac.type == e1000_82575) { + sc->ims |= tx_que->eims; + sc->ivars |= (8 | tx_que->msix) << (8 + (i * 4)); + } else if (sc->hw.mac.type == e1000_82575) { tx_que->eims = E1000_EICR_TX_QUEUE0 << i; } else { tx_que->eims = 1 << i; @@ -2059,42 +2087,45 @@ em_if_msix_intr_assign(if_ctx_t ctx, int msix) /* Link interrupt */ rid = rx_vectors + 1; - error = iflib_irq_alloc_generic(ctx, &adapter->irq, rid, IFLIB_INTR_ADMIN, em_msix_link, adapter, 0, "aq"); + error = iflib_irq_alloc_generic(ctx, &sc->irq, rid, IFLIB_INTR_ADMIN, em_msix_link, sc, 0, "aq"); if (error) { device_printf(iflib_get_dev(ctx), "Failed to register admin handler"); goto fail; } - adapter->linkvec = rx_vectors; - if (adapter->hw.mac.type < igb_mac_min) { - adapter->ivars |= (8 | rx_vectors) << 16; - adapter->ivars |= 0x80000000; + sc->linkvec = rx_vectors; + if (sc->hw.mac.type < igb_mac_min) { + sc->ivars |= (8 | rx_vectors) << 16; + sc->ivars |= 0x80000000; + /* Enable the "Other" interrupt type for link status change */ + sc->ims |= E1000_IMS_OTHER; } + return (0); fail: - iflib_irq_free(ctx, &adapter->irq); - rx_que = adapter->rx_queues; - for (int i = 0; i < adapter->rx_num_queues; i++, rx_que++) + iflib_irq_free(ctx, &sc->irq); + rx_que = sc->rx_queues; + for (int i = 0; i < sc->rx_num_queues; i++, rx_que++) iflib_irq_free(ctx, &rx_que->que_irq); return (error); } static void -igb_configure_queues(struct adapter *adapter) +igb_configure_queues(struct e1000_softc *sc) { - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; struct em_rx_queue *rx_que; struct em_tx_queue *tx_que; u32 tmp, ivar = 0, newitr = 0; /* First turn on RSS capability */ - if (adapter->hw.mac.type != e1000_82575) + if (hw->mac.type != e1000_82575) E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE | E1000_GPIE_EIAME | E1000_GPIE_PBA | E1000_GPIE_NSICR); /* Turn on MSI-X */ - switch (adapter->hw.mac.type) { + switch (hw->mac.type) { case e1000_82580: case e1000_i350: case e1000_i354: @@ -2103,10 +2134,10 @@ igb_configure_queues(struct adapter *adapter) case e1000_vfadapt: case e1000_vfadapt_i350: /* RX entries */ - for (int i = 0; i < adapter->rx_num_queues; i++) { + for (int i = 0; i < sc->rx_num_queues; i++) { u32 index = i >> 1; ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index); - rx_que = &adapter->rx_queues[i]; + rx_que = &sc->rx_queues[i]; if (i & 1) { ivar &= 0xFF00FFFF; ivar |= (rx_que->msix | E1000_IVAR_VALID) << 16; @@ -2117,10 +2148,10 @@ igb_configure_queues(struct adapter *adapter) E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar); } /* TX entries */ - for (int i = 0; i < adapter->tx_num_queues; i++) { + for (int i = 0; i < sc->tx_num_queues; i++) { u32 index = i >> 1; ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index); - tx_que = &adapter->tx_queues[i]; + tx_que = &sc->tx_queues[i]; if (i & 1) { ivar &= 0x00FFFFFF; ivar |= (tx_que->msix | E1000_IVAR_VALID) << 24; @@ -2129,20 +2160,20 @@ igb_configure_queues(struct adapter *adapter) ivar |= (tx_que->msix | E1000_IVAR_VALID) << 8; } E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar); - adapter->que_mask |= tx_que->eims; + sc->que_mask |= tx_que->eims; } /* And for the link interrupt */ - ivar = (adapter->linkvec | E1000_IVAR_VALID) << 8; - adapter->link_mask = 1 << adapter->linkvec; + ivar = (sc->linkvec | E1000_IVAR_VALID) << 8; + sc->link_mask = 1 << sc->linkvec; E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar); break; case e1000_82576: /* RX entries */ - for (int i = 0; i < adapter->rx_num_queues; i++) { + for (int i = 0; i < sc->rx_num_queues; i++) { u32 index = i & 0x7; /* Each IVAR has two entries */ ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index); - rx_que = &adapter->rx_queues[i]; + rx_que = &sc->rx_queues[i]; if (i < 8) { ivar &= 0xFFFFFF00; ivar |= rx_que->msix | E1000_IVAR_VALID; @@ -2151,13 +2182,13 @@ igb_configure_queues(struct adapter *adapter) ivar |= (rx_que->msix | E1000_IVAR_VALID) << 16; } E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar); - adapter->que_mask |= rx_que->eims; + sc->que_mask |= rx_que->eims; } /* TX entries */ - for (int i = 0; i < adapter->tx_num_queues; i++) { + for (int i = 0; i < sc->tx_num_queues; i++) { u32 index = i & 0x7; /* Each IVAR has two entries */ ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index); - tx_que = &adapter->tx_queues[i]; + tx_que = &sc->tx_queues[i]; if (i < 8) { ivar &= 0xFFFF00FF; ivar |= (tx_que->msix | E1000_IVAR_VALID) << 8; @@ -2166,12 +2197,12 @@ igb_configure_queues(struct adapter *adapter) ivar |= (tx_que->msix | E1000_IVAR_VALID) << 24; } E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar); - adapter->que_mask |= tx_que->eims; + sc->que_mask |= tx_que->eims; } /* And for the link interrupt */ - ivar = (adapter->linkvec | E1000_IVAR_VALID) << 8; - adapter->link_mask = 1 << adapter->linkvec; + ivar = (sc->linkvec | E1000_IVAR_VALID) << 8; + sc->link_mask = 1 << sc->linkvec; E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar); break; @@ -2185,20 +2216,20 @@ igb_configure_queues(struct adapter *adapter) E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp); /* Queues */ - for (int i = 0; i < adapter->rx_num_queues; i++) { - rx_que = &adapter->rx_queues[i]; + for (int i = 0; i < sc->rx_num_queues; i++) { + rx_que = &sc->rx_queues[i]; tmp = E1000_EICR_RX_QUEUE0 << i; tmp |= E1000_EICR_TX_QUEUE0 << i; rx_que->eims = tmp; E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), i, rx_que->eims); - adapter->que_mask |= rx_que->eims; + sc->que_mask |= rx_que->eims; } /* Link */ - E1000_WRITE_REG(hw, E1000_MSIXBM(adapter->linkvec), + E1000_WRITE_REG(hw, E1000_MSIXBM(sc->linkvec), E1000_EIMS_OTHER); - adapter->link_mask |= E1000_EIMS_OTHER; + sc->link_mask |= E1000_EIMS_OTHER; default: break; } @@ -2212,8 +2243,8 @@ igb_configure_queues(struct adapter *adapter) else newitr |= E1000_EITR_CNT_IGNR; - for (int i = 0; i < adapter->rx_num_queues; i++) { - rx_que = &adapter->rx_queues[i]; + for (int i = 0; i < sc->rx_num_queues; i++) { + rx_que = &sc->rx_queues[i]; E1000_WRITE_REG(hw, E1000_EITR(rx_que->msix), newitr); } @@ -2223,36 +2254,36 @@ igb_configure_queues(struct adapter *adapter) static void em_free_pci_resources(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct em_rx_queue *que = adapter->rx_queues; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct em_rx_queue *que = sc->rx_queues; device_t dev = iflib_get_dev(ctx); /* Release all MSI-X queue resources */ - if (adapter->intr_type == IFLIB_INTR_MSIX) - iflib_irq_free(ctx, &adapter->irq); + if (sc->intr_type == IFLIB_INTR_MSIX) + iflib_irq_free(ctx, &sc->irq); if (que != NULL) { - for (int i = 0; i < adapter->rx_num_queues; i++, que++) { + for (int i = 0; i < sc->rx_num_queues; i++, que++) { iflib_irq_free(ctx, &que->que_irq); } } - if (adapter->memory != NULL) { + if (sc->memory != NULL) { bus_release_resource(dev, SYS_RES_MEMORY, - rman_get_rid(adapter->memory), adapter->memory); - adapter->memory = NULL; + rman_get_rid(sc->memory), sc->memory); + sc->memory = NULL; } - if (adapter->flash != NULL) { + if (sc->flash != NULL) { bus_release_resource(dev, SYS_RES_MEMORY, - rman_get_rid(adapter->flash), adapter->flash); - adapter->flash = NULL; + rman_get_rid(sc->flash), sc->flash); + sc->flash = NULL; } - if (adapter->ioport != NULL) { + if (sc->ioport != NULL) { bus_release_resource(dev, SYS_RES_IOPORT, - rman_get_rid(adapter->ioport), adapter->ioport); - adapter->ioport = NULL; + rman_get_rid(sc->ioport), sc->ioport); + sc->ioport = NULL; } } @@ -2260,9 +2291,9 @@ em_free_pci_resources(if_ctx_t ctx) static int em_setup_msix(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); - if (adapter->hw.mac.type == e1000_82574) { + if (sc->hw.mac.type == e1000_82574) { em_enable_vectors_82574(ctx); } return (0); @@ -2274,58 +2305,58 @@ em_setup_msix(if_ctx_t ctx) * **********************************************************************/ static void -lem_smartspeed(struct adapter *adapter) +lem_smartspeed(struct e1000_softc *sc) { u16 phy_tmp; - if (adapter->link_active || (adapter->hw.phy.type != e1000_phy_igp) || - adapter->hw.mac.autoneg == 0 || - (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0) + if (sc->link_active || (sc->hw.phy.type != e1000_phy_igp) || + sc->hw.mac.autoneg == 0 || + (sc->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0) return; - if (adapter->smartspeed == 0) { + if (sc->smartspeed == 0) { /* If Master/Slave config fault is asserted twice, * we assume back-to-back */ - e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); + e1000_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp); if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) return; - e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); + e1000_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp); if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) { - e1000_read_phy_reg(&adapter->hw, + e1000_read_phy_reg(&sc->hw, PHY_1000T_CTRL, &phy_tmp); if(phy_tmp & CR_1000T_MS_ENABLE) { phy_tmp &= ~CR_1000T_MS_ENABLE; - e1000_write_phy_reg(&adapter->hw, + e1000_write_phy_reg(&sc->hw, PHY_1000T_CTRL, phy_tmp); - adapter->smartspeed++; - if(adapter->hw.mac.autoneg && - !e1000_copper_link_autoneg(&adapter->hw) && - !e1000_read_phy_reg(&adapter->hw, + sc->smartspeed++; + if(sc->hw.mac.autoneg && + !e1000_copper_link_autoneg(&sc->hw) && + !e1000_read_phy_reg(&sc->hw, PHY_CONTROL, &phy_tmp)) { phy_tmp |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); - e1000_write_phy_reg(&adapter->hw, + e1000_write_phy_reg(&sc->hw, PHY_CONTROL, phy_tmp); } } } return; - } else if(adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { + } else if(sc->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { /* If still no link, perhaps using 2/3 pair cable */ - e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); + e1000_read_phy_reg(&sc->hw, PHY_1000T_CTRL, &phy_tmp); phy_tmp |= CR_1000T_MS_ENABLE; - e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); - if(adapter->hw.mac.autoneg && - !e1000_copper_link_autoneg(&adapter->hw) && - !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) { + e1000_write_phy_reg(&sc->hw, PHY_1000T_CTRL, phy_tmp); + if(sc->hw.mac.autoneg && + !e1000_copper_link_autoneg(&sc->hw) && + !e1000_read_phy_reg(&sc->hw, PHY_CONTROL, &phy_tmp)) { phy_tmp |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); - e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp); + e1000_write_phy_reg(&sc->hw, PHY_CONTROL, phy_tmp); } } /* Restart process after EM_SMARTSPEED_MAX iterations */ - if(adapter->smartspeed++ == EM_SMARTSPEED_MAX) - adapter->smartspeed = 0; + if(sc->smartspeed++ == EM_SMARTSPEED_MAX) + sc->smartspeed = 0; } /********************************************************************* @@ -2334,10 +2365,10 @@ lem_smartspeed(struct adapter *adapter) * **********************************************************************/ static void -igb_init_dmac(struct adapter *adapter, u32 pba) +igb_init_dmac(struct e1000_softc *sc, u32 pba) { - device_t dev = adapter->dev; - struct e1000_hw *hw = &adapter->hw; + device_t dev = sc->dev; + struct e1000_hw *hw = &sc->hw; u32 dmac, reg = ~E1000_DMACR_DMAC_EN; u16 hwm; u16 max_frame_size; @@ -2345,10 +2376,10 @@ igb_init_dmac(struct adapter *adapter, u32 pba) if (hw->mac.type == e1000_i211) return; - max_frame_size = adapter->shared->isc_max_frame_size; + max_frame_size = sc->shared->isc_max_frame_size; if (hw->mac.type > e1000_82580) { - if (adapter->dmac == 0) { /* Disabling it */ + if (sc->dmac == 0) { /* Disabling it */ E1000_WRITE_REG(hw, E1000_DMACR, reg); return; } else @@ -2388,11 +2419,11 @@ igb_init_dmac(struct adapter *adapter, u32 pba) int status = E1000_READ_REG(hw, E1000_STATUS); if ((status & E1000_STATUS_2P5_SKU) && (!(status & E1000_STATUS_2P5_SKU_OVER))) - reg |= ((adapter->dmac * 5) >> 6); + reg |= ((sc->dmac * 5) >> 6); else - reg |= (adapter->dmac >> 5); + reg |= (sc->dmac >> 5); } else { - reg |= (adapter->dmac >> 5); + reg |= (sc->dmac >> 5); } E1000_WRITE_REG(hw, E1000_DMACR, reg); @@ -2440,22 +2471,22 @@ igb_init_dmac(struct adapter *adapter, u32 pba) /********************************************************************* * * Initialize the hardware to a configuration as specified by the - * adapter structure. + * sc structure. * **********************************************************************/ static void em_reset(if_ctx_t ctx) { device_t dev = iflib_get_dev(ctx); - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); struct ifnet *ifp = iflib_get_ifp(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; u16 rx_buffer_size; u32 pba; INIT_DEBUGOUT("em_reset: begin"); /* Let the firmware know the OS is in control */ - em_get_hw_control(adapter); + em_get_hw_control(sc); /* Set up smart power down as default off on newer adapters. */ if (!em_smart_pwr_down && (hw->mac.type == e1000_82571 || @@ -2474,13 +2505,22 @@ em_reset(if_ctx_t ctx) * the remainder is used for the transmit buffer. */ switch (hw->mac.type) { - /* Total Packet Buffer on these is 48K */ + /* 82547: Total Packet Buffer is 40K */ + case e1000_82547: + case e1000_82547_rev_2: + if (hw->mac.max_frame_size > 8192) + pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ + else + pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ + break; + /* 82571/82572/80003es2lan: Total Packet Buffer is 48K */ case e1000_82571: case e1000_82572: case e1000_80003es2lan: pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */ break; - case e1000_82573: /* 82573: Total Packet Buffer is 32K */ + /* 82573: Total Packet Buffer is 32K */ + case e1000_82573: pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */ break; case e1000_82574: @@ -2493,7 +2533,7 @@ em_reset(if_ctx_t ctx) case e1000_ich9lan: case e1000_ich10lan: /* Boost Receive side for jumbo frames */ - if (adapter->hw.mac.max_frame_size > 4096) + if (hw->mac.max_frame_size > 4096) pba = E1000_PBA_14K; else pba = E1000_PBA_10K; @@ -2503,6 +2543,9 @@ em_reset(if_ctx_t ctx) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: pba = E1000_PBA_26K; break; case e1000_82575: @@ -2525,7 +2568,8 @@ em_reset(if_ctx_t ctx) pba = E1000_PBA_34K; break; default: - if (adapter->hw.mac.max_frame_size > 8192) + /* Remaining devices assumed to have a Packet Buffer of 64K. */ + if (hw->mac.max_frame_size > 8192) pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ else pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ @@ -2537,11 +2581,11 @@ em_reset(if_ctx_t ctx) pba = E1000_READ_REG(hw, E1000_PBA); tx_space = pba >> 16; pba &= 0xffff; - min_tx = (adapter->hw.mac.max_frame_size + + min_tx = (hw->mac.max_frame_size + sizeof(struct e1000_tx_desc) - ETHERNET_FCS_SIZE) * 2; min_tx = roundup2(min_tx, 1024); min_tx >>= 10; - min_rx = adapter->hw.mac.max_frame_size; + min_rx = hw->mac.max_frame_size; min_rx = roundup2(min_rx, 1024); min_rx >>= 10; if (tx_space < min_tx && @@ -2558,7 +2602,7 @@ em_reset(if_ctx_t ctx) } if (hw->mac.type < igb_mac_min) - E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba); + E1000_WRITE_REG(hw, E1000_PBA, pba); INIT_DEBUGOUT1("em_reset: pba=%dK",pba); @@ -2578,11 +2622,11 @@ em_reset(if_ctx_t ctx) */ rx_buffer_size = (pba & 0xffff) << 10; hw->fc.high_water = rx_buffer_size - - roundup2(adapter->hw.mac.max_frame_size, 1024); + roundup2(hw->mac.max_frame_size, 1024); hw->fc.low_water = hw->fc.high_water - 1500; - if (adapter->fc) /* locally set flow control value? */ - hw->fc.requested_mode = adapter->fc; + if (sc->fc) /* locally set flow control value? */ + hw->fc.requested_mode = sc->fc; else hw->fc.requested_mode = e1000_fc_full; @@ -2591,7 +2635,7 @@ em_reset(if_ctx_t ctx) else hw->fc.pause_time = EM_FC_PAUSE_TIME; - hw->fc.send_xon = TRUE; + hw->fc.send_xon = true; /* Device specific overrides/settings */ switch (hw->mac.type) { @@ -2612,6 +2656,9 @@ em_reset(if_ctx_t ctx) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_tgp: + case e1000_pch_adp: + case e1000_pch_mtp: hw->fc.high_water = 0x5C20; hw->fc.low_water = 0x5048; hw->fc.pause_time = 0x0650; @@ -2653,24 +2700,24 @@ em_reset(if_ctx_t ctx) /* Issue a global reset */ e1000_reset_hw(hw); - if (adapter->hw.mac.type >= igb_mac_min) { + if (hw->mac.type >= igb_mac_min) { E1000_WRITE_REG(hw, E1000_WUC, 0); } else { E1000_WRITE_REG(hw, E1000_WUFC, 0); - em_disable_aspm(adapter); + em_disable_aspm(sc); } - if (adapter->flags & IGB_MEDIA_RESET) { - e1000_setup_init_funcs(hw, TRUE); + if (sc->flags & IGB_MEDIA_RESET) { + e1000_setup_init_funcs(hw, true); e1000_get_bus_info(hw); - adapter->flags &= ~IGB_MEDIA_RESET; + sc->flags &= ~IGB_MEDIA_RESET; } /* and a re-init */ if (e1000_init_hw(hw) < 0) { device_printf(dev, "Hardware Initialization Failed\n"); return; } - if (adapter->hw.mac.type >= igb_mac_min) - igb_init_dmac(adapter, pba); + if (hw->mac.type >= igb_mac_min) + igb_init_dmac(sc, pba); E1000_WRITE_REG(hw, E1000_VET, ETHERTYPE_VLAN); e1000_get_phy_info(hw); @@ -2684,11 +2731,11 @@ em_reset(if_ctx_t ctx) #define RSSKEYLEN 10 static void -em_initialize_rss_mapping(struct adapter *adapter) +em_initialize_rss_mapping(struct e1000_softc *sc) { uint8_t rss_key[4 * RSSKEYLEN]; uint32_t reta = 0; - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; int i; /* @@ -2709,7 +2756,7 @@ em_initialize_rss_mapping(struct adapter *adapter) for (i = 0; i < sizeof(reta); ++i) { uint32_t q; - q = (i % adapter->rx_num_queues) << 7; + q = (i % sc->rx_num_queues) << 7; reta |= q << (8 * i); } @@ -2725,16 +2772,16 @@ em_initialize_rss_mapping(struct adapter *adapter) } static void -igb_initialize_rss_mapping(struct adapter *adapter) +igb_initialize_rss_mapping(struct e1000_softc *sc) { - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; int i; int queue_id; u32 reta; u32 rss_key[10], mrqc, shift = 0; /* XXX? */ - if (adapter->hw.mac.type == e1000_82575) + if (hw->mac.type == e1000_82575) shift = 6; /* @@ -2768,9 +2815,9 @@ igb_initialize_rss_mapping(struct adapter *adapter) * the case so we don't go out of bounds * indexing arrays and such. */ - queue_id = queue_id % adapter->rx_num_queues; + queue_id = queue_id % sc->rx_num_queues; #else - queue_id = (i % adapter->rx_num_queues); + queue_id = (i % sc->rx_num_queues); #endif /* Adjust if required */ queue_id = queue_id << shift; @@ -2793,7 +2840,7 @@ igb_initialize_rss_mapping(struct adapter *adapter) * MRQC: Multiple Receive Queues Command * Set queuing to RSS control, number depends on the device. */ - mrqc = E1000_MRQC_ENABLE_RSS_8Q; + mrqc = E1000_MRQC_ENABLE_RSS_MQ; #ifdef RSS /* XXX ew typecasting */ @@ -2828,13 +2875,13 @@ static int em_setup_interface(if_ctx_t ctx) { struct ifnet *ifp = iflib_get_ifp(ctx); - struct adapter *adapter = iflib_get_softc(ctx); - if_softc_ctx_t scctx = adapter->shared; + struct e1000_softc *sc = iflib_get_softc(ctx); + if_softc_ctx_t scctx = sc->shared; INIT_DEBUGOUT("em_setup_interface: begin"); /* Single Queue */ - if (adapter->tx_num_queues == 1) { + if (sc->tx_num_queues == 1) { if_setsendqlen(ifp, scctx->isc_ntxd[0] - 1); if_setsendqready(ifp); } @@ -2843,54 +2890,54 @@ em_setup_interface(if_ctx_t ctx) * Specify the media types supported by this adapter and register * callbacks to update media and link information */ - if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || - (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) { + if (sc->hw.phy.media_type == e1000_media_type_fiber || + sc->hw.phy.media_type == e1000_media_type_internal_serdes) { u_char fiber_type = IFM_1000_SX; /* default type */ - if (adapter->hw.mac.type == e1000_82545) + if (sc->hw.mac.type == e1000_82545) fiber_type = IFM_1000_LX; - ifmedia_add(adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 0, NULL); - ifmedia_add(adapter->media, IFM_ETHER | fiber_type, 0, NULL); + ifmedia_add(sc->media, IFM_ETHER | fiber_type | IFM_FDX, 0, NULL); + ifmedia_add(sc->media, IFM_ETHER | fiber_type, 0, NULL); } else { - ifmedia_add(adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); - ifmedia_add(adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 0, NULL); - ifmedia_add(adapter->media, IFM_ETHER | IFM_100_TX, 0, NULL); - ifmedia_add(adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 0, NULL); - if (adapter->hw.phy.type != e1000_phy_ife) { - ifmedia_add(adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); - ifmedia_add(adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); + ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL); + ifmedia_add(sc->media, IFM_ETHER | IFM_10_T | IFM_FDX, 0, NULL); + ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL); + ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 0, NULL); + if (sc->hw.phy.type != e1000_phy_ife) { + ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); + ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL); } } - ifmedia_add(adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); - ifmedia_set(adapter->media, IFM_ETHER | IFM_AUTO); + ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); + ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); return (0); } static int em_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs, int ntxqsets) { - struct adapter *adapter = iflib_get_softc(ctx); - if_softc_ctx_t scctx = adapter->shared; + struct e1000_softc *sc = iflib_get_softc(ctx); + if_softc_ctx_t scctx = sc->shared; int error = E1000_SUCCESS; struct em_tx_queue *que; int i, j; - MPASS(adapter->tx_num_queues > 0); - MPASS(adapter->tx_num_queues == ntxqsets); + MPASS(sc->tx_num_queues > 0); + MPASS(sc->tx_num_queues == ntxqsets); /* First allocate the top level queue structs */ - if (!(adapter->tx_queues = + if (!(sc->tx_queues = (struct em_tx_queue *) malloc(sizeof(struct em_tx_queue) * - adapter->tx_num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) { + sc->tx_num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) { device_printf(iflib_get_dev(ctx), "Unable to allocate queue memory\n"); return(ENOMEM); } - for (i = 0, que = adapter->tx_queues; i < adapter->tx_num_queues; i++, que++) { + for (i = 0, que = sc->tx_queues; i < sc->tx_num_queues; i++, que++) { /* Set up some basics */ struct tx_ring *txr = &que->txr; - txr->adapter = que->adapter = adapter; + txr->sc = que->sc = sc; que->me = txr->me = i; /* Allocate report status array */ @@ -2908,7 +2955,7 @@ em_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs if (bootverbose) device_printf(iflib_get_dev(ctx), - "allocated for %d tx_queues\n", adapter->tx_num_queues); + "allocated for %d tx_queues\n", sc->tx_num_queues); return (0); fail: em_if_queues_free(ctx); @@ -2918,27 +2965,27 @@ fail: static int em_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nrxqs, int nrxqsets) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); int error = E1000_SUCCESS; struct em_rx_queue *que; int i; - MPASS(adapter->rx_num_queues > 0); - MPASS(adapter->rx_num_queues == nrxqsets); + MPASS(sc->rx_num_queues > 0); + MPASS(sc->rx_num_queues == nrxqsets); /* First allocate the top level queue structs */ - if (!(adapter->rx_queues = + if (!(sc->rx_queues = (struct em_rx_queue *) malloc(sizeof(struct em_rx_queue) * - adapter->rx_num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) { + sc->rx_num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) { device_printf(iflib_get_dev(ctx), "Unable to allocate queue memory\n"); error = ENOMEM; goto fail; } - for (i = 0, que = adapter->rx_queues; i < nrxqsets; i++, que++) { + for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) { /* Set up some basics */ struct rx_ring *rxr = &que->rxr; - rxr->adapter = que->adapter = adapter; + rxr->sc = que->sc = sc; rxr->que = que; que->me = rxr->me = i; @@ -2949,7 +2996,7 @@ em_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nrxqs if (bootverbose) device_printf(iflib_get_dev(ctx), - "allocated for %d rx_queues\n", adapter->rx_num_queues); + "allocated for %d rx_queues\n", sc->rx_num_queues); return (0); fail: @@ -2960,12 +3007,12 @@ fail: static void em_if_queues_free(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct em_tx_queue *tx_que = adapter->tx_queues; - struct em_rx_queue *rx_que = adapter->rx_queues; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct em_tx_queue *tx_que = sc->tx_queues; + struct em_rx_queue *rx_que = sc->rx_queues; if (tx_que != NULL) { - for (int i = 0; i < adapter->tx_num_queues; i++, tx_que++) { + for (int i = 0; i < sc->tx_num_queues; i++, tx_que++) { struct tx_ring *txr = &tx_que->txr; if (txr->tx_rsq == NULL) break; @@ -2973,19 +3020,13 @@ em_if_queues_free(if_ctx_t ctx) free(txr->tx_rsq, M_DEVBUF); txr->tx_rsq = NULL; } - free(adapter->tx_queues, M_DEVBUF); - adapter->tx_queues = NULL; + free(sc->tx_queues, M_DEVBUF); + sc->tx_queues = NULL; } if (rx_que != NULL) { - free(adapter->rx_queues, M_DEVBUF); - adapter->rx_queues = NULL; - } - - em_release_hw_control(adapter); - - if (adapter->mta != NULL) { - free(adapter->mta, M_DEVBUF); + free(sc->rx_queues, M_DEVBUF); + sc->rx_queues = NULL; } } @@ -2997,20 +3038,20 @@ em_if_queues_free(if_ctx_t ctx) static void em_initialize_transmit_unit(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - if_softc_ctx_t scctx = adapter->shared; + struct e1000_softc *sc = iflib_get_softc(ctx); + if_softc_ctx_t scctx = sc->shared; struct em_tx_queue *que; struct tx_ring *txr; - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; u32 tctl, txdctl = 0, tarc, tipg = 0; INIT_DEBUGOUT("em_initialize_transmit_unit: begin"); - for (int i = 0; i < adapter->tx_num_queues; i++, txr++) { + for (int i = 0; i < sc->tx_num_queues; i++, txr++) { u64 bus_addr; caddr_t offp, endp; - que = &adapter->tx_queues[i]; + que = &sc->tx_queues[i]; txr = &que->txr; bus_addr = txr->tx_paddr; @@ -3031,8 +3072,8 @@ em_initialize_transmit_unit(if_ctx_t ctx) E1000_WRITE_REG(hw, E1000_TDH(i), 0); HW_DEBUGOUT2("Base = %x, Length = %x\n", - E1000_READ_REG(&adapter->hw, E1000_TDBAL(i)), - E1000_READ_REG(&adapter->hw, E1000_TDLEN(i))); + E1000_READ_REG(hw, E1000_TDBAL(i)), + E1000_READ_REG(hw, E1000_TDLEN(i))); txdctl = 0; /* clear txdctl */ txdctl |= 0x1f; /* PTHRESH */ @@ -3046,7 +3087,7 @@ em_initialize_transmit_unit(if_ctx_t ctx) } /* Set the default values for the Tx Inter Packet Gap timer */ - switch (adapter->hw.mac.type) { + switch (hw->mac.type) { case e1000_80003es2lan: tipg = DEFAULT_82543_TIPG_IPGR1; tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << @@ -3058,9 +3099,8 @@ em_initialize_transmit_unit(if_ctx_t ctx) tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; break; default: - if ((adapter->hw.phy.media_type == e1000_media_type_fiber) || - (adapter->hw.phy.media_type == - e1000_media_type_internal_serdes)) + if (hw->phy.media_type == e1000_media_type_fiber || + hw->phy.media_type == e1000_media_type_internal_serdes) tipg = DEFAULT_82543_TIPG_IPGT_FIBER; else tipg = DEFAULT_82543_TIPG_IPGT_COPPER; @@ -3068,51 +3108,50 @@ em_initialize_transmit_unit(if_ctx_t ctx) tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; } - E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg); - E1000_WRITE_REG(&adapter->hw, E1000_TIDV, adapter->tx_int_delay.value); + E1000_WRITE_REG(hw, E1000_TIPG, tipg); + E1000_WRITE_REG(hw, E1000_TIDV, sc->tx_int_delay.value); - if(adapter->hw.mac.type >= e1000_82540) - E1000_WRITE_REG(&adapter->hw, E1000_TADV, - adapter->tx_abs_int_delay.value); + if(hw->mac.type >= e1000_82540) + E1000_WRITE_REG(hw, E1000_TADV, + sc->tx_abs_int_delay.value); - if ((adapter->hw.mac.type == e1000_82571) || - (adapter->hw.mac.type == e1000_82572)) { - tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); + if (hw->mac.type == e1000_82571 || hw->mac.type == e1000_82572) { + tarc = E1000_READ_REG(hw, E1000_TARC(0)); tarc |= TARC_SPEED_MODE_BIT; - E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); - } else if (adapter->hw.mac.type == e1000_80003es2lan) { + E1000_WRITE_REG(hw, E1000_TARC(0), tarc); + } else if (hw->mac.type == e1000_80003es2lan) { /* errata: program both queues to unweighted RR */ - tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); + tarc = E1000_READ_REG(hw, E1000_TARC(0)); tarc |= 1; - E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); - tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1)); + E1000_WRITE_REG(hw, E1000_TARC(0), tarc); + tarc = E1000_READ_REG(hw, E1000_TARC(1)); tarc |= 1; - E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc); - } else if (adapter->hw.mac.type == e1000_82574) { - tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); + E1000_WRITE_REG(hw, E1000_TARC(1), tarc); + } else if (hw->mac.type == e1000_82574) { + tarc = E1000_READ_REG(hw, E1000_TARC(0)); tarc |= TARC_ERRATA_BIT; - if ( adapter->tx_num_queues > 1) { + if ( sc->tx_num_queues > 1) { tarc |= (TARC_COMPENSATION_MODE | TARC_MQ_FIX); - E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); - E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc); + E1000_WRITE_REG(hw, E1000_TARC(0), tarc); + E1000_WRITE_REG(hw, E1000_TARC(1), tarc); } else - E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); + E1000_WRITE_REG(hw, E1000_TARC(0), tarc); } - if (adapter->tx_int_delay.value > 0) - adapter->txd_cmd |= E1000_TXD_CMD_IDE; + if (sc->tx_int_delay.value > 0) + sc->txd_cmd |= E1000_TXD_CMD_IDE; /* Program the Transmit Control Register */ - tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL); + tctl = E1000_READ_REG(hw, E1000_TCTL); tctl &= ~E1000_TCTL_CT; tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT)); - if (adapter->hw.mac.type >= e1000_82571) + if (hw->mac.type >= e1000_82571) tctl |= E1000_TCTL_MULR; /* This write will effectively turn on the transmit unit. */ - E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl); + E1000_WRITE_REG(hw, E1000_TCTL, tctl); /* SPT and KBL errata workarounds */ if (hw->mac.type == e1000_pch_spt) { @@ -3133,17 +3172,18 @@ em_initialize_transmit_unit(if_ctx_t ctx) * Enable receive unit. * **********************************************************************/ +#define BSIZEPKT_ROUNDUP ((1<shared; + struct e1000_softc *sc = iflib_get_softc(ctx); + if_softc_ctx_t scctx = sc->shared; struct ifnet *ifp = iflib_get_ifp(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; struct em_rx_queue *que; int i; - u32 rctl, rxcsum, rfctl; + uint32_t rctl, rxcsum; INIT_DEBUGOUT("em_initialize_receive_units: begin"); @@ -3175,9 +3215,9 @@ em_initialize_receive_unit(if_ctx_t ctx) if (!em_disable_crc_stripping) rctl |= E1000_RCTL_SECRC; - if (adapter->hw.mac.type >= e1000_82540) { - E1000_WRITE_REG(&adapter->hw, E1000_RADV, - adapter->rx_abs_int_delay.value); + if (hw->mac.type >= e1000_82540) { + E1000_WRITE_REG(hw, E1000_RADV, + sc->rx_abs_int_delay.value); /* * Set the interrupt throttling rate. Value is calculated @@ -3185,57 +3225,56 @@ em_initialize_receive_unit(if_ctx_t ctx) */ E1000_WRITE_REG(hw, E1000_ITR, DEFAULT_ITR); } - E1000_WRITE_REG(&adapter->hw, E1000_RDTR, - adapter->rx_int_delay.value); + E1000_WRITE_REG(hw, E1000_RDTR, sc->rx_int_delay.value); - /* Use extended rx descriptor formats */ - rfctl = E1000_READ_REG(hw, E1000_RFCTL); - rfctl |= E1000_RFCTL_EXTEN; - /* - * When using MSI-X interrupts we need to throttle - * using the EITR register (82574 only) - */ - if (hw->mac.type == e1000_82574) { - for (int i = 0; i < 4; i++) - E1000_WRITE_REG(hw, E1000_EITR_82574(i), - DEFAULT_ITR); - /* Disable accelerated acknowledge */ - rfctl |= E1000_RFCTL_ACK_DIS; - } - E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); + if (hw->mac.type >= em_mac_min) { + uint32_t rfctl; + /* Use extended rx descriptor formats */ + rfctl = E1000_READ_REG(hw, E1000_RFCTL); + rfctl |= E1000_RFCTL_EXTEN; - rxcsum = E1000_READ_REG(hw, E1000_RXCSUM); - if (if_getcapenable(ifp) & IFCAP_RXCSUM && - adapter->hw.mac.type >= e1000_82543) { - if (adapter->tx_num_queues > 1) { - if (adapter->hw.mac.type >= igb_mac_min) { - rxcsum |= E1000_RXCSUM_PCSD; - if (hw->mac.type != e1000_82575) - rxcsum |= E1000_RXCSUM_CRCOFL; - } else - rxcsum |= E1000_RXCSUM_TUOFL | - E1000_RXCSUM_IPOFL | - E1000_RXCSUM_PCSD; - } else { - if (adapter->hw.mac.type >= igb_mac_min) - rxcsum |= E1000_RXCSUM_IPPCSE; - else - rxcsum |= E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPOFL; - if (adapter->hw.mac.type > e1000_82575) - rxcsum |= E1000_RXCSUM_CRCOFL; + /* + * When using MSI-X interrupts we need to throttle + * using the EITR register (82574 only) + */ + if (hw->mac.type == e1000_82574) { + for (int i = 0; i < 4; i++) + E1000_WRITE_REG(hw, E1000_EITR_82574(i), + DEFAULT_ITR); + /* Disable accelerated acknowledge */ + rfctl |= E1000_RFCTL_ACK_DIS; } - } else - rxcsum &= ~E1000_RXCSUM_TUOFL; - - E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum); - - if (adapter->rx_num_queues > 1) { - if (adapter->hw.mac.type >= igb_mac_min) - igb_initialize_rss_mapping(adapter); - else - em_initialize_rss_mapping(adapter); + E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); } + /* Set up L3 and L4 csum Rx descriptor offloads */ + rxcsum = E1000_READ_REG(hw, E1000_RXCSUM); + if (if_getcapenable(ifp) & IFCAP_RXCSUM) { + rxcsum |= E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPOFL; + if (hw->mac.type > e1000_82575) + rxcsum |= E1000_RXCSUM_CRCOFL; + else if (hw->mac.type < em_mac_min && + if_getcapenable(ifp) & IFCAP_HWCSUM_IPV6) + rxcsum |= E1000_RXCSUM_IPV6OFL; + } else { + rxcsum &= ~(E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); + if (hw->mac.type > e1000_82575) + rxcsum &= ~E1000_RXCSUM_CRCOFL; + else if (hw->mac.type < em_mac_min) + rxcsum &= ~E1000_RXCSUM_IPV6OFL; + } + + if (sc->rx_num_queues > 1) { + /* RSS hash needed in the Rx descriptor */ + rxcsum |= E1000_RXCSUM_PCSD; + + if (hw->mac.type >= igb_mac_min) + igb_initialize_rss_mapping(sc); + else + em_initialize_rss_mapping(sc); + } + E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum); + /* * XXX TEMPORARY WORKAROUND: on some systems with 82573 * long latencies are observed, like Lenovo X60. This @@ -3246,12 +3285,12 @@ em_initialize_receive_unit(if_ctx_t ctx) if (hw->mac.type == e1000_82573) E1000_WRITE_REG(hw, E1000_RDTR, 0x20); - for (i = 0, que = adapter->rx_queues; i < adapter->rx_num_queues; i++, que++) { + for (i = 0, que = sc->rx_queues; i < sc->rx_num_queues; i++, que++) { struct rx_ring *rxr = &que->rxr; /* Setup the Base and Length of the Rx Descriptor Ring */ u64 bus_addr = rxr->rx_paddr; #if 0 - u32 rdt = adapter->rx_num_queues -1; /* default */ + u32 rdt = sc->rx_num_queues -1; /* default */ #endif E1000_WRITE_REG(hw, E1000_RDLEN(i), @@ -3270,15 +3309,12 @@ em_initialize_receive_unit(if_ctx_t ctx) * Only write to RXDCTL(1) if there is a need for different * settings. */ - - if (((adapter->hw.mac.type == e1000_ich9lan) || - (adapter->hw.mac.type == e1000_pch2lan) || - (adapter->hw.mac.type == e1000_ich10lan)) && - (if_getmtu(ifp) > ETHERMTU)) { + if ((hw->mac.type == e1000_ich9lan || hw->mac.type == e1000_pch2lan || + hw->mac.type == e1000_ich10lan) && if_getmtu(ifp) > ETHERMTU) { u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0)); E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 3); - } else if (adapter->hw.mac.type == e1000_82574) { - for (int i = 0; i < adapter->rx_num_queues; i++) { + } else if (hw->mac.type == e1000_82574) { + for (int i = 0; i < sc->rx_num_queues; i++) { u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i)); rxdctl |= 0x20; /* PTHRESH */ rxdctl |= 4 << 8; /* HTHRESH */ @@ -3286,41 +3322,38 @@ em_initialize_receive_unit(if_ctx_t ctx) rxdctl |= 1 << 24; /* Switch to granularity */ E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl); } - } else if (adapter->hw.mac.type >= igb_mac_min) { + } else if (hw->mac.type >= igb_mac_min) { u32 psize, srrctl = 0; if (if_getmtu(ifp) > ETHERMTU) { - /* Set maximum packet len */ - if (adapter->rx_mbuf_sz <= 4096) { - srrctl |= 4096 >> E1000_SRRCTL_BSIZEPKT_SHIFT; - rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX; - } else if (adapter->rx_mbuf_sz > 4096) { - srrctl |= 8192 >> E1000_SRRCTL_BSIZEPKT_SHIFT; - rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX; - } psize = scctx->isc_max_frame_size; /* are we on a vlan? */ if (ifp->if_vlantrunk != NULL) psize += VLAN_TAG_SIZE; - E1000_WRITE_REG(&adapter->hw, E1000_RLPML, psize); - } else { - srrctl |= 2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT; - rctl |= E1000_RCTL_SZ_2048; + + if (sc->vf_ifp) + e1000_rlpml_set_vf(hw, psize); + else + E1000_WRITE_REG(hw, E1000_RLPML, psize); } + /* Set maximum packet buffer len */ + srrctl |= (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> + E1000_SRRCTL_BSIZEPKT_SHIFT; + /* * If TX flow control is disabled and there's >1 queue defined, * enable DROP. * * This drops frames rather than hanging the RX MAC for all queues. */ - if ((adapter->rx_num_queues > 1) && - (adapter->fc == e1000_fc_none || - adapter->fc == e1000_fc_rx_pause)) { + if ((sc->rx_num_queues > 1) && + (sc->fc == e1000_fc_none || + sc->fc == e1000_fc_rx_pause)) { srrctl |= E1000_SRRCTL_DROP_EN; } /* Setup the Base and Length of the Rx Descriptor Rings */ - for (i = 0, que = adapter->rx_queues; i < adapter->rx_num_queues; i++, que++) { + for (i = 0, que = sc->rx_queues; i < sc->rx_num_queues; i++, que++) { struct rx_ring *rxr = &que->rxr; u64 bus_addr = rxr->rx_paddr; u32 rxdctl; @@ -3348,27 +3381,39 @@ em_initialize_receive_unit(if_ctx_t ctx) rxdctl |= IGB_RX_WTHRESH << 16; E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl); } - } else if (adapter->hw.mac.type >= e1000_pch2lan) { + } else if (hw->mac.type >= e1000_pch2lan) { if (if_getmtu(ifp) > ETHERMTU) - e1000_lv_jumbo_workaround_ich8lan(hw, TRUE); + e1000_lv_jumbo_workaround_ich8lan(hw, true); else - e1000_lv_jumbo_workaround_ich8lan(hw, FALSE); + e1000_lv_jumbo_workaround_ich8lan(hw, false); } /* Make sure VLAN Filters are off */ rctl &= ~E1000_RCTL_VFE; - if (adapter->hw.mac.type < igb_mac_min) { - if (adapter->rx_mbuf_sz == MCLBYTES) - rctl |= E1000_RCTL_SZ_2048; - else if (adapter->rx_mbuf_sz == MJUMPAGESIZE) + /* Set up packet buffer size, overridden by per queue srrctl on igb */ + if (hw->mac.type < igb_mac_min) { + if (sc->rx_mbuf_sz > 2048 && sc->rx_mbuf_sz <= 4096) rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX; - else if (adapter->rx_mbuf_sz > MJUMPAGESIZE) + else if (sc->rx_mbuf_sz > 4096 && sc->rx_mbuf_sz <= 8192) rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX; + else if (sc->rx_mbuf_sz > 8192) + rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX; + else { + rctl |= E1000_RCTL_SZ_2048; + rctl &= ~E1000_RCTL_BSEX; + } + } else + rctl |= E1000_RCTL_SZ_2048; - /* ensure we clear use DTYPE of 00 here */ - rctl &= ~0x00000C00; - } + /* + * rctl bits 11:10 are as follows + * lem: reserved + * em: DTYPE + * igb: reserved + * and should be 00 on all of the above + */ + rctl &= ~0x00000C00; /* Write out the settings */ E1000_WRITE_REG(hw, E1000_RCTL, rctl); @@ -3379,96 +3424,182 @@ em_initialize_receive_unit(if_ctx_t ctx) static void em_if_vlan_register(if_ctx_t ctx, u16 vtag) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); u32 index, bit; index = (vtag >> 5) & 0x7F; bit = vtag & 0x1F; - adapter->shadow_vfta[index] |= (1 << bit); - ++adapter->num_vlans; + sc->shadow_vfta[index] |= (1 << bit); + ++sc->num_vlans; + em_if_vlan_filter_write(sc); } static void em_if_vlan_unregister(if_ctx_t ctx, u16 vtag) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); u32 index, bit; index = (vtag >> 5) & 0x7F; bit = vtag & 0x1F; - adapter->shadow_vfta[index] &= ~(1 << bit); - --adapter->num_vlans; + sc->shadow_vfta[index] &= ~(1 << bit); + --sc->num_vlans; + em_if_vlan_filter_write(sc); +} + +static bool +em_if_vlan_filter_capable(if_ctx_t ctx) +{ + if_t ifp = iflib_get_ifp(ctx); + + if ((if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) && + !em_disable_crc_stripping) + return (true); + + return (false); +} + +static bool +em_if_vlan_filter_used(if_ctx_t ctx) +{ + struct e1000_softc *sc = iflib_get_softc(ctx); + + if (!em_if_vlan_filter_capable(ctx)) + return (false); + + for (int i = 0; i < EM_VFTA_SIZE; i++) + if (sc->shadow_vfta[i] != 0) + return (true); + + return (false); } static void -em_setup_vlan_hw_support(struct adapter *adapter) +em_if_vlan_filter_enable(struct e1000_softc *sc) { - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; u32 reg; - /* - * We get here thru init_locked, meaning - * a soft reset, this has already cleared - * the VFTA and other state, so if there - * have been no vlan's registered do nothing. - */ - if (adapter->num_vlans == 0) - return; - - /* - * A soft reset zero's out the VFTA, so - * we need to repopulate it now. - */ - for (int i = 0; i < EM_VFTA_SIZE; i++) - if (adapter->shadow_vfta[i] != 0) - E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, - i, adapter->shadow_vfta[i]); - - reg = E1000_READ_REG(hw, E1000_CTRL); - reg |= E1000_CTRL_VME; - E1000_WRITE_REG(hw, E1000_CTRL, reg); - - /* Enable the Filter Table */ reg = E1000_READ_REG(hw, E1000_RCTL); reg &= ~E1000_RCTL_CFIEN; reg |= E1000_RCTL_VFE; E1000_WRITE_REG(hw, E1000_RCTL, reg); } +static void +em_if_vlan_filter_disable(struct e1000_softc *sc) +{ + struct e1000_hw *hw = &sc->hw; + u32 reg; + + reg = E1000_READ_REG(hw, E1000_RCTL); + reg &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); + E1000_WRITE_REG(hw, E1000_RCTL, reg); +} + +static void +em_if_vlan_filter_write(struct e1000_softc *sc) +{ + struct e1000_hw *hw = &sc->hw; + + if (sc->vf_ifp) + return; + + /* Disable interrupts for lem-class devices during the filter change */ + if (hw->mac.type < em_mac_min) + em_if_intr_disable(sc->ctx); + + for (int i = 0; i < EM_VFTA_SIZE; i++) + if (sc->shadow_vfta[i] != 0) { + /* XXXKB: incomplete VF support, we return early above */ + if (sc->vf_ifp) + e1000_vfta_set_vf(hw, sc->shadow_vfta[i], true); + else + e1000_write_vfta(hw, i, sc->shadow_vfta[i]); + } + + /* Re-enable interrupts for lem-class devices */ + if (hw->mac.type < em_mac_min) + em_if_intr_enable(sc->ctx); +} + +static void +em_setup_vlan_hw_support(if_ctx_t ctx) +{ + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; + struct ifnet *ifp = iflib_get_ifp(ctx); + u32 reg; + + /* XXXKB: Return early if we are a VF until VF decap and filter management + * is ready and tested. + */ + if (sc->vf_ifp) + return; + + if (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING && + !em_disable_crc_stripping) { + reg = E1000_READ_REG(hw, E1000_CTRL); + reg |= E1000_CTRL_VME; + E1000_WRITE_REG(hw, E1000_CTRL, reg); + } else { + reg = E1000_READ_REG(hw, E1000_CTRL); + reg &= ~E1000_CTRL_VME; + E1000_WRITE_REG(hw, E1000_CTRL, reg); + } + + /* If we aren't doing HW filtering, we're done */ + if (!em_if_vlan_filter_capable(ctx)) { + em_if_vlan_filter_disable(sc); + return; + } + + /* + * A soft reset zero's out the VFTA, so + * we need to repopulate it now. + */ + em_if_vlan_filter_write(sc); + + /* Enable the Filter Table */ + em_if_vlan_filter_enable(sc); +} + static void em_if_intr_enable(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; u32 ims_mask = IMS_ENABLE_MASK; - if (hw->mac.type == e1000_82574) { - E1000_WRITE_REG(hw, EM_EIAC, EM_MSIX_MASK); - ims_mask |= adapter->ims; + if (sc->intr_type == IFLIB_INTR_MSIX) { + E1000_WRITE_REG(hw, EM_EIAC, sc->ims); + ims_mask |= sc->ims; } E1000_WRITE_REG(hw, E1000_IMS, ims_mask); + E1000_WRITE_FLUSH(hw); } static void em_if_intr_disable(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; - if (hw->mac.type == e1000_82574) + if (sc->intr_type == IFLIB_INTR_MSIX) E1000_WRITE_REG(hw, EM_EIAC, 0); E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); + E1000_WRITE_FLUSH(hw); } static void igb_if_intr_enable(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; u32 mask; - if (__predict_true(adapter->intr_type == IFLIB_INTR_MSIX)) { - mask = (adapter->que_mask | adapter->link_mask); + if (__predict_true(sc->intr_type == IFLIB_INTR_MSIX)) { + mask = (sc->que_mask | sc->link_mask); E1000_WRITE_REG(hw, E1000_EIAC, mask); E1000_WRITE_REG(hw, E1000_EIAM, mask); E1000_WRITE_REG(hw, E1000_EIMS, mask); @@ -3481,10 +3612,10 @@ igb_if_intr_enable(if_ctx_t ctx) static void igb_if_intr_disable(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; - if (__predict_true(adapter->intr_type == IFLIB_INTR_MSIX)) { + if (__predict_true(sc->intr_type == IFLIB_INTR_MSIX)) { E1000_WRITE_REG(hw, E1000_EIMC, 0xffffffff); E1000_WRITE_REG(hw, E1000_EIAC, 0); } @@ -3498,13 +3629,13 @@ igb_if_intr_disable(if_ctx_t ctx) * to disable special hardware management features */ static void -em_init_manageability(struct adapter *adapter) +em_init_manageability(struct e1000_softc *sc) { /* A shared code workaround */ #define E1000_82542_MANC2H E1000_MANC2H - if (adapter->has_manage) { - int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H); - int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); + if (sc->has_manage) { + int manc2h = E1000_READ_REG(&sc->hw, E1000_MANC2H); + int manc = E1000_READ_REG(&sc->hw, E1000_MANC); /* disable hardware interception of ARP */ manc &= ~(E1000_MANC_ARP_EN); @@ -3515,8 +3646,8 @@ em_init_manageability(struct adapter *adapter) #define E1000_MNG2HOST_PORT_664 (1 << 6) manc2h |= E1000_MNG2HOST_PORT_623; manc2h |= E1000_MNG2HOST_PORT_664; - E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h); - E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); + E1000_WRITE_REG(&sc->hw, E1000_MANC2H, manc2h); + E1000_WRITE_REG(&sc->hw, E1000_MANC, manc); } } @@ -3525,16 +3656,16 @@ em_init_manageability(struct adapter *adapter) * controller if there is one. */ static void -em_release_manageability(struct adapter *adapter) +em_release_manageability(struct e1000_softc *sc) { - if (adapter->has_manage) { - int manc = E1000_READ_REG(&adapter->hw, E1000_MANC); + if (sc->has_manage) { + int manc = E1000_READ_REG(&sc->hw, E1000_MANC); /* re-enable hardware interception of ARP */ manc |= E1000_MANC_ARP_EN; manc &= ~E1000_MANC_EN_MNG2HOST; - E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc); + E1000_WRITE_REG(&sc->hw, E1000_MANC, manc); } } @@ -3545,22 +3676,22 @@ em_release_manageability(struct adapter *adapter) * this means that the network i/f is open. */ static void -em_get_hw_control(struct adapter *adapter) +em_get_hw_control(struct e1000_softc *sc) { u32 ctrl_ext, swsm; - if (adapter->vf_ifp) + if (sc->vf_ifp) return; - if (adapter->hw.mac.type == e1000_82573) { - swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); - E1000_WRITE_REG(&adapter->hw, E1000_SWSM, + if (sc->hw.mac.type == e1000_82573) { + swsm = E1000_READ_REG(&sc->hw, E1000_SWSM); + E1000_WRITE_REG(&sc->hw, E1000_SWSM, swsm | E1000_SWSM_DRV_LOAD); return; } /* else */ - ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); - E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, + ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); + E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); } @@ -3571,22 +3702,22 @@ em_get_hw_control(struct adapter *adapter) * f/w this means that the network i/f is closed. */ static void -em_release_hw_control(struct adapter *adapter) +em_release_hw_control(struct e1000_softc *sc) { u32 ctrl_ext, swsm; - if (!adapter->has_manage) + if (!sc->has_manage) return; - if (adapter->hw.mac.type == e1000_82573) { - swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM); - E1000_WRITE_REG(&adapter->hw, E1000_SWSM, + if (sc->hw.mac.type == e1000_82573) { + swsm = E1000_READ_REG(&sc->hw, E1000_SWSM); + E1000_WRITE_REG(&sc->hw, E1000_SWSM, swsm & ~E1000_SWSM_DRV_LOAD); return; } /* else */ - ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); - E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, + ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); + E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); return; } @@ -3597,10 +3728,10 @@ em_is_valid_ether_addr(u8 *addr) char zero_addr[6] = { 0, 0, 0, 0, 0, 0 }; if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) { - return (FALSE); + return (false); } - return (TRUE); + return (true); } /* @@ -3611,45 +3742,45 @@ em_is_valid_ether_addr(u8 *addr) static void em_get_wakeup(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); device_t dev = iflib_get_dev(ctx); u16 eeprom_data = 0, device_id, apme_mask; - adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw); + sc->has_manage = e1000_enable_mng_pass_thru(&sc->hw); apme_mask = EM_EEPROM_APME; - switch (adapter->hw.mac.type) { + switch (sc->hw.mac.type) { case e1000_82542: case e1000_82543: break; case e1000_82544: - e1000_read_nvm(&adapter->hw, + e1000_read_nvm(&sc->hw, NVM_INIT_CONTROL2_REG, 1, &eeprom_data); apme_mask = EM_82544_APME; break; case e1000_82546: case e1000_82546_rev_3: - if (adapter->hw.bus.func == 1) { - e1000_read_nvm(&adapter->hw, + if (sc->hw.bus.func == 1) { + e1000_read_nvm(&sc->hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); break; } else - e1000_read_nvm(&adapter->hw, + e1000_read_nvm(&sc->hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); break; case e1000_82573: case e1000_82583: - adapter->has_amt = TRUE; + sc->has_amt = true; /* FALLTHROUGH */ case e1000_82571: case e1000_82572: case e1000_80003es2lan: - if (adapter->hw.bus.func == 1) { - e1000_read_nvm(&adapter->hw, + if (sc->hw.bus.func == 1) { + e1000_read_nvm(&sc->hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); break; } else - e1000_read_nvm(&adapter->hw, + e1000_read_nvm(&sc->hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); break; case e1000_ich8lan: @@ -3669,16 +3800,16 @@ em_get_wakeup(if_ctx_t ctx) case e1000_vfadapt: case e1000_vfadapt_i350: apme_mask = E1000_WUC_APME; - adapter->has_amt = TRUE; - eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC); + sc->has_amt = true; + eeprom_data = E1000_READ_REG(&sc->hw, E1000_WUC); break; default: - e1000_read_nvm(&adapter->hw, + e1000_read_nvm(&sc->hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); break; } if (eeprom_data & apme_mask) - adapter->wol = (E1000_WUFC_MAG | E1000_WUFC_MC); + sc->wol = (E1000_WUFC_MAG | E1000_WUFC_MC); /* * We have the eeprom settings, now apply the special cases * where the eeprom may be wrong or the board won't support @@ -3687,20 +3818,20 @@ em_get_wakeup(if_ctx_t ctx) device_id = pci_get_device(dev); switch (device_id) { case E1000_DEV_ID_82546GB_PCIE: - adapter->wol = 0; + sc->wol = 0; break; case E1000_DEV_ID_82546EB_FIBER: case E1000_DEV_ID_82546GB_FIBER: /* Wake events only supported on port A for dual fiber * regardless of eeprom setting */ - if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & + if (E1000_READ_REG(&sc->hw, E1000_STATUS) & E1000_STATUS_FUNC_1) - adapter->wol = 0; + sc->wol = 0; break; case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: /* if quad port adapter, disable WoL on all but port A */ if (global_quad_port_a != 0) - adapter->wol = 0; + sc->wol = 0; /* Reset for multiple quad port adapters */ if (++global_quad_port_a == 4) global_quad_port_a = 0; @@ -3708,16 +3839,16 @@ em_get_wakeup(if_ctx_t ctx) case E1000_DEV_ID_82571EB_FIBER: /* Wake events only supported on port A for dual fiber * regardless of eeprom setting */ - if (E1000_READ_REG(&adapter->hw, E1000_STATUS) & + if (E1000_READ_REG(&sc->hw, E1000_STATUS) & E1000_STATUS_FUNC_1) - adapter->wol = 0; + sc->wol = 0; break; case E1000_DEV_ID_82571EB_QUAD_COPPER: case E1000_DEV_ID_82571EB_QUAD_FIBER: case E1000_DEV_ID_82571EB_QUAD_COPPER_LP: /* if quad port adapter, disable WoL on all but port A */ if (global_quad_port_a != 0) - adapter->wol = 0; + sc->wol = 0; /* Reset for multiple quad port adapters */ if (++global_quad_port_a == 4) global_quad_port_a = 0; @@ -3733,7 +3864,7 @@ em_get_wakeup(if_ctx_t ctx) static void em_enable_wakeup(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); device_t dev = iflib_get_dev(ctx); if_t ifp = iflib_get_ifp(ctx); int error = 0; @@ -3748,53 +3879,53 @@ em_enable_wakeup(if_ctx_t ctx) * is set with all bits on by default. */ if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) == 0) - adapter->wol &= ~E1000_WUFC_MAG; + sc->wol &= ~E1000_WUFC_MAG; if ((if_getcapenable(ifp) & IFCAP_WOL_UCAST) == 0) - adapter->wol &= ~E1000_WUFC_EX; + sc->wol &= ~E1000_WUFC_EX; if ((if_getcapenable(ifp) & IFCAP_WOL_MCAST) == 0) - adapter->wol &= ~E1000_WUFC_MC; + sc->wol &= ~E1000_WUFC_MC; else { - rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL); + rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); rctl |= E1000_RCTL_MPE; - E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl); + E1000_WRITE_REG(&sc->hw, E1000_RCTL, rctl); } - if (!(adapter->wol & (E1000_WUFC_EX | E1000_WUFC_MAG | E1000_WUFC_MC))) + if (!(sc->wol & (E1000_WUFC_EX | E1000_WUFC_MAG | E1000_WUFC_MC))) goto pme; /* Advertise the wakeup capability */ - ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL); + ctrl = E1000_READ_REG(&sc->hw, E1000_CTRL); ctrl |= (E1000_CTRL_SWDPIN2 | E1000_CTRL_SWDPIN3); - E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl); + E1000_WRITE_REG(&sc->hw, E1000_CTRL, ctrl); /* Keep the laser running on Fiber adapters */ - if (adapter->hw.phy.media_type == e1000_media_type_fiber || - adapter->hw.phy.media_type == e1000_media_type_internal_serdes) { - ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT); + if (sc->hw.phy.media_type == e1000_media_type_fiber || + sc->hw.phy.media_type == e1000_media_type_internal_serdes) { + ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; - E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, ctrl_ext); + E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, ctrl_ext); } - if ((adapter->hw.mac.type == e1000_ich8lan) || - (adapter->hw.mac.type == e1000_pchlan) || - (adapter->hw.mac.type == e1000_ich9lan) || - (adapter->hw.mac.type == e1000_ich10lan)) - e1000_suspend_workarounds_ich8lan(&adapter->hw); + if ((sc->hw.mac.type == e1000_ich8lan) || + (sc->hw.mac.type == e1000_pchlan) || + (sc->hw.mac.type == e1000_ich9lan) || + (sc->hw.mac.type == e1000_ich10lan)) + e1000_suspend_workarounds_ich8lan(&sc->hw); - if ( adapter->hw.mac.type >= e1000_pchlan) { - error = em_enable_phy_wakeup(adapter); + if ( sc->hw.mac.type >= e1000_pchlan) { + error = em_enable_phy_wakeup(sc); if (error) goto pme; } else { /* Enable wakeup by the MAC */ - E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN); - E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol); + E1000_WRITE_REG(&sc->hw, E1000_WUC, E1000_WUC_PME_EN); + E1000_WRITE_REG(&sc->hw, E1000_WUFC, sc->wol); } - if (adapter->hw.phy.type == e1000_phy_igp_3) - e1000_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); + if (sc->hw.phy.type == e1000_phy_igp_3) + e1000_igp3_phy_powerdown_workaround_ich8lan(&sc->hw); pme: status = pci_read_config(dev, pmc + PCIR_POWER_STATUS, 2); @@ -3811,9 +3942,9 @@ pme: * require thing to be copied into the phy */ static int -em_enable_phy_wakeup(struct adapter *adapter) +em_enable_phy_wakeup(struct e1000_softc *sc) { - struct e1000_hw *hw = &adapter->hw; + struct e1000_hw *hw = &sc->hw; u32 mreg, ret = 0; u16 preg; @@ -3821,7 +3952,7 @@ em_enable_phy_wakeup(struct adapter *adapter) e1000_copy_rx_addrs_to_phy_ich8lan(hw); /* copy MAC MTA to PHY MTA */ - for (int i = 0; i < adapter->hw.mac.mta_reg_count; i++) { + for (int i = 0; i < hw->mac.mta_reg_count; i++) { mreg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); e1000_write_phy_reg(hw, BM_MTA(i), (u16)(mreg & 0xFFFF)); e1000_write_phy_reg(hw, BM_MTA(i) + 1, @@ -3829,7 +3960,7 @@ em_enable_phy_wakeup(struct adapter *adapter) } /* configure PHY Rx Control register */ - e1000_read_phy_reg(&adapter->hw, BM_RCTL, &preg); + e1000_read_phy_reg(hw, BM_RCTL, &preg); mreg = E1000_READ_REG(hw, E1000_RCTL); if (mreg & E1000_RCTL_UPE) preg |= BM_RCTL_UPE; @@ -3846,16 +3977,16 @@ em_enable_phy_wakeup(struct adapter *adapter) mreg = E1000_READ_REG(hw, E1000_CTRL); if (mreg & E1000_CTRL_RFCE) preg |= BM_RCTL_RFCE; - e1000_write_phy_reg(&adapter->hw, BM_RCTL, preg); + e1000_write_phy_reg(hw, BM_RCTL, preg); /* enable PHY wakeup in MAC register */ E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN | E1000_WUC_APME); - E1000_WRITE_REG(hw, E1000_WUFC, adapter->wol); + E1000_WRITE_REG(hw, E1000_WUFC, sc->wol); /* configure and enable PHY wakeup in PHY registers */ - e1000_write_phy_reg(&adapter->hw, BM_WUFC, adapter->wol); - e1000_write_phy_reg(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); + e1000_write_phy_reg(hw, BM_WUFC, sc->wol); + e1000_write_phy_reg(hw, BM_WUC, E1000_WUC_PME_EN); /* activate PHY wakeup */ ret = hw->phy.ops.acquire(hw); @@ -3883,14 +4014,14 @@ out: static void em_if_led_func(if_ctx_t ctx, int onoff) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); if (onoff) { - e1000_setup_led(&adapter->hw); - e1000_led_on(&adapter->hw); + e1000_setup_led(&sc->hw); + e1000_led_on(&sc->hw); } else { - e1000_led_off(&adapter->hw); - e1000_cleanup_led(&adapter->hw); + e1000_led_off(&sc->hw); + e1000_cleanup_led(&sc->hw); } } @@ -3898,13 +4029,13 @@ em_if_led_func(if_ctx_t ctx, int onoff) * Disable the L0S and L1 LINK states */ static void -em_disable_aspm(struct adapter *adapter) +em_disable_aspm(struct e1000_softc *sc) { int base, reg; u16 link_cap,link_ctrl; - device_t dev = adapter->dev; + device_t dev = sc->dev; - switch (adapter->hw.mac.type) { + switch (sc->hw.mac.type) { case e1000_82573: case e1000_82574: case e1000_82583: @@ -3931,120 +4062,120 @@ em_disable_aspm(struct adapter *adapter) * **********************************************************************/ static void -em_update_stats_counters(struct adapter *adapter) +em_update_stats_counters(struct e1000_softc *sc) { - u64 prev_xoffrxc = adapter->stats.xoffrxc; + u64 prev_xoffrxc = sc->stats.xoffrxc; - if(adapter->hw.phy.media_type == e1000_media_type_copper || - (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) { - adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, E1000_SYMERRS); - adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC); + if(sc->hw.phy.media_type == e1000_media_type_copper || + (E1000_READ_REG(&sc->hw, E1000_STATUS) & E1000_STATUS_LU)) { + sc->stats.symerrs += E1000_READ_REG(&sc->hw, E1000_SYMERRS); + sc->stats.sec += E1000_READ_REG(&sc->hw, E1000_SEC); } - adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS); - adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC); - adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC); - adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL); + sc->stats.crcerrs += E1000_READ_REG(&sc->hw, E1000_CRCERRS); + sc->stats.mpc += E1000_READ_REG(&sc->hw, E1000_MPC); + sc->stats.scc += E1000_READ_REG(&sc->hw, E1000_SCC); + sc->stats.ecol += E1000_READ_REG(&sc->hw, E1000_ECOL); - adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC); - adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL); - adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC); - adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC); - adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC); - adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC); - adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC); - adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); + sc->stats.mcc += E1000_READ_REG(&sc->hw, E1000_MCC); + sc->stats.latecol += E1000_READ_REG(&sc->hw, E1000_LATECOL); + sc->stats.colc += E1000_READ_REG(&sc->hw, E1000_COLC); + sc->stats.dc += E1000_READ_REG(&sc->hw, E1000_DC); + sc->stats.rlec += E1000_READ_REG(&sc->hw, E1000_RLEC); + sc->stats.xonrxc += E1000_READ_REG(&sc->hw, E1000_XONRXC); + sc->stats.xontxc += E1000_READ_REG(&sc->hw, E1000_XONTXC); + sc->stats.xoffrxc += E1000_READ_REG(&sc->hw, E1000_XOFFRXC); /* ** For watchdog management we need to know if we have been ** paused during the last interval, so capture that here. */ - if (adapter->stats.xoffrxc != prev_xoffrxc) - adapter->shared->isc_pause_frames = 1; - adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC); - adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC); - adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64); - adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127); - adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255); - adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511); - adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023); - adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522); - adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC); - adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC); - adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC); - adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC); + if (sc->stats.xoffrxc != prev_xoffrxc) + sc->shared->isc_pause_frames = 1; + sc->stats.xofftxc += E1000_READ_REG(&sc->hw, E1000_XOFFTXC); + sc->stats.fcruc += E1000_READ_REG(&sc->hw, E1000_FCRUC); + sc->stats.prc64 += E1000_READ_REG(&sc->hw, E1000_PRC64); + sc->stats.prc127 += E1000_READ_REG(&sc->hw, E1000_PRC127); + sc->stats.prc255 += E1000_READ_REG(&sc->hw, E1000_PRC255); + sc->stats.prc511 += E1000_READ_REG(&sc->hw, E1000_PRC511); + sc->stats.prc1023 += E1000_READ_REG(&sc->hw, E1000_PRC1023); + sc->stats.prc1522 += E1000_READ_REG(&sc->hw, E1000_PRC1522); + sc->stats.gprc += E1000_READ_REG(&sc->hw, E1000_GPRC); + sc->stats.bprc += E1000_READ_REG(&sc->hw, E1000_BPRC); + sc->stats.mprc += E1000_READ_REG(&sc->hw, E1000_MPRC); + sc->stats.gptc += E1000_READ_REG(&sc->hw, E1000_GPTC); /* For the 64-bit byte counters the low dword must be read first. */ /* Both registers clear on the read of the high dword */ - adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCL) + - ((u64)E1000_READ_REG(&adapter->hw, E1000_GORCH) << 32); - adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCL) + - ((u64)E1000_READ_REG(&adapter->hw, E1000_GOTCH) << 32); + sc->stats.gorc += E1000_READ_REG(&sc->hw, E1000_GORCL) + + ((u64)E1000_READ_REG(&sc->hw, E1000_GORCH) << 32); + sc->stats.gotc += E1000_READ_REG(&sc->hw, E1000_GOTCL) + + ((u64)E1000_READ_REG(&sc->hw, E1000_GOTCH) << 32); - adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC); - adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC); - adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC); - adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC); - adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC); + sc->stats.rnbc += E1000_READ_REG(&sc->hw, E1000_RNBC); + sc->stats.ruc += E1000_READ_REG(&sc->hw, E1000_RUC); + sc->stats.rfc += E1000_READ_REG(&sc->hw, E1000_RFC); + sc->stats.roc += E1000_READ_REG(&sc->hw, E1000_ROC); + sc->stats.rjc += E1000_READ_REG(&sc->hw, E1000_RJC); - adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH); - adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH); + sc->stats.tor += E1000_READ_REG(&sc->hw, E1000_TORH); + sc->stats.tot += E1000_READ_REG(&sc->hw, E1000_TOTH); - adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR); - adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT); - adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64); - adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127); - adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255); - adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511); - adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023); - adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522); - adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC); - adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC); + sc->stats.tpr += E1000_READ_REG(&sc->hw, E1000_TPR); + sc->stats.tpt += E1000_READ_REG(&sc->hw, E1000_TPT); + sc->stats.ptc64 += E1000_READ_REG(&sc->hw, E1000_PTC64); + sc->stats.ptc127 += E1000_READ_REG(&sc->hw, E1000_PTC127); + sc->stats.ptc255 += E1000_READ_REG(&sc->hw, E1000_PTC255); + sc->stats.ptc511 += E1000_READ_REG(&sc->hw, E1000_PTC511); + sc->stats.ptc1023 += E1000_READ_REG(&sc->hw, E1000_PTC1023); + sc->stats.ptc1522 += E1000_READ_REG(&sc->hw, E1000_PTC1522); + sc->stats.mptc += E1000_READ_REG(&sc->hw, E1000_MPTC); + sc->stats.bptc += E1000_READ_REG(&sc->hw, E1000_BPTC); /* Interrupt Counts */ - adapter->stats.iac += E1000_READ_REG(&adapter->hw, E1000_IAC); - adapter->stats.icrxptc += E1000_READ_REG(&adapter->hw, E1000_ICRXPTC); - adapter->stats.icrxatc += E1000_READ_REG(&adapter->hw, E1000_ICRXATC); - adapter->stats.ictxptc += E1000_READ_REG(&adapter->hw, E1000_ICTXPTC); - adapter->stats.ictxatc += E1000_READ_REG(&adapter->hw, E1000_ICTXATC); - adapter->stats.ictxqec += E1000_READ_REG(&adapter->hw, E1000_ICTXQEC); - adapter->stats.ictxqmtc += E1000_READ_REG(&adapter->hw, E1000_ICTXQMTC); - adapter->stats.icrxdmtc += E1000_READ_REG(&adapter->hw, E1000_ICRXDMTC); - adapter->stats.icrxoc += E1000_READ_REG(&adapter->hw, E1000_ICRXOC); + sc->stats.iac += E1000_READ_REG(&sc->hw, E1000_IAC); + sc->stats.icrxptc += E1000_READ_REG(&sc->hw, E1000_ICRXPTC); + sc->stats.icrxatc += E1000_READ_REG(&sc->hw, E1000_ICRXATC); + sc->stats.ictxptc += E1000_READ_REG(&sc->hw, E1000_ICTXPTC); + sc->stats.ictxatc += E1000_READ_REG(&sc->hw, E1000_ICTXATC); + sc->stats.ictxqec += E1000_READ_REG(&sc->hw, E1000_ICTXQEC); + sc->stats.ictxqmtc += E1000_READ_REG(&sc->hw, E1000_ICTXQMTC); + sc->stats.icrxdmtc += E1000_READ_REG(&sc->hw, E1000_ICRXDMTC); + sc->stats.icrxoc += E1000_READ_REG(&sc->hw, E1000_ICRXOC); - if (adapter->hw.mac.type >= e1000_82543) { - adapter->stats.algnerrc += - E1000_READ_REG(&adapter->hw, E1000_ALGNERRC); - adapter->stats.rxerrc += - E1000_READ_REG(&adapter->hw, E1000_RXERRC); - adapter->stats.tncrs += - E1000_READ_REG(&adapter->hw, E1000_TNCRS); - adapter->stats.cexterr += - E1000_READ_REG(&adapter->hw, E1000_CEXTERR); - adapter->stats.tsctc += - E1000_READ_REG(&adapter->hw, E1000_TSCTC); - adapter->stats.tsctfc += - E1000_READ_REG(&adapter->hw, E1000_TSCTFC); + if (sc->hw.mac.type >= e1000_82543) { + sc->stats.algnerrc += + E1000_READ_REG(&sc->hw, E1000_ALGNERRC); + sc->stats.rxerrc += + E1000_READ_REG(&sc->hw, E1000_RXERRC); + sc->stats.tncrs += + E1000_READ_REG(&sc->hw, E1000_TNCRS); + sc->stats.cexterr += + E1000_READ_REG(&sc->hw, E1000_CEXTERR); + sc->stats.tsctc += + E1000_READ_REG(&sc->hw, E1000_TSCTC); + sc->stats.tsctfc += + E1000_READ_REG(&sc->hw, E1000_TSCTFC); } } static uint64_t em_if_get_counter(if_ctx_t ctx, ift_counter cnt) { - struct adapter *adapter = iflib_get_softc(ctx); + struct e1000_softc *sc = iflib_get_softc(ctx); struct ifnet *ifp = iflib_get_ifp(ctx); switch (cnt) { case IFCOUNTER_COLLISIONS: - return (adapter->stats.colc); + return (sc->stats.colc); case IFCOUNTER_IERRORS: - return (adapter->dropped_pkts + adapter->stats.rxerrc + - adapter->stats.crcerrs + adapter->stats.algnerrc + - adapter->stats.ruc + adapter->stats.roc + - adapter->stats.mpc + adapter->stats.cexterr); + return (sc->dropped_pkts + sc->stats.rxerrc + + sc->stats.crcerrs + sc->stats.algnerrc + + sc->stats.ruc + sc->stats.roc + + sc->stats.mpc + sc->stats.cexterr); case IFCOUNTER_OERRORS: - return (adapter->stats.ecol + adapter->stats.latecol + - adapter->watchdog_events); + return (sc->stats.ecol + sc->stats.latecol + + sc->watchdog_events); default: return (if_get_counter_default(ifp, cnt)); } @@ -4063,6 +4194,7 @@ em_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event) { switch (event) { case IFLIB_RESTART_VLAN_CONFIG: + return (false); default: return (true); } @@ -4073,11 +4205,11 @@ static int em_sysctl_reg_handler(SYSCTL_HANDLER_ARGS) { #ifndef __HAIKU__ - struct adapter *adapter; + struct e1000_softc *sc; u_int val; - adapter = oidp->oid_arg1; - val = E1000_READ_REG(&adapter->hw, oidp->oid_arg2); + sc = oidp->oid_arg1; + val = E1000_READ_REG(&sc->hw, oidp->oid_arg2); return (sysctl_handle_int(oidp, &val, 0, req)); #endif } @@ -4086,17 +4218,17 @@ em_sysctl_reg_handler(SYSCTL_HANDLER_ARGS) * Add sysctl variables, one per statistic, to the system. */ static void -em_add_hw_stats(struct adapter *adapter) +em_add_hw_stats(struct e1000_softc *sc) { #ifndef __HAIKU__ - device_t dev = iflib_get_dev(adapter->ctx); - struct em_tx_queue *tx_que = adapter->tx_queues; - struct em_rx_queue *rx_que = adapter->rx_queues; + device_t dev = iflib_get_dev(sc->ctx); + struct em_tx_queue *tx_que = sc->tx_queues; + struct em_rx_queue *rx_que = sc->rx_queues; struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); struct sysctl_oid *tree = device_get_sysctl_tree(dev); struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); - struct e1000_hw_stats *stats = &adapter->stats; + struct e1000_hw_stats *stats = &sc->stats; struct sysctl_oid *stat_node, *queue_node, *int_node; struct sysctl_oid_list *stat_list, *queue_list, *int_list; @@ -4106,33 +4238,33 @@ em_add_hw_stats(struct adapter *adapter) /* Driver Statistics */ SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped", - CTLFLAG_RD, &adapter->dropped_pkts, + CTLFLAG_RD, &sc->dropped_pkts, "Driver dropped packets"); SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq", - CTLFLAG_RD, &adapter->link_irq, + CTLFLAG_RD, &sc->link_irq, "Link MSI-X IRQ Handled"); SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "rx_overruns", - CTLFLAG_RD, &adapter->rx_overruns, + CTLFLAG_RD, &sc->rx_overruns, "RX overruns"); SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "watchdog_timeouts", - CTLFLAG_RD, &adapter->watchdog_events, + CTLFLAG_RD, &sc->watchdog_events, "Watchdog timeouts"); SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "device_control", CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, - adapter, E1000_CTRL, em_sysctl_reg_handler, "IU", + sc, E1000_CTRL, em_sysctl_reg_handler, "IU", "Device Control Register"); SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "rx_control", CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, - adapter, E1000_RCTL, em_sysctl_reg_handler, "IU", + sc, E1000_RCTL, em_sysctl_reg_handler, "IU", "Receiver Control Register"); SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "fc_high_water", - CTLFLAG_RD, &adapter->hw.fc.high_water, 0, + CTLFLAG_RD, &sc->hw.fc.high_water, 0, "Flow Control High Watermark"); SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "fc_low_water", - CTLFLAG_RD, &adapter->hw.fc.low_water, 0, + CTLFLAG_RD, &sc->hw.fc.low_water, 0, "Flow Control Low Watermark"); - for (int i = 0; i < adapter->tx_num_queues; i++, tx_que++) { + for (int i = 0; i < sc->tx_num_queues; i++, tx_que++) { struct tx_ring *txr = &tx_que->txr; snprintf(namebuf, QUEUE_NAME_LEN, "queue_tx_%d", i); queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, @@ -4140,11 +4272,11 @@ em_add_hw_stats(struct adapter *adapter) queue_list = SYSCTL_CHILDREN(queue_node); SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", - CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, adapter, + CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, E1000_TDH(txr->me), em_sysctl_reg_handler, "IU", "Transmit Descriptor Head"); SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail", - CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, adapter, + CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, E1000_TDT(txr->me), em_sysctl_reg_handler, "IU", "Transmit Descriptor Tail"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "tx_irq", @@ -4152,7 +4284,7 @@ em_add_hw_stats(struct adapter *adapter) "Queue MSI-X Transmit Interrupts"); } - for (int j = 0; j < adapter->rx_num_queues; j++, rx_que++) { + for (int j = 0; j < sc->rx_num_queues; j++, rx_que++) { struct rx_ring *rxr = &rx_que->rxr; snprintf(namebuf, QUEUE_NAME_LEN, "queue_rx_%d", j); queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, @@ -4160,11 +4292,11 @@ em_add_hw_stats(struct adapter *adapter) queue_list = SYSCTL_CHILDREN(queue_node); SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", - CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, adapter, + CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, E1000_RDH(rxr->me), em_sysctl_reg_handler, "IU", "Receive Descriptor Head"); SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail", - CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, adapter, + CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, E1000_RDT(rxr->me), em_sysctl_reg_handler, "IU", "Receive Descriptor Tail"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "rx_irq", @@ -4194,132 +4326,132 @@ em_add_hw_stats(struct adapter *adapter) CTLFLAG_RD, &stats->colc, "Collision Count"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "symbol_errors", - CTLFLAG_RD, &adapter->stats.symerrs, + CTLFLAG_RD, &sc->stats.symerrs, "Symbol Errors"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "sequence_errors", - CTLFLAG_RD, &adapter->stats.sec, + CTLFLAG_RD, &sc->stats.sec, "Sequence Errors"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "defer_count", - CTLFLAG_RD, &adapter->stats.dc, + CTLFLAG_RD, &sc->stats.dc, "Defer Count"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "missed_packets", - CTLFLAG_RD, &adapter->stats.mpc, + CTLFLAG_RD, &sc->stats.mpc, "Missed Packets"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_no_buff", - CTLFLAG_RD, &adapter->stats.rnbc, + CTLFLAG_RD, &sc->stats.rnbc, "Receive No Buffers"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersize", - CTLFLAG_RD, &adapter->stats.ruc, + CTLFLAG_RD, &sc->stats.ruc, "Receive Undersize"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented", - CTLFLAG_RD, &adapter->stats.rfc, + CTLFLAG_RD, &sc->stats.rfc, "Fragmented Packets Received "); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversize", - CTLFLAG_RD, &adapter->stats.roc, + CTLFLAG_RD, &sc->stats.roc, "Oversized Packets Received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabber", - CTLFLAG_RD, &adapter->stats.rjc, + CTLFLAG_RD, &sc->stats.rjc, "Recevied Jabber"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_errs", - CTLFLAG_RD, &adapter->stats.rxerrc, + CTLFLAG_RD, &sc->stats.rxerrc, "Receive Errors"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs", - CTLFLAG_RD, &adapter->stats.crcerrs, + CTLFLAG_RD, &sc->stats.crcerrs, "CRC errors"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "alignment_errs", - CTLFLAG_RD, &adapter->stats.algnerrc, + CTLFLAG_RD, &sc->stats.algnerrc, "Alignment Errors"); /* On 82575 these are collision counts */ SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "coll_ext_errs", - CTLFLAG_RD, &adapter->stats.cexterr, + CTLFLAG_RD, &sc->stats.cexterr, "Collision/Carrier extension errors"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd", - CTLFLAG_RD, &adapter->stats.xonrxc, + CTLFLAG_RD, &sc->stats.xonrxc, "XON Received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd", - CTLFLAG_RD, &adapter->stats.xontxc, + CTLFLAG_RD, &sc->stats.xontxc, "XON Transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd", - CTLFLAG_RD, &adapter->stats.xoffrxc, + CTLFLAG_RD, &sc->stats.xoffrxc, "XOFF Received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd", - CTLFLAG_RD, &adapter->stats.xofftxc, + CTLFLAG_RD, &sc->stats.xofftxc, "XOFF Transmitted"); /* Packet Reception Stats */ SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_recvd", - CTLFLAG_RD, &adapter->stats.tpr, + CTLFLAG_RD, &sc->stats.tpr, "Total Packets Received "); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_recvd", - CTLFLAG_RD, &adapter->stats.gprc, + CTLFLAG_RD, &sc->stats.gprc, "Good Packets Received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_recvd", - CTLFLAG_RD, &adapter->stats.bprc, + CTLFLAG_RD, &sc->stats.bprc, "Broadcast Packets Received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_recvd", - CTLFLAG_RD, &adapter->stats.mprc, + CTLFLAG_RD, &sc->stats.mprc, "Multicast Packets Received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64", - CTLFLAG_RD, &adapter->stats.prc64, + CTLFLAG_RD, &sc->stats.prc64, "64 byte frames received "); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127", - CTLFLAG_RD, &adapter->stats.prc127, + CTLFLAG_RD, &sc->stats.prc127, "65-127 byte frames received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255", - CTLFLAG_RD, &adapter->stats.prc255, + CTLFLAG_RD, &sc->stats.prc255, "128-255 byte frames received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511", - CTLFLAG_RD, &adapter->stats.prc511, + CTLFLAG_RD, &sc->stats.prc511, "256-511 byte frames received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023", - CTLFLAG_RD, &adapter->stats.prc1023, + CTLFLAG_RD, &sc->stats.prc1023, "512-1023 byte frames received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522", - CTLFLAG_RD, &adapter->stats.prc1522, + CTLFLAG_RD, &sc->stats.prc1522, "1023-1522 byte frames received"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_recvd", - CTLFLAG_RD, &adapter->stats.gorc, + CTLFLAG_RD, &sc->stats.gorc, "Good Octets Received"); /* Packet Transmission Stats */ SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd", - CTLFLAG_RD, &adapter->stats.gotc, + CTLFLAG_RD, &sc->stats.gotc, "Good Octets Transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd", - CTLFLAG_RD, &adapter->stats.tpt, + CTLFLAG_RD, &sc->stats.tpt, "Total Packets Transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd", - CTLFLAG_RD, &adapter->stats.gptc, + CTLFLAG_RD, &sc->stats.gptc, "Good Packets Transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd", - CTLFLAG_RD, &adapter->stats.bptc, + CTLFLAG_RD, &sc->stats.bptc, "Broadcast Packets Transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd", - CTLFLAG_RD, &adapter->stats.mptc, + CTLFLAG_RD, &sc->stats.mptc, "Multicast Packets Transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64", - CTLFLAG_RD, &adapter->stats.ptc64, + CTLFLAG_RD, &sc->stats.ptc64, "64 byte frames transmitted "); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127", - CTLFLAG_RD, &adapter->stats.ptc127, + CTLFLAG_RD, &sc->stats.ptc127, "65-127 byte frames transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255", - CTLFLAG_RD, &adapter->stats.ptc255, + CTLFLAG_RD, &sc->stats.ptc255, "128-255 byte frames transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511", - CTLFLAG_RD, &adapter->stats.ptc511, + CTLFLAG_RD, &sc->stats.ptc511, "256-511 byte frames transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023", - CTLFLAG_RD, &adapter->stats.ptc1023, + CTLFLAG_RD, &sc->stats.ptc1023, "512-1023 byte frames transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522", - CTLFLAG_RD, &adapter->stats.ptc1522, + CTLFLAG_RD, &sc->stats.ptc1522, "1024-1522 byte frames transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tso_txd", - CTLFLAG_RD, &adapter->stats.tsctc, + CTLFLAG_RD, &sc->stats.tsctc, "TSO Contexts Transmitted"); SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tso_ctx_fail", - CTLFLAG_RD, &adapter->stats.tsctfc, + CTLFLAG_RD, &sc->stats.tsctfc, "TSO Contexts Failed"); @@ -4330,43 +4462,159 @@ em_add_hw_stats(struct adapter *adapter) int_list = SYSCTL_CHILDREN(int_node); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "asserts", - CTLFLAG_RD, &adapter->stats.iac, + CTLFLAG_RD, &sc->stats.iac, "Interrupt Assertion Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "rx_pkt_timer", - CTLFLAG_RD, &adapter->stats.icrxptc, + CTLFLAG_RD, &sc->stats.icrxptc, "Interrupt Cause Rx Pkt Timer Expire Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "rx_abs_timer", - CTLFLAG_RD, &adapter->stats.icrxatc, + CTLFLAG_RD, &sc->stats.icrxatc, "Interrupt Cause Rx Abs Timer Expire Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "tx_pkt_timer", - CTLFLAG_RD, &adapter->stats.ictxptc, + CTLFLAG_RD, &sc->stats.ictxptc, "Interrupt Cause Tx Pkt Timer Expire Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "tx_abs_timer", - CTLFLAG_RD, &adapter->stats.ictxatc, + CTLFLAG_RD, &sc->stats.ictxatc, "Interrupt Cause Tx Abs Timer Expire Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "tx_queue_empty", - CTLFLAG_RD, &adapter->stats.ictxqec, + CTLFLAG_RD, &sc->stats.ictxqec, "Interrupt Cause Tx Queue Empty Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "tx_queue_min_thresh", - CTLFLAG_RD, &adapter->stats.ictxqmtc, + CTLFLAG_RD, &sc->stats.ictxqmtc, "Interrupt Cause Tx Queue Min Thresh Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "rx_desc_min_thresh", - CTLFLAG_RD, &adapter->stats.icrxdmtc, + CTLFLAG_RD, &sc->stats.icrxdmtc, "Interrupt Cause Rx Desc Min Thresh Count"); SYSCTL_ADD_UQUAD(ctx, int_list, OID_AUTO, "rx_overrun", - CTLFLAG_RD, &adapter->stats.icrxoc, + CTLFLAG_RD, &sc->stats.icrxoc, "Interrupt Cause Receiver Overrun Count"); #endif } +static void +em_fw_version_locked(if_ctx_t ctx) +{ + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; + struct e1000_fw_version *fw_ver = &sc->fw_ver; + uint16_t eep = 0; + + /* + * em_fw_version_locked() must run under the IFLIB_CTX_LOCK to meet the + * NVM locking model, so we do it in em_if_attach_pre() and store the + * info in the softc + */ + ASSERT_CTX_LOCK_HELD(hw); + + *fw_ver = (struct e1000_fw_version){0}; + + if (hw->mac.type >= igb_mac_min) { + /* + * Use the Shared Code for igb(4) + */ + e1000_get_fw_version(hw, fw_ver); + } else { + /* + * Otherwise, EEPROM version should be present on (almost?) all + * devices here + */ + if(e1000_read_nvm(hw, NVM_VERSION, 1, &eep)) { + INIT_DEBUGOUT("can't get EEPROM version"); + return; + } + + fw_ver->eep_major = (eep & NVM_MAJOR_MASK) >> NVM_MAJOR_SHIFT; + fw_ver->eep_minor = (eep & NVM_MINOR_MASK) >> NVM_MINOR_SHIFT; + fw_ver->eep_build = (eep & NVM_IMAGE_ID_MASK); + } +} + +static void +em_sbuf_fw_version(struct e1000_fw_version *fw_ver, struct sbuf *buf) +{ + const char *space = ""; + + if (fw_ver->eep_major || fw_ver->eep_minor || fw_ver->eep_build) { + sbuf_printf(buf, "EEPROM V%d.%d-%d", fw_ver->eep_major, + fw_ver->eep_minor, fw_ver->eep_build); + space = " "; + } + + if (fw_ver->invm_major || fw_ver->invm_minor || fw_ver->invm_img_type) { + sbuf_printf(buf, "%sNVM V%d.%d imgtype%d", + space, fw_ver->invm_major, fw_ver->invm_minor, + fw_ver->invm_img_type); + space = " "; + } + + if (fw_ver->or_valid) { + sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d", + space, fw_ver->or_major, fw_ver->or_build, + fw_ver->or_patch); + space = " "; + } + + if (fw_ver->etrack_id) + sbuf_printf(buf, "%seTrack 0x%08x", space, fw_ver->etrack_id); +} + +static void +em_print_fw_version(struct e1000_softc *sc ) +{ + device_t dev = sc->dev; + struct sbuf *buf; + int error = 0; + + buf = sbuf_new_auto(); + if (!buf) { + device_printf(dev, "Could not allocate sbuf for output.\n"); + return; + } + + em_sbuf_fw_version(&sc->fw_ver, buf); + + error = sbuf_finish(buf); + if (error) + device_printf(dev, "Error finishing sbuf: %d\n", error); + else if (sbuf_len(buf)) + device_printf(dev, "%s\n", sbuf_data(buf)); + + sbuf_delete(buf); +} + +static int +em_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS) +{ + struct e1000_softc *sc = (struct e1000_softc *)arg1; + device_t dev = sc->dev; + struct sbuf *buf; + int error = 0; + + buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); + if (!buf) { + device_printf(dev, "Could not allocate sbuf for output.\n"); + return (ENOMEM); + } + + em_sbuf_fw_version(&sc->fw_ver, buf); + + error = sbuf_finish(buf); + if (error) + device_printf(dev, "Error finishing sbuf: %d\n", error); + + sbuf_delete(buf); + + return (0); +} + /********************************************************************** * * This routine provides a way to dump out the adapter eeprom, @@ -4377,7 +4625,7 @@ em_add_hw_stats(struct adapter *adapter) static int em_sysctl_nvm_info(SYSCTL_HANDLER_ARGS) { - struct adapter *adapter = (struct adapter *)arg1; + struct e1000_softc *sc = (struct e1000_softc *)arg1; int error; int result; @@ -4393,28 +4641,35 @@ em_sysctl_nvm_info(SYSCTL_HANDLER_ARGS) * the screen. */ if (result == 1) - em_print_nvm_info(adapter); + em_print_nvm_info(sc); return (error); } static void -em_print_nvm_info(struct adapter *adapter) +em_print_nvm_info(struct e1000_softc *sc) { + struct e1000_hw *hw = &sc->hw; + struct sx *iflib_ctx_lock = iflib_ctx_lock_get(sc->ctx); u16 eeprom_data; int i, j, row = 0; /* Its a bit crude, but it gets the job done */ printf("\nInterface EEPROM Dump:\n"); printf("Offset\n0x0000 "); + + /* We rely on the IFLIB_CTX_LOCK as part of NVM locking model */ + sx_xlock(iflib_ctx_lock); + ASSERT_CTX_LOCK_HELD(hw); for (i = 0, j = 0; i < 32; i++, j++) { if (j == 8) { /* Make the offset block */ j = 0; ++row; printf("\n0x00%x0 ",row); } - e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data); + e1000_read_nvm(hw, i, 1, &eeprom_data); printf("%04x ", eeprom_data); } + sx_xunlock(iflib_ctx_lock); printf("\n"); } @@ -4423,7 +4678,7 @@ em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) { #ifndef __HAIKU__ struct em_int_delay_info *info; - struct adapter *adapter; + struct e1000_softc *sc; u32 regval; int error, usecs, ticks; @@ -4439,9 +4694,9 @@ em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) if (info->offset == E1000_ITR) /* units are 256ns here */ ticks *= 4; - adapter = info->adapter; + sc = info->sc; - regval = E1000_READ_OFFSET(&adapter->hw, info->offset); + regval = E1000_READ_OFFSET(&sc->hw, info->offset); regval = (regval & ~0xffff) | (ticks & 0xffff); /* Handle a few special cases. */ switch (info->offset) { @@ -4449,30 +4704,28 @@ em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) break; case E1000_TIDV: if (ticks == 0) { - adapter->txd_cmd &= ~E1000_TXD_CMD_IDE; + sc->txd_cmd &= ~E1000_TXD_CMD_IDE; /* Don't write 0 into the TIDV register. */ regval++; } else - adapter->txd_cmd |= E1000_TXD_CMD_IDE; + sc->txd_cmd |= E1000_TXD_CMD_IDE; break; } - E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval); + E1000_WRITE_OFFSET(&sc->hw, info->offset, regval); return (0); -#else - return (EINVAL); #endif } static void -em_add_int_delay_sysctl(struct adapter *adapter, const char *name, +em_add_int_delay_sysctl(struct e1000_softc *sc, const char *name, const char *description, struct em_int_delay_info *info, int offset, int value) { - info->adapter = adapter; + info->sc = sc; info->offset = offset; info->value = value; - SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), + SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, name, CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, info, 0, em_sysctl_int_delay, "I", description); } @@ -4490,14 +4743,14 @@ em_set_flowcntl(SYSCTL_HANDLER_ARGS) { int error; static int input = 3; /* default is full */ - struct adapter *adapter = (struct adapter *) arg1; + struct e1000_softc *sc = (struct e1000_softc *) arg1; error = sysctl_handle_int(oidp, &input, 0, req); if ((error) || (req->newptr == NULL)) return (error); - if (input == adapter->fc) /* no change? */ + if (input == sc->fc) /* no change? */ return (error); switch (input) { @@ -4505,16 +4758,16 @@ em_set_flowcntl(SYSCTL_HANDLER_ARGS) case e1000_fc_tx_pause: case e1000_fc_full: case e1000_fc_none: - adapter->hw.fc.requested_mode = input; - adapter->fc = input; + sc->hw.fc.requested_mode = input; + sc->fc = input; break; default: /* Do nothing */ return (error); } - adapter->hw.fc.current_mode = adapter->hw.fc.requested_mode; - e1000_force_mac_fc(&adapter->hw); + sc->hw.fc.current_mode = sc->hw.fc.requested_mode; + e1000_force_mac_fc(&sc->hw); return (error); } @@ -4526,15 +4779,15 @@ em_set_flowcntl(SYSCTL_HANDLER_ARGS) static int em_sysctl_eee(SYSCTL_HANDLER_ARGS) { - struct adapter *adapter = (struct adapter *) arg1; + struct e1000_softc *sc = (struct e1000_softc *) arg1; int error, value; - value = adapter->hw.dev_spec.ich8lan.eee_disable; + value = sc->hw.dev_spec.ich8lan.eee_disable; error = sysctl_handle_int(oidp, &value, 0, req); if (error || req->newptr == NULL) return (error); - adapter->hw.dev_spec.ich8lan.eee_disable = (value != 0); - em_if_init(adapter->ctx); + sc->hw.dev_spec.ich8lan.eee_disable = (value != 0); + em_if_init(sc->ctx); return (0); } @@ -4542,7 +4795,7 @@ em_sysctl_eee(SYSCTL_HANDLER_ARGS) static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) { - struct adapter *adapter; + struct e1000_softc *sc; int error; int result; @@ -4553,8 +4806,8 @@ em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) return (error); if (result == 1) { - adapter = (struct adapter *) arg1; - em_print_debug_info(adapter); + sc = (struct e1000_softc *) arg1; + em_print_debug_info(sc); } return (error); @@ -4563,7 +4816,7 @@ em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) static int em_get_rs(SYSCTL_HANDLER_ARGS) { - struct adapter *adapter = (struct adapter *) arg1; + struct e1000_softc *sc = (struct e1000_softc *) arg1; int error; int result; @@ -4572,7 +4825,7 @@ em_get_rs(SYSCTL_HANDLER_ARGS) if (error || !req->newptr || result != 1) return (error); - em_dump_rs(adapter); + em_dump_rs(sc); return (error); } @@ -4588,12 +4841,12 @@ em_if_debug(if_ctx_t ctx) * needed for debugging a problem. -jfv */ static void -em_print_debug_info(struct adapter *adapter) +em_print_debug_info(struct e1000_softc *sc) { - device_t dev = iflib_get_dev(adapter->ctx); - struct ifnet *ifp = iflib_get_ifp(adapter->ctx); - struct tx_ring *txr = &adapter->tx_queues->txr; - struct rx_ring *rxr = &adapter->rx_queues->rxr; + device_t dev = iflib_get_dev(sc->ctx); + struct ifnet *ifp = iflib_get_ifp(sc->ctx); + struct tx_ring *txr = &sc->tx_queues->txr; + struct rx_ring *rxr = &sc->rx_queues->rxr; if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) printf("Interface is RUNNING "); @@ -4605,18 +4858,18 @@ em_print_debug_info(struct adapter *adapter) else printf("and ACTIVE\n"); - for (int i = 0; i < adapter->tx_num_queues; i++, txr++) { + for (int i = 0; i < sc->tx_num_queues; i++, txr++) { device_printf(dev, "TX Queue %d ------\n", i); device_printf(dev, "hw tdh = %d, hw tdt = %d\n", - E1000_READ_REG(&adapter->hw, E1000_TDH(i)), - E1000_READ_REG(&adapter->hw, E1000_TDT(i))); + E1000_READ_REG(&sc->hw, E1000_TDH(i)), + E1000_READ_REG(&sc->hw, E1000_TDT(i))); } - for (int j=0; j < adapter->rx_num_queues; j++, rxr++) { + for (int j=0; j < sc->rx_num_queues; j++, rxr++) { device_printf(dev, "RX Queue %d ------\n", j); device_printf(dev, "hw rdh = %d, hw rdt = %d\n", - E1000_READ_REG(&adapter->hw, E1000_RDH(j)), - E1000_READ_REG(&adapter->hw, E1000_RDT(j))); + E1000_READ_REG(&sc->hw, E1000_RDH(j)), + E1000_READ_REG(&sc->hw, E1000_RDT(j))); } } @@ -4628,8 +4881,8 @@ em_print_debug_info(struct adapter *adapter) static void em_enable_vectors_82574(if_ctx_t ctx) { - struct adapter *adapter = iflib_get_softc(ctx); - struct e1000_hw *hw = &adapter->hw; + struct e1000_softc *sc = iflib_get_softc(ctx); + struct e1000_hw *hw = &sc->hw; device_t dev = iflib_get_dev(ctx); u16 edata; diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.h b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.h index a87cb0560f..81caa98441 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.h +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/if_em.h @@ -28,6 +28,16 @@ /*$FreeBSD$*/ +#ifndef _EM_H_DEFINED_ +#define _EM_H_DEFINED_ + +#ifndef __HAIKU__ +#include "opt_ddb.h" +#include "opt_inet.h" +#include "opt_inet6.h" +#include "opt_rss.h" +#endif + #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_device_polling.h" #endif @@ -38,9 +48,7 @@ #include #include #endif -#if __FreeBSD_version >= 800000 #include -#endif #include #include #include @@ -91,11 +99,6 @@ #include "e1000_82571.h" #include "ifdi_if.h" - -#ifndef _EM_H_DEFINED_ -#define _EM_H_DEFINED_ - - /* Tunables */ /* @@ -112,7 +115,7 @@ */ #define EM_MIN_TXD 128 #define EM_MAX_TXD 4096 -#define EM_DEFAULT_TXD 1024 +#define EM_DEFAULT_TXD 1024 #define EM_DEFAULT_MULTI_TXD 4096 #define IGB_MAX_TXD 4096 @@ -131,7 +134,7 @@ */ #define EM_MIN_RXD 128 #define EM_MAX_RXD 4096 -#define EM_DEFAULT_RXD 1024 +#define EM_DEFAULT_RXD 1024 #define EM_DEFAULT_MULTI_RXD 4096 #define IGB_MAX_RXD 4096 @@ -145,7 +148,7 @@ * system is reporting dropped transmits, this value may be set too high * causing the driver to run out of available transmit descriptors. */ -#define EM_TIDV 64 +#define EM_TIDV 64 /* * EM_TADV - Transmit Absolute Interrupt Delay Value @@ -159,7 +162,7 @@ * along with EM_TIDV, may improve traffic throughput in specific * network conditions. */ -#define EM_TADV 64 +#define EM_TADV 64 /* * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) @@ -180,7 +183,7 @@ * restoring the network connection. To eliminate the potential * for the hang ensure that EM_RDTR is set to 0. */ -#define EM_RDTR 0 +#define EM_RDTR 0 /* * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) @@ -193,14 +196,14 @@ * along with EM_RDTR, may improve traffic throughput in specific network * conditions. */ -#define EM_RADV 64 +#define EM_RADV 64 /* * This parameter controls whether or not autonegotation is enabled. * 0 - Disable autonegotiation * 1 - Enable autonegotiation */ -#define DO_AUTO_NEG 1 +#define DO_AUTO_NEG 1 /* * This parameter control whether or not the driver will wait for @@ -208,13 +211,13 @@ * 1 - Wait for autonegotiation to complete * 0 - Don't wait for autonegotiation to complete */ -#define WAIT_FOR_AUTO_NEG_DEFAULT 0 +#define WAIT_FOR_AUTO_NEG_DEFAULT 0 /* Tunables -- End */ #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ - ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ - ADVERTISE_1000_FULL) + ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ + ADVERTISE_1000_FULL) #define AUTO_ALL_MODES 0 @@ -222,33 +225,32 @@ #define EM_MASTER_SLAVE e1000_ms_hw_default /* - * Micellaneous constants + * Miscellaneous constants */ -#define EM_VENDOR_ID 0x8086 -#define EM_FLASH 0x0014 +#define EM_VENDOR_ID 0x8086 +#define EM_FLASH 0x0014 -#define EM_JUMBO_PBA 0x00000028 -#define EM_DEFAULT_PBA 0x00000030 -#define EM_SMARTSPEED_DOWNSHIFT 3 -#define EM_SMARTSPEED_MAX 15 +#define EM_JUMBO_PBA 0x00000028 +#define EM_DEFAULT_PBA 0x00000030 +#define EM_SMARTSPEED_DOWNSHIFT 3 +#define EM_SMARTSPEED_MAX 15 #define EM_MAX_LOOP 10 -#define MAX_NUM_MULTICAST_ADDRESSES 128 -#define PCI_ANY_ID (~0U) -#define ETHER_ALIGN 2 +#define MAX_NUM_MULTICAST_ADDRESSES 128 +#define PCI_ANY_ID (~0U) +#define ETHER_ALIGN 2 #define EM_FC_PAUSE_TIME 0x0680 #define EM_EEPROM_APME 0x400; #define EM_82544_APME 0x0004; - /* Support AutoMediaDetect for Marvell M88 PHY in i354 */ -#define IGB_MEDIA_RESET (1 << 0) +#define IGB_MEDIA_RESET (1 << 0) /* Define the starting Interrupt rate per Queue */ -#define IGB_INTS_PER_SEC 8000 -#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) +#define IGB_INTS_PER_SEC 8000 +#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) -#define IGB_LINK_ITR 2000 +#define IGB_LINK_ITR 2000 #define I210_LINK_DELAY 1000 #define IGB_TXPBSIZE 20408 @@ -265,25 +267,25 @@ * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES, * reset adapter. */ -#define EM_TX_IDLE 0x00000000 -#define EM_TX_BUSY 0x00000001 -#define EM_TX_HUNG 0x80000000 -#define EM_TX_MAXTRIES 10 +#define EM_TX_IDLE 0x00000000 +#define EM_TX_BUSY 0x00000001 +#define EM_TX_HUNG 0x80000000 +#define EM_TX_MAXTRIES 10 -#define PCICFG_DESC_RING_STATUS 0xe4 -#define FLUSH_DESC_REQUIRED 0x100 +#define PCICFG_DESC_RING_STATUS 0xe4 +#define FLUSH_DESC_REQUIRED 0x100 -#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ - ((hw->mac.type <= e1000_82576) ? 16 : 8)) -#define IGB_RX_HTHRESH 8 -#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ - (adapter->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) +#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ + ((hw->mac.type <= e1000_82576) ? 16 : 8)) +#define IGB_RX_HTHRESH 8 +#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ + (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) -#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) -#define IGB_TX_HTHRESH 1 -#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ - (adapter->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) +#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) +#define IGB_TX_HTHRESH 1 +#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ + sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) /* * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be @@ -298,8 +300,8 @@ #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ #define TARC_MQ_FIX (1 << 23) | \ - (1 << 24) | \ - (1 << 25) /* Handle errata in MQ mode */ + (1 << 24) | \ + (1 << 25) /* Handle errata in MQ mode */ #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ /* PCI Config defines */ @@ -313,38 +315,30 @@ #define EM_BAR_MEM_TYPE_32BIT 0x00000000 #define EM_BAR_MEM_TYPE_64BIT 0x00000004 -/* More backward compatibility */ -#if __FreeBSD_version < 900000 -#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD -#endif - /* Defines for printing debug information */ -#define DEBUG_INIT 0 -#define DEBUG_IOCTL 0 -#define DEBUG_HW 0 +#define DEBUG_INIT 0 +#define DEBUG_IOCTL 0 +#define DEBUG_HW 0 -#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") -#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) -#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) -#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") -#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) -#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) -#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") -#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) -#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) +#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") +#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) +#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) +#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") +#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) +#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) +#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") +#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) +#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) #define EM_MAX_SCATTER 40 #define EM_VFTA_SIZE 128 #define EM_TSO_SIZE 65535 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */ -#define EM_MSIX_MASK 0x01F00000 /* For 82574 use */ -#define EM_MSIX_LINK 0x01000000 /* For 82574 use */ #define ETH_ZLEN 60 #define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */ #define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ - CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ - CSUM_IP6_SCTP) /* Offload bits in mbuf flag */ - + CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ + CSUM_IP6_SCTP) /* Offload bits in mbuf flag */ #define IGB_PKTTYPE_MASK 0x0000FFF0 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ @@ -355,7 +349,7 @@ * the em driver only 82574 uses MSI-X we can * solve it just using this define. */ -#define EM_EIAC 0x000DC +#define EM_EIAC 0x000DC /* * 82574 only reports 3 MSI-X vectors by default; * defines assisting with making it report 5 are @@ -365,21 +359,21 @@ #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) #define EM_NVM_MSIX_N_SHIFT 7 -struct adapter; +struct e1000_softc; struct em_int_delay_info { - struct adapter *adapter; /* Back-pointer to the adapter struct */ - int offset; /* Register offset to read/write */ - int value; /* Current value in usecs */ + struct e1000_softc *sc; /* Back-pointer to the sc struct */ + int offset; /* Register offset to read/write */ + int value; /* Current value in usecs */ }; /* * The transmit ring, one per tx queue */ struct tx_ring { - struct adapter *adapter; + struct e1000_softc *sc; struct e1000_tx_desc *tx_base; - uint64_t tx_paddr; + uint64_t tx_paddr; qidx_t *tx_rsq; bool tx_tso; /* last tx was tso */ uint8_t me; @@ -387,9 +381,9 @@ struct tx_ring { qidx_t tx_rs_pidx; qidx_t tx_cidx_processed; /* Interrupt resources */ - void *tag; - struct resource *res; - unsigned long tx_irq; + void *tag; + struct resource *res; + unsigned long tx_irq; /* Saved csum offloading context information */ int csum_flags; @@ -401,103 +395,102 @@ struct tx_ring { int csum_pktlen; uint32_t csum_txd_upper; - uint32_t csum_txd_lower; /* last field */ + uint32_t csum_txd_lower; /* last field */ }; /* * The Receive ring, one per rx queue */ struct rx_ring { - struct adapter *adapter; - struct em_rx_queue *que; - u32 me; - u32 payload; - union e1000_rx_desc_extended *rx_base; - uint64_t rx_paddr; + struct e1000_softc *sc; + struct em_rx_queue *que; + u32 me; + u32 payload; + union e1000_rx_desc_extended *rx_base; + uint64_t rx_paddr; - /* Interrupt resources */ - void *tag; - struct resource *res; + /* Interrupt resources */ + void *tag; + struct resource *res; bool discard; - /* Soft stats */ - unsigned long rx_irq; - unsigned long rx_discarded; - unsigned long rx_packets; - unsigned long rx_bytes; + /* Soft stats */ + unsigned long rx_irq; + unsigned long rx_discarded; + unsigned long rx_packets; + unsigned long rx_bytes; }; struct em_tx_queue { - struct adapter *adapter; - u32 msix; - u32 eims; /* This queue's EIMS bit */ - u32 me; - struct tx_ring txr; + struct e1000_softc *sc; + u32 msix; + u32 eims; /* This queue's EIMS bit */ + u32 me; + struct tx_ring txr; }; struct em_rx_queue { - struct adapter *adapter; - u32 me; - u32 msix; - u32 eims; - struct rx_ring rxr; - u64 irqs; - struct if_irq que_irq; + struct e1000_softc *sc; + u32 me; + u32 msix; + u32 eims; + struct rx_ring rxr; + u64 irqs; + struct if_irq que_irq; }; -/* Our adapter structure */ -struct adapter { - struct ifnet *ifp; - struct e1000_hw hw; +/* Our softc structure */ +struct e1000_softc { + struct e1000_hw hw; - if_softc_ctx_t shared; - if_ctx_t ctx; -#define tx_num_queues shared->isc_ntxqsets -#define rx_num_queues shared->isc_nrxqsets -#define intr_type shared->isc_intr + if_softc_ctx_t shared; + if_ctx_t ctx; +#define tx_num_queues shared->isc_ntxqsets +#define rx_num_queues shared->isc_nrxqsets +#define intr_type shared->isc_intr /* FreeBSD operating-system-specific structures. */ - struct e1000_osdep osdep; - device_t dev; - struct cdev *led_dev; + struct e1000_osdep osdep; + device_t dev; + struct cdev *led_dev; - struct em_tx_queue *tx_queues; - struct em_rx_queue *rx_queues; - struct if_irq irq; + struct em_tx_queue *tx_queues; + struct em_rx_queue *rx_queues; + struct if_irq irq; - struct resource *memory; - struct resource *flash; - struct resource *ioport; + struct resource *memory; + struct resource *flash; + struct resource *ioport; - struct resource *res; - void *tag; - u32 linkvec; - u32 ivars; + struct resource *res; + void *tag; + u32 linkvec; + u32 ivars; - struct ifmedia *media; - int msix; - int if_flags; - int em_insert_vlan_header; - u32 ims; - bool in_detach; + struct ifmedia *media; + int msix; + int if_flags; + int em_insert_vlan_header; + u32 ims; + bool in_detach; - u32 flags; + u32 flags; /* Task for FAST handling */ - struct grouptask link_task; + struct grouptask link_task; - u16 num_vlans; - u32 txd_cmd; + u16 num_vlans; + u32 txd_cmd; - u32 tx_process_limit; - u32 rx_process_limit; - u32 rx_mbuf_sz; + u32 tx_process_limit; + u32 rx_process_limit; + u32 rx_mbuf_sz; /* Management and WOL features */ - u32 wol; - bool has_manage; - bool has_amt; + u32 wol; + bool has_manage; + bool has_amt; /* Multicast array memory */ - u8 *mta; + u8 *mta; /* ** Shadow VFTA table, this is needed because @@ -505,18 +498,21 @@ struct adapter { ** a soft reset and the driver needs to be able ** to repopulate it. */ - u32 shadow_vfta[EM_VFTA_SIZE]; + u32 shadow_vfta[EM_VFTA_SIZE]; /* Info about the interface */ - u16 link_active; - u16 fc; - u16 link_speed; - u16 link_duplex; - u32 smartspeed; - u32 dmac; - int link_mask; + u16 link_active; + u16 fc; + u16 link_speed; + u16 link_duplex; + u32 smartspeed; + u32 dmac; + int link_mask; - u64 que_mask; + u64 que_mask; + + /* We need to store this at attach due to e1000 hw/sw locking model */ + struct e1000_fw_version fw_ver; struct em_int_delay_info tx_int_delay; struct em_int_delay_info tx_abs_int_delay; @@ -525,13 +521,13 @@ struct adapter { struct em_int_delay_info tx_itr; /* Misc stats maintained by the driver */ - unsigned long dropped_pkts; - unsigned long link_irq; - unsigned long rx_overruns; - unsigned long watchdog_events; + unsigned long dropped_pkts; + unsigned long link_irq; + unsigned long rx_overruns; + unsigned long watchdog_events; - struct e1000_hw_stats stats; - u16 vf_ifp; + struct e1000_hw_stats stats; + u16 vf_ifp; }; /******************************************************************************** @@ -542,18 +538,18 @@ struct adapter { * ********************************************************************************/ typedef struct _em_vendor_info_t { - unsigned int vendor_id; - unsigned int device_id; - unsigned int subvendor_id; - unsigned int subdevice_id; - unsigned int index; + unsigned int vendor_id; + unsigned int device_id; + unsigned int subvendor_id; + unsigned int subdevice_id; + unsigned int index; } em_vendor_info_t; -void em_dump_rs(struct adapter *); +void em_dump_rs(struct e1000_softc *); #define EM_RSSRK_SIZE 4 -#define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ - key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ - key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ - key[(i) * EM_RSSRK_SIZE + 3] << 24) +#define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ + key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ + key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ + key[(i) * EM_RSSRK_SIZE + 3] << 24) #endif /* _EM_H_DEFINED_ */ diff --git a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/igb_txrx.c b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/igb_txrx.c index 5ce88e4415..684db41bcd 100644 --- a/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/igb_txrx.c +++ b/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/igb_txrx.c @@ -1,4 +1,6 @@ /*- + * SPDX-License-Identifier: BSD-2-Clause + * * Copyright (c) 2016 Matthew Macy * All rights reserved. * @@ -47,16 +49,20 @@ static int igb_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear); static void igb_isc_rxd_refill(void *arg, if_rxd_update_t iru); -static void igb_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx); -static int igb_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget); +static void igb_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, + qidx_t pidx); +static int igb_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, + qidx_t budget); static int igb_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri); -static int igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 *olinfo_status); -static int igb_tso_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 *olinfo_status); +static int igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, + uint32_t *cmd_type_len, uint32_t *olinfo_status); +static int igb_tso_setup(struct tx_ring *txr, if_pkt_info_t pi, + uint32_t *cmd_type_len, uint32_t *olinfo_status); -static void igb_rx_checksum(u32 staterr, if_rxd_info_t ri, u32 ptype); -static int igb_determine_rsstype(u16 pkt_info); +static void igb_rx_checksum(uint32_t staterr, if_rxd_info_t ri, uint32_t ptype); +static int igb_determine_rsstype(uint16_t pkt_info); extern void igb_if_enable_intr(if_ctx_t ctx); extern int em_intr(void *arg); @@ -72,8 +78,6 @@ struct if_txrx igb_txrx = { .ift_legacy_intr = em_intr }; -extern if_shared_ctx_t em_sctx; - /********************************************************************** * * Setup work for hardware segmentation offload (TSO) on @@ -81,13 +85,14 @@ extern if_shared_ctx_t em_sctx; * **********************************************************************/ static int -igb_tso_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 *olinfo_status) +igb_tso_setup(struct tx_ring *txr, if_pkt_info_t pi, uint32_t *cmd_type_len, + uint32_t *olinfo_status) { struct e1000_adv_tx_context_desc *TXD; - struct adapter *adapter = txr->adapter; - u32 type_tucmd_mlhl = 0, vlan_macip_lens = 0; - u32 mss_l4len_idx = 0; - u32 paylen; + struct e1000_softc *sc = txr->sc; + uint32_t type_tucmd_mlhl = 0, vlan_macip_lens = 0; + uint32_t mss_l4len_idx = 0; + uint32_t paylen; switch(pi->ipi_etype) { case ETHERTYPE_IPV6: @@ -127,11 +132,11 @@ igb_tso_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 *oli mss_l4len_idx |= (pi->ipi_tso_segsz << E1000_ADVTXD_MSS_SHIFT); mss_l4len_idx |= (pi->ipi_tcp_hlen << E1000_ADVTXD_L4LEN_SHIFT); /* 82575 needs the queue index added */ - if (adapter->hw.mac.type == e1000_82575) + if (sc->hw.mac.type == e1000_82575) mss_l4len_idx |= txr->me << 4; TXD->mss_l4len_idx = htole32(mss_l4len_idx); - TXD->seqnum_seed = htole32(0); + TXD->u.seqnum_seed = htole32(0); *cmd_type_len |= E1000_ADVTXD_DCMD_TSE; *olinfo_status |= E1000_TXD_POPTS_TXSM << 8; *olinfo_status |= paylen << E1000_ADVTXD_PAYLEN_SHIFT; @@ -145,12 +150,13 @@ igb_tso_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 *oli * **********************************************************************/ static int -igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 *olinfo_status) +igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, uint32_t *cmd_type_len, + uint32_t *olinfo_status) { struct e1000_adv_tx_context_desc *TXD; - struct adapter *adapter = txr->adapter; - u32 vlan_macip_lens, type_tucmd_mlhl; - u32 mss_l4len_idx; + struct e1000_softc *sc = txr->sc; + uint32_t vlan_macip_lens, type_tucmd_mlhl; + uint32_t mss_l4len_idx; mss_l4len_idx = vlan_macip_lens = type_tucmd_mlhl = 0; /* First check if TSO is to be used */ @@ -164,7 +170,7 @@ igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 * TXD = (struct e1000_adv_tx_context_desc *) &txr->tx_base[pi->ipi_pidx]; /* - ** In advanced descriptors the vlan tag must + ** In advanced descriptors the vlan tag must ** be placed into the context descriptor. Hence ** we need to make one even if not doing offloads. */ @@ -173,7 +179,7 @@ igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 * } else if ((pi->ipi_csum_flags & IGB_CSUM_OFFLOAD) == 0) { return (0); } - + /* Set the ether header length */ vlan_macip_lens |= pi->ipi_ehdrlen << E1000_ADVTXD_MACLEN_SHIFT; @@ -217,13 +223,13 @@ igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 * } /* 82575 needs the queue index added */ - if (adapter->hw.mac.type == e1000_82575) + if (sc->hw.mac.type == e1000_82575) mss_l4len_idx = txr->me << 4; /* Now copy bits into descriptor */ TXD->vlan_macip_lens = htole32(vlan_macip_lens); TXD->type_tucmd_mlhl = htole32(type_tucmd_mlhl); - TXD->seqnum_seed = htole32(0); + TXD->u.seqnum_seed = htole32(0); TXD->mss_l4len_idx = htole32(mss_l4len_idx); return (1); @@ -232,7 +238,7 @@ igb_tx_ctx_setup(struct tx_ring *txr, if_pkt_info_t pi, u32 *cmd_type_len, u32 * static int igb_isc_txd_encap(void *arg, if_pkt_info_t pi) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; struct em_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx]; struct tx_ring *txr = &que->txr; @@ -240,7 +246,7 @@ igb_isc_txd_encap(void *arg, if_pkt_info_t pi) bus_dma_segment_t *segs = pi->ipi_segs; union e1000_adv_tx_desc *txd = NULL; int i, j, pidx_last; - u32 olinfo_status, cmd_type_len, txd_flags; + uint32_t olinfo_status, cmd_type_len, txd_flags; qidx_t ntxd; pidx_last = olinfo_status = 0; @@ -295,19 +301,19 @@ igb_isc_txd_encap(void *arg, if_pkt_info_t pi) static void igb_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx) { - struct adapter *adapter = arg; - struct em_tx_queue *que = &adapter->tx_queues[txqid]; + struct e1000_softc *sc = arg; + struct em_tx_queue *que = &sc->tx_queues[txqid]; struct tx_ring *txr = &que->txr; - E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), pidx); + E1000_WRITE_REG(&sc->hw, E1000_TDT(txr->me), pidx); } static int igb_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) { - struct adapter *adapter = arg; - if_softc_ctx_t scctx = adapter->shared; - struct em_tx_queue *que = &adapter->tx_queues[txqid]; + struct e1000_softc *sc = arg; + if_softc_ctx_t scctx = sc->shared; + struct em_tx_queue *que = &sc->tx_queues[txqid]; struct tx_ring *txr = &que->txr; qidx_t processed = 0; @@ -357,7 +363,7 @@ igb_isc_txd_credits_update(void *arg, uint16_t txqid, bool clear) static void igb_isc_rxd_refill(void *arg, if_rxd_update_t iru) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; uint16_t rxqid = iru->iru_qsidx; struct em_rx_queue *que = &sc->rx_queues[rxqid]; @@ -384,7 +390,7 @@ igb_isc_rxd_refill(void *arg, if_rxd_update_t iru) static void igb_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; struct em_rx_queue *que = &sc->rx_queues[rxqid]; struct rx_ring *rxr = &que->rxr; @@ -394,12 +400,12 @@ igb_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, qidx_t pidx) static int igb_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) { - struct adapter *sc = arg; + struct e1000_softc *sc = arg; if_softc_ctx_t scctx = sc->shared; struct em_rx_queue *que = &sc->rx_queues[rxqid]; struct rx_ring *rxr = &que->rxr; union e1000_adv_rx_desc *rxd; - u32 staterr = 0; + uint32_t staterr = 0; int cnt, i; for (cnt = 0, i = idx; cnt < scctx->isc_nrxd[0] && cnt <= budget;) { @@ -426,20 +432,19 @@ igb_isc_rxd_available(void *arg, uint16_t rxqid, qidx_t idx, qidx_t budget) static int igb_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) { - struct adapter *adapter = arg; - if_softc_ctx_t scctx = adapter->shared; - struct em_rx_queue *que = &adapter->rx_queues[ri->iri_qsidx]; + struct e1000_softc *sc = arg; + if_softc_ctx_t scctx = sc->shared; + struct em_rx_queue *que = &sc->rx_queues[ri->iri_qsidx]; struct rx_ring *rxr = &que->rxr; - struct ifnet *ifp = iflib_get_ifp(adapter->ctx); union e1000_adv_rx_desc *rxd; - u16 pkt_info, len; - u16 vtag = 0; - u32 ptype; - u32 staterr = 0; + uint16_t pkt_info, len; + uint32_t ptype, staterr; + int i, cidx; bool eop; - int i = 0; - int cidx = ri->iri_cidx; + + staterr = i = 0; + cidx = ri->iri_cidx; do { rxd = (union e1000_adv_rx_desc *)&rxr->rx_base[cidx]; @@ -457,16 +462,9 @@ igb_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) rxd->wb.upper.status_error = 0; eop = ((staterr & E1000_RXD_STAT_EOP) == E1000_RXD_STAT_EOP); - if (((adapter->hw.mac.type == e1000_i350) || - (adapter->hw.mac.type == e1000_i354)) && - (staterr & E1000_RXDEXT_STATERR_LB)) - vtag = be16toh(rxd->wb.upper.vlan); - else - vtag = le16toh(rxd->wb.upper.vlan); - /* Make sure bad packets are discarded */ if (eop && ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) != 0)) { - adapter->dropped_pkts++; + sc->dropped_pkts++; ++rxr->rx_discarded; return (EBADMSG); } @@ -477,7 +475,7 @@ igb_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) if (++cidx == scctx->isc_nrxd[0]) cidx = 0; #ifdef notyet - if (rxr->hdr_split == TRUE) { + if (rxr->hdr_split == true) { ri->iri_frags[i].irf_flid = 1; ri->iri_frags[i].irf_idx = cidx; if (++cidx == scctx->isc_nrxd[0]) @@ -489,14 +487,19 @@ igb_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) rxr->rx_packets++; - if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) + if ((scctx->isc_capenable & IFCAP_RXCSUM) != 0) igb_rx_checksum(staterr, ri, ptype); - if ((ifp->if_capenable & IFCAP_VLAN_HWTAGGING) != 0 && - (staterr & E1000_RXD_STAT_VP) != 0) { - ri->iri_vtag = vtag; + if (staterr & E1000_RXD_STAT_VP) { + if (((sc->hw.mac.type == e1000_i350) || + (sc->hw.mac.type == e1000_i354)) && + (staterr & E1000_RXDEXT_STATERR_LB)) + ri->iri_vtag = be16toh(rxd->wb.upper.vlan); + else + ri->iri_vtag = le16toh(rxd->wb.upper.vlan); ri->iri_flags |= M_VLANTAG; } + ri->iri_flowid = le32toh(rxd->wb.lower.hi_dword.rss); ri->iri_rsstype = igb_determine_rsstype(pkt_info); @@ -513,46 +516,34 @@ igb_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri) * *********************************************************************/ static void -igb_rx_checksum(u32 staterr, if_rxd_info_t ri, u32 ptype) +igb_rx_checksum(uint32_t staterr, if_rxd_info_t ri, uint32_t ptype) { - u16 status = (u16)staterr; - u8 errors = (u8) (staterr >> 24); - bool sctp = FALSE; + uint16_t status = (uint16_t)staterr; + uint8_t errors = (uint8_t)(staterr >> 24); - /* Ignore Checksum bit is set */ - if (status & E1000_RXD_STAT_IXSM) { - ri->iri_csum_flags = 0; + if (__predict_false(status & E1000_RXD_STAT_IXSM)) return; - } - if ((ptype & E1000_RXDADV_PKTTYPE_ETQF) == 0 && - (ptype & E1000_RXDADV_PKTTYPE_SCTP) != 0) - sctp = 1; - else - sctp = 0; + /* If there is a layer 3 or 4 error we are done */ + if (__predict_false(errors & (E1000_RXD_ERR_IPE | E1000_RXD_ERR_TCPE))) + return; - if (status & E1000_RXD_STAT_IPCS) { - /* Did it pass? */ - if (!(errors & E1000_RXD_ERR_IPE)) { - /* IP Checksum Good */ - ri->iri_csum_flags = CSUM_IP_CHECKED; - ri->iri_csum_flags |= CSUM_IP_VALID; - } else - ri->iri_csum_flags = 0; - } + /* IP Checksum Good */ + if (status & E1000_RXD_STAT_IPCS) + ri->iri_csum_flags = (CSUM_IP_CHECKED | CSUM_IP_VALID); - if (status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)) { - u64 type = (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); - if (sctp) /* reassign */ - type = CSUM_SCTP_VALID; - /* Did it pass? */ - if (!(errors & E1000_RXD_ERR_TCPE)) { - ri->iri_csum_flags |= type; - if (sctp == 0) - ri->iri_csum_data = htons(0xffff); + /* Valid L4E checksum */ + if (__predict_true(status & + (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) { + /* SCTP header present */ + if (__predict_false((ptype & E1000_RXDADV_PKTTYPE_ETQF) == 0 && + (ptype & E1000_RXDADV_PKTTYPE_SCTP) != 0)) { + ri->iri_csum_flags |= CSUM_SCTP_VALID; + } else { + ri->iri_csum_flags |= CSUM_DATA_VALID | CSUM_PSEUDO_HDR; + ri->iri_csum_data = htons(0xffff); } } - return; } /******************************************************************** @@ -561,7 +552,7 @@ igb_rx_checksum(u32 staterr, if_rxd_info_t ri, u32 ptype) * ******************************************************************/ static int -igb_determine_rsstype(u16 pkt_info) +igb_determine_rsstype(uint16_t pkt_info) { switch (pkt_info & E1000_RXDADV_RSSTYPE_MASK) { case E1000_RXDADV_RSSTYPE_IPV4_TCP: