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arm loader: Style cleanup of loader arm arch code

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* These video sources would be good cannidates to be
  refactored as classes. (like the arm serial code)
* No functional change. There are some order style issues
  in some of the code (the top externs), but I decided to
  not fix them as I can't build these atm to test.
This commit is contained in:
Alexander von Gluck IV
2012-09-15 09:24:13 -05:00
parent d501b694bf
commit 7ccc9b45e8
4 changed files with 83 additions and 62 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/system/boot/arch/arm/arch_video.cpp
+3 -4
View File
@@ -20,8 +20,10 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
//XXX //XXX
extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, uint32 flags); extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size,
uint32 flags);
#define TRACE_VIDEO #define TRACE_VIDEO
@@ -37,7 +39,6 @@ extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, u
#define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a)) #define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a))
#if !BOARD_CPU_PXA270 && !BOARD_CPU_OMAP3 && !BOARD_CPU_ARM920T #if !BOARD_CPU_PXA270 && !BOARD_CPU_OMAP3 && !BOARD_CPU_ARM920T
// #pragma mark - // #pragma mark -
@@ -64,5 +65,3 @@ arch_set_default_video_mode()
#endif #endif
src/system/boot/arch/arm/arch_video_920.cpp
+12 -5
View File
@@ -20,8 +20,10 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
//XXX //XXX
extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, uint32 flags); extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size,
uint32 flags);
#define TRACE_VIDEO #define TRACE_VIDEO
@@ -37,10 +39,12 @@ extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, u
#define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a)) #define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a))
#if BOARD_CPU_ARM920T #if BOARD_CPU_ARM920T
// #pragma mark - // #pragma mark -
extern void *gFrameBufferBase; extern void *gFrameBufferBase;
status_t status_t
@@ -50,15 +54,18 @@ arch_probe_video_mode(void)
gKernelArgs.frame_buffer.width = 1024; gKernelArgs.frame_buffer.width = 1024;
gKernelArgs.frame_buffer.height = 768; gKernelArgs.frame_buffer.height = 768;
gKernelArgs.frame_buffer.bytes_per_row = gKernelArgs.frame_buffer.width * 2; gKernelArgs.frame_buffer.bytes_per_row = gKernelArgs.frame_buffer.width * 2;
gKernelArgs.frame_buffer.physical_buffer.size = gKernelArgs.frame_buffer.width gKernelArgs.frame_buffer.physical_buffer.size
= gKernelArgs.frame_buffer.width
* gKernelArgs.frame_buffer.height * gKernelArgs.frame_buffer.height
* gKernelArgs.frame_buffer.depth / 8; * gKernelArgs.frame_buffer.depth / 8;
#if 0 #if 0
if (!gFrameBufferBase) { if (!gFrameBufferBase) {
int err = platform_allocate_region(&gFrameBufferBase, gKernelArgs.frame_buffer.physical_buffer.size, 0, false); int err = platform_allocate_region(&gFrameBufferBase,
gKernelArgs.frame_buffer.physical_buffer.size, 0, false);
if (err < B_OK) return err; if (err < B_OK) return err;
gKernelArgs.frame_buffer.physical_buffer.start = (addr_t)gFrameBufferBase; gKernelArgs.frame_buffer.physical_buffer.start
= (addr_t)gFrameBufferBase;
dprintf("video framebuffer: %p\n", gFrameBufferBase); dprintf("video framebuffer: %p\n", gFrameBufferBase);
} }
#else #else
src/system/boot/arch/arm/arch_video_omap3.cpp
+37 -26
View File
@@ -20,8 +20,10 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
//XXX //XXX
extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, uint32 flags); extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size,
uint32 flags);
#define TRACE_VIDEO #define TRACE_VIDEO
@@ -37,7 +39,6 @@ extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, u
#define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a)) #define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a))
#if BOARD_CPU_OMAP3 #if BOARD_CPU_OMAP3
// #pragma mark - // #pragma mark -
@@ -87,13 +88,15 @@ struct video_mode modes[] = {
}; };
static inline void setaddr(uint32 reg, unsigned int v) static inline void
setaddr(uint32 reg, unsigned int v)
{ {
*((volatile uint32 *)(reg)) = v; *((volatile uint32 *)(reg)) = v;
} }
static inline void modaddr(unsigned int reg, unsigned int m, unsigned int v) static inline void
modaddr(unsigned int reg, unsigned int m, unsigned int v)
{ {
uint32 o; uint32 o;
@@ -104,19 +107,22 @@ static inline void modaddr(unsigned int reg, unsigned int m, unsigned int v)
} }
static inline void setreg(uint32 base, unsigned int reg, unsigned int v) static inline
void setreg(uint32 base, unsigned int reg, unsigned int v)
{ {
*((volatile uint32 *)(base + reg)) = v; *((volatile uint32 *)(base + reg)) = v;
} }
static inline uint32 readreg(uint32 base, unsigned int reg) static inline
uint32 readreg(uint32 base, unsigned int reg)
{ {
return *((volatile uint32 *)(base + reg)); return *((volatile uint32 *)(base + reg));
} }
static inline void modreg(uint32 base, unsigned int reg, unsigned int m, unsigned int v) static inline void
modreg(uint32 base, unsigned int reg, unsigned int m, unsigned int v)
{ {
uint32 o; uint32 o;
@@ -128,7 +134,8 @@ static inline void modreg(uint32 base, unsigned int reg, unsigned int m, unsigne
// init beagle gpio for video // init beagle gpio for video
static void omap_beagle_init(void) static void
omap_beagle_init(void)
{ {
// setup GPIO stuff, i can't find any references to these // setup GPIO stuff, i can't find any references to these
setreg(GPIO1_BASE, GPIO_OE, 0xfefffedf); setreg(GPIO1_BASE, GPIO_OE, 0xfefffedf);
@@ -137,7 +144,8 @@ static void omap_beagle_init(void)
} }
static void omap_clock_init(void) static void
omap_clock_init(void)
{ {
// sets pixel clock to 72MHz // sets pixel clock to 72MHz
@@ -159,15 +167,18 @@ static void omap_clock_init(void)
} }
static void omap_dss_init(void) static void
omap_dss_init(void)
{ {
setreg(DSS_BASE, DSS_SYSCONFIG, DSS_AUTOIDLE); setreg(DSS_BASE, DSS_SYSCONFIG, DSS_AUTOIDLE);
// Select DSS1 ALWON as clock source // Select DSS1 ALWON as clock source
setreg(DSS_BASE, DSS_CONTROL, DSS_VENC_OUT_SEL | DSS_DAC_POWERDN_BGZ | DSS_DAC_DEMEN | DSS_VENC_CLOCK_4X_ENABLE); setreg(DSS_BASE, DSS_CONTROL, DSS_VENC_OUT_SEL | DSS_DAC_POWERDN_BGZ
| DSS_DAC_DEMEN | DSS_VENC_CLOCK_4X_ENABLE);
} }
static void omap_dispc_init(void) static void
omap_dispc_init(void)
{ {
uint32 DISPC = DISPC_BASE; uint32 DISPC = DISPC_BASE;
@@ -248,7 +259,8 @@ found:
} }
static void omap_attach_framebuffer(void *data, int width, int height, int depth) static void
omap_attach_framebuffer(void *data, int width, int height, int depth)
{ {
uint32 DISPC = DISPC_BASE; uint32 DISPC = DISPC_BASE;
uint32 gsize = ((height - 1) << 16) | (width - 1); uint32 gsize = ((height - 1) << 16) | (width - 1);
@@ -263,22 +275,20 @@ static void omap_attach_framebuffer(void *data, int width, int height, int depth
setreg(DISPC, DISPC_GFX_ROW_INC, 1); setreg(DISPC, DISPC_GFX_ROW_INC, 1);
setreg(DISPC, DISPC_GFX_PIXEL_INC, 1); setreg(DISPC, DISPC_GFX_PIXEL_INC, 1);
setreg(DISPC, DISPC_GFX_WINDOW_SKIP, 0); setreg(DISPC, DISPC_GFX_WINDOW_SKIP, 0);
setreg(DISPC, DISPC_GFX_ATTRIBUTES, setreg(DISPC, DISPC_GFX_ATTRIBUTES, DISPC_GFXFORMAT_RGB16
DISPC_GFXFORMAT_RGB16 | DISPC_GFXBURSTSIZE_16x32 | DISPC_GFXENABLE);
| DISPC_GFXBURSTSIZE_16x32
| DISPC_GFXENABLE);
// Tell hardware to update, and wait for it // Tell hardware to update, and wait for it
modreg(DISPC, DISPC_CONTROL, modreg(DISPC, DISPC_CONTROL, DISPC_GOLCD, DISPC_GOLCD);
DISPC_GOLCD,
DISPC_GOLCD);
while ((readreg(DISPC, DISPC_CONTROL) & DISPC_GOLCD)) while ((readreg(DISPC, DISPC_CONTROL) & DISPC_GOLCD))
; ;
} }
static void omap_init(void) { static void
omap_init(void)
{
dprintf("omap3: video_init()\n"); dprintf("omap3: video_init()\n");
setreg(DISPC_BASE, DISPC_IRQENABLE, 0x00000); setreg(DISPC_BASE, DISPC_IRQENABLE, 0x00000);
@@ -298,15 +308,18 @@ arch_probe_video_mode(void)
gKernelArgs.frame_buffer.width = 1024; gKernelArgs.frame_buffer.width = 1024;
gKernelArgs.frame_buffer.height = 768; gKernelArgs.frame_buffer.height = 768;
gKernelArgs.frame_buffer.bytes_per_row = gKernelArgs.frame_buffer.width * 2; gKernelArgs.frame_buffer.bytes_per_row = gKernelArgs.frame_buffer.width * 2;
gKernelArgs.frame_buffer.physical_buffer.size = gKernelArgs.frame_buffer.width gKernelArgs.frame_buffer.physical_buffer.size
= gKernelArgs.frame_buffer.width
* gKernelArgs.frame_buffer.height * gKernelArgs.frame_buffer.height
* gKernelArgs.frame_buffer.depth / 8; * gKernelArgs.frame_buffer.depth / 8;
#if 0 #if 0
if (!gFrameBufferBase) { if (!gFrameBufferBase) {
int err = platform_allocate_region(&gFrameBufferBase, gKernelArgs.frame_buffer.physical_buffer.size, 0, false); int err = platform_allocate_region(&gFrameBufferBase,
gKernelArgs.frame_buffer.physical_buffer.size, 0, false);
if (err < B_OK) return err; if (err < B_OK) return err;
gKernelArgs.frame_buffer.physical_buffer.start = (addr_t)gFrameBufferBase; gKernelArgs.frame_buffer.physical_buffer.start
= (addr_t)gFrameBufferBase;
dprintf("video framebuffer: %p\n", gFrameBufferBase); dprintf("video framebuffer: %p\n", gFrameBufferBase);
} }
#else #else
@@ -347,5 +360,3 @@ arch_set_default_video_mode()
#endif #endif
src/system/boot/arch/arm/arch_video_pxa.cpp
+14 -10
View File
@@ -20,8 +20,10 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
//XXX //XXX
extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, uint32 flags); extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size,
uint32 flags);
#define TRACE_VIDEO #define TRACE_VIDEO
@@ -37,8 +39,9 @@ extern "C" addr_t mmu_map_physical_memory(addr_t physicalAddress, size_t size, u
#define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a)) #define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a))
#if BOARD_CPU_PXA270 #if BOARD_CPU_PXA270
// #pragma mark - // #pragma mark -
@@ -89,7 +92,8 @@ arch_probe_video_mode(void)
gKernelArgs.frame_buffer.height = (read_io_32(LCCR2) & ((1 << 10) - 1)) + 1; gKernelArgs.frame_buffer.height = (read_io_32(LCCR2) & ((1 << 10) - 1)) + 1;
gKernelArgs.frame_buffer.bytes_per_row = gKernelArgs.frame_buffer.width gKernelArgs.frame_buffer.bytes_per_row = gKernelArgs.frame_buffer.width
* sizeof(uint32); * sizeof(uint32);
gKernelArgs.frame_buffer.physical_buffer.size = gKernelArgs.frame_buffer.width gKernelArgs.frame_buffer.physical_buffer.size
= gKernelArgs.frame_buffer.width
* gKernelArgs.frame_buffer.height * gKernelArgs.frame_buffer.height
* gKernelArgs.frame_buffer.depth / 8; * gKernelArgs.frame_buffer.depth / 8;
@@ -99,10 +103,10 @@ arch_probe_video_mode(void)
gKernelArgs.frame_buffer.enabled = true; gKernelArgs.frame_buffer.enabled = true;
return B_OK; return B_OK;
} }
status_t status_t
arch_set_video_mode(int width, int height, int depth) arch_set_video_mode(int width, int height, int depth)
{ {
@@ -128,13 +132,15 @@ arch_set_video_mode(int width, int height, int depth)
dprintf("error %08x\n", err); dprintf("error %08x\n", err);
if (err < B_OK) if (err < B_OK)
return err; return err;
gKernelArgs.frame_buffer.physical_buffer.start = (addr_t)gFrameBufferBase; gKernelArgs.frame_buffer.physical_buffer.start
= (addr_t)gFrameBufferBase;
/* /*
gFrameBufferBase = (void *)mmu_map_physical_memory( gFrameBufferBase = (void *)mmu_map_physical_memory(
0xa8000000, fbSize, 0); 0xa8000000, fbSize, 0);
if (gFrameBufferBase == NULL) if (gFrameBufferBase == NULL)
return B_NO_MEMORY; return B_NO_MEMORY;
gKernelArgs.frame_buffer.physical_buffer.start = (addr_t)gFrameBufferBase;//0xa8000000; gKernelArgs.frame_buffer.physical_buffer.start
= (addr_t)gFrameBufferBase; // 0xa8000000;
*/ */
} }
#endif #endif
@@ -142,7 +148,6 @@ dprintf("error %08x\n", err);
dprintf("fb @ %p\n", fb); dprintf("fb @ %p\n", fb);
sVideoDMADesc.fdadr = ((uint32)&sVideoDMADesc & ~0x0f) | 0x01; sVideoDMADesc.fdadr = ((uint32)&sVideoDMADesc & ~0x0f) | 0x01;
sVideoDMADesc.fsadr = (uint32)(fb) & ~0x0f; sVideoDMADesc.fsadr = (uint32)(fb) & ~0x0f;
sVideoDMADesc.fidr = 0; sVideoDMADesc.fidr = 0;
@@ -172,7 +177,8 @@ dprintf("error %08x\n", err);
} }
write_io_32(LCCR1, (0 << 0) | (width - 1)); write_io_32(LCCR1, (0 << 0) | (width - 1));
write_io_32(LCCR2, (0 << 0) | (height - 1)); write_io_32(LCCR2, (0 << 0) | (height - 1));
write_io_32(LCCR3, (pdfor << 30) | ((bpp >> 3) << 29) | ((bpp & 0x07) << 24)); write_io_32(LCCR3, (pdfor << 30) | ((bpp >> 3) << 29)
| ((bpp & 0x07) << 24));
write_io_32(FDADR0, sVideoDMADesc.fdadr); write_io_32(FDADR0, sVideoDMADesc.fdadr);
write_io_32(LCCR0, read_io_32(LCCR0) | 0x01800001); // no ints +ENB write_io_32(LCCR0, read_io_32(LCCR0) | 0x01800001); // no ints +ENB
write_io_32(FBR0, sVideoDMADesc.fdadr); write_io_32(FBR0, sVideoDMADesc.fdadr);
@@ -207,5 +213,3 @@ arch_set_default_video_mode()
#endif #endif