diff --git a/headers/private/kernel/arch/x86/arch_cpu.h b/headers/private/kernel/arch/x86/arch_cpu.h
index f8600a3104..ec7e48a69d 100644
--- a/headers/private/kernel/arch/x86/arch_cpu.h
+++ b/headers/private/kernel/arch/x86/arch_cpu.h
@@ -21,12 +21,17 @@
 #define IA32_MSR_MTRR_PHYSICAL_BASE_0	0x200
 #define IA32_MSR_MTRR_PHYSICAL_MASK_0	0x201
 
+// cpuid eax 1 features
+#define IA32_FEATURE_MTRR			(1UL << 12)
+#define IA32_FEATURE_GLOBAL_PAGES	(1UL << 13)
+
+
 // cr4 flags
 #define IA32_CR4_GLOBAL_PAGES		(1UL << 7)
 
 // Memory type ranges
 #define IA32_MTR_UNCACHED			0
-#define IA32_MTR_WRITE_COMBINED		1
+#define IA32_MTR_WRITE_COMBINING	1
 #define IA32_MTR_WRITE_THROUGH		4
 #define IA32_MTR_WRITE_PROTECTED	5
 #define IA32_MTR_WRITE_BACK			6
diff --git a/src/system/kernel/arch/x86/arch_system_info.c b/src/system/kernel/arch/x86/arch_system_info.c
index 13e963ab79..ae3135eb06 100644
--- a/src/system/kernel/arch/x86/arch_system_info.c
+++ b/src/system/kernel/arch/x86/arch_system_info.c
@@ -93,7 +93,7 @@ arch_system_info_init(struct kernel_args *args)
 		else if (!strncmp(cpuInfo.eax_0.vendor_id, "RiseRiseRise", 12))
 			base = B_CPU_RISE_x86;
 		else if (!strncmp(cpuInfo.eax_0.vendor_id, "CentaurHauls", 12))
-			base = B_CPU_IDT_x86;
+			base = B_CPU_VIA_IDT_x86;
 		else if (!strncmp(cpuInfo.eax_0.vendor_id, "NexGenDriven", 12))
 			// ToDo: add NexGen CPU types
 			base = B_CPU_x86;
diff --git a/src/system/kernel/arch/x86/arch_vm.c b/src/system/kernel/arch/x86/arch_vm.c
index c8051b3e47..9cf7c00213 100644
--- a/src/system/kernel/arch/x86/arch_vm.c
+++ b/src/system/kernel/arch/x86/arch_vm.c
@@ -106,7 +106,7 @@ set_memory_type(int32 id, uint64 base, uint64 length, uint32 type)
 			type = IA32_MTR_UNCACHED;
 			break;
 		case B_MTR_WC:
-			type = IA32_MTR_WRITE_COMBINED;
+			type = IA32_MTR_WRITE_COMBINING;
 			break;
 		case B_MTR_WT:
 			type = IA32_MTR_WRITE_THROUGH;
diff --git a/src/system/kernel/arch/x86/arch_vm_translation_map.c b/src/system/kernel/arch/x86/arch_vm_translation_map.c
index 56e128ae2f..94df0b1a6d 100644
--- a/src/system/kernel/arch/x86/arch_vm_translation_map.c
+++ b/src/system/kernel/arch/x86/arch_vm_translation_map.c
@@ -26,8 +26,6 @@
 #	define TRACE(x) ;
 #endif
 
-#define IA32_GLOBAL_PAGE_FEATURE	(1UL << 13)
-
 // 256 MB of iospace
 #define IOSPACE_SIZE (256*1024*1024)
 // put it 256 MB into kernel space
@@ -941,7 +939,7 @@ arch_vm_translation_map_init(kernel_args *args)
 
 	// enable global page feature if available
 	get_current_cpuid(&info, 1);
-	if (info.eax_1.features & IA32_GLOBAL_PAGE_FEATURE) {
+	if (info.eax_1.features & IA32_FEATURE_GLOBAL_PAGES) {
 		// this prevents kernel pages from being flushed from TLB on context-switch
 		x86_write_cr4(x86_read_cr4() | IA32_CR4_GLOBAL_PAGES);
 	}