* style cleanup

* add some missing functions from drm version


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42583 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
2011-08-06 04:39:47 +00:00
parent 6da3f7d4c1
commit 7eb6bbc78c
2 changed files with 123 additions and 116 deletions
@@ -102,11 +102,11 @@ atom_iio_execute(atom_context *ctx, int base, uint32 index, uint32 data)
base++; base++;
break; break;
case ATOM_IIO_READ: case ATOM_IIO_READ:
temp = ctx->card->reg_read(CU16(base + 1)); temp = ctx->card->ioreg_read(CU16(base + 1));
base += 3; base += 3;
break; break;
case ATOM_IIO_WRITE: case ATOM_IIO_WRITE:
ctx->card->reg_write(CU16(base + 1), temp); ctx->card->ioreg_write(CU16(base + 1), temp);
base += 3; base += 3;
break; break;
case ATOM_IIO_CLEAR: case ATOM_IIO_CLEAR:
@@ -165,7 +165,8 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
TRACE("%s: PCI registers are not implemented.\n", __func__); TRACE("%s: PCI registers are not implemented.\n", __func__);
return 0; return 0;
case ATOM_IO_SYSIO: case ATOM_IO_SYSIO:
TRACE("%s: SYSIO registers are not implemented.\n", __func__); TRACE("%s: SYSIO registers are not implemented.\n",
__func__);
return 0; return 0;
default: default:
if (!(gctx->io_mode & 0x80)) { if (!(gctx->io_mode & 0x80)) {
@@ -173,17 +174,19 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
return 0; return 0;
} }
if (!gctx->iio[gctx->io_mode & 0x7F]) { if (!gctx->iio[gctx->io_mode & 0x7F]) {
TRACE("%s: Undefined indirect IO read method %d.\n", __func__, TRACE("%s: Undefined indirect IO read method %d.\n",
gctx->io_mode&0x7F); __func__, gctx->io_mode & 0x7F);
return 0; return 0;
} }
val = atom_iio_execute(gctx, gctx->iio[gctx->io_mode&0x7F], idx, 0); val = atom_iio_execute(gctx,
gctx->iio[gctx->io_mode & 0x7F], idx, 0);
} }
break; break;
case ATOM_ARG_PS: case ATOM_ARG_PS:
idx = U8(*ptr); idx = U8(*ptr);
(*ptr)++; (*ptr)++;
val = ctx->ps[idx]; val = ctx->ps[idx];
// TODO : val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
break; break;
case ATOM_ARG_WS: case ATOM_ARG_WS:
idx = U8(*ptr); idx = U8(*ptr);
@@ -213,6 +216,9 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
case ATOM_WS_ATTRIBUTES: case ATOM_WS_ATTRIBUTES:
val = gctx->io_attr; val = gctx->io_attr;
break; break;
case ATOM_WS_REGPTR:
val = gctx->reg_block;
break;
default: default:
val = ctx->ws[idx]; val = ctx->ws[idx];
} }
@@ -225,7 +231,7 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
case ATOM_ARG_FB: case ATOM_ARG_FB:
idx = U8(*ptr); idx = U8(*ptr);
(*ptr)++; (*ptr)++;
TRACE("%s: FB access is not implemented.\n", __func__); val = gctx->scratch[((gctx->fb_base + idx) / 4)];
return 0; return 0;
case ATOM_ARG_IMM: case ATOM_ARG_IMM:
switch(align) { switch(align) {
@@ -251,13 +257,12 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
case ATOM_ARG_PLL: case ATOM_ARG_PLL:
idx = U8(*ptr); idx = U8(*ptr);
(*ptr)++; (*ptr)++;
gctx->card->reg_write(PLL_INDEX, idx); val = gctx->card->pll_read(idx);
val = gctx->card->reg_read(PLL_DATA);
break; break;
case ATOM_ARG_MC: case ATOM_ARG_MC:
idx = U8(*ptr); idx = U8(*ptr);
(*ptr)++; (*ptr)++;
TRACE("%s: MC registers are not implemented.\n", __func__); val = gctx->card->mc_read(idx);
return 0; return 0;
} }
if (saved) if (saved)
@@ -107,6 +107,7 @@ struct card_info {
#define ATOM_WS_AND_MASK 0x45 #define ATOM_WS_AND_MASK 0x45
#define ATOM_WS_FB_WINDOW 0x46 #define ATOM_WS_FB_WINDOW 0x46
#define ATOM_WS_ATTRIBUTES 0x47 #define ATOM_WS_ATTRIBUTES 0x47
#define ATOM_WS_REGPTR 0x48
#define ATOM_IIO_NOP 0 #define ATOM_IIO_NOP 0
#define ATOM_IIO_START 1 #define ATOM_IIO_START 1
@@ -138,6 +139,7 @@ typedef struct atom_context_s {
uint8 shift; uint8 shift;
int cs_equal, cs_above; int cs_equal, cs_above;
int io_mode; int io_mode;
uint32 *scratch;
} atom_context; } atom_context;
extern int atom_debug; extern int atom_debug;