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* style cleanup

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* add some missing functions from drm version


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42583 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
2011-08-06 04:39:47 +00:00
parent 6da3f7d4c1
commit 7eb6bbc78c
2 changed files with 123 additions and 116 deletions
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src/add-ons/accelerants/radeon_hd/atombios/atom.cpp
+121 -116
View File
@@ -102,38 +102,38 @@ atom_iio_execute(atom_context *ctx, int base, uint32 index, uint32 data)
base++; base++;
break; break;
case ATOM_IIO_READ: case ATOM_IIO_READ:
temp = ctx->card->reg_read(CU16(base + 1)); temp = ctx->card->ioreg_read(CU16(base + 1));
base+=3; base += 3;
break; break;
case ATOM_IIO_WRITE: case ATOM_IIO_WRITE:
ctx->card->reg_write(CU16(base + 1), temp); ctx->card->ioreg_write(CU16(base + 1), temp);
base+=3; base += 3;
break; break;
case ATOM_IIO_CLEAR: case ATOM_IIO_CLEAR:
temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2)); temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2));
base+=3; base += 3;
break; break;
case ATOM_IIO_SET: case ATOM_IIO_SET:
temp |= (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2); temp |= (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2);
base+=3; base += 3;
break; break;
case ATOM_IIO_MOVE_INDEX: case ATOM_IIO_MOVE_INDEX:
temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2)); temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2));
temp |= ((index >> CU8(base + 2)) temp |= ((index >> CU8(base + 2))
& (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 3); & (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 3);
base+=4; base += 4;
break; break;
case ATOM_IIO_MOVE_DATA: case ATOM_IIO_MOVE_DATA:
temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2)); temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2));
temp |= ((data >> CU8(base + 2)) temp |= ((data >> CU8(base + 2))
& (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 3); & (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 3);
base+=4; base += 4;
break; break;
case ATOM_IIO_MOVE_ATTR: case ATOM_IIO_MOVE_ATTR:
temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2)); temp &= ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 2));
temp |= ((ctx->io_attr >> CU8(base + 2)) temp |= ((ctx->io_attr >> CU8(base + 2))
& (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 3); & (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 3);
base+=4; base += 4;
break; break;
case ATOM_IIO_END: case ATOM_IIO_END:
return temp; return temp;
@@ -153,115 +153,120 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
arg = attr & 7; arg = attr & 7;
align = (attr >> 3) & 7; align = (attr >> 3) & 7;
switch(arg) { switch(arg) {
case ATOM_ARG_REG: case ATOM_ARG_REG:
idx = U16(*ptr); idx = U16(*ptr);
(*ptr)+=2; (*ptr)+=2;
idx += gctx->reg_block; idx += gctx->reg_block;
switch(gctx->io_mode) { switch(gctx->io_mode) {
case ATOM_IO_MM: case ATOM_IO_MM:
val = gctx->card->reg_read(idx); val = gctx->card->reg_read(idx);
break; break;
case ATOM_IO_PCI: case ATOM_IO_PCI:
TRACE("%s: PCI registers are not implemented.\n", __func__); TRACE("%s: PCI registers are not implemented.\n", __func__);
return 0; return 0;
case ATOM_IO_SYSIO: case ATOM_IO_SYSIO:
TRACE("%s: SYSIO registers are not implemented.\n", __func__); TRACE("%s: SYSIO registers are not implemented.\n",
return 0; __func__);
default: return 0;
if (!(gctx->io_mode&0x80)) { default:
TRACE("%s: Bad IO mode.\n", __func__); if (!(gctx->io_mode & 0x80)) {
return 0; TRACE("%s: Bad IO mode.\n", __func__);
} return 0;
if (!gctx->iio[gctx->io_mode&0x7F]) { }
TRACE("%s: Undefined indirect IO read method %d.\n", __func__, if (!gctx->iio[gctx->io_mode & 0x7F]) {
gctx->io_mode&0x7F); TRACE("%s: Undefined indirect IO read method %d.\n",
return 0; __func__, gctx->io_mode & 0x7F);
} return 0;
val = atom_iio_execute(gctx, gctx->iio[gctx->io_mode&0x7F], idx, 0); }
} val = atom_iio_execute(gctx,
break; gctx->iio[gctx->io_mode & 0x7F], idx, 0);
case ATOM_ARG_PS: }
idx = U8(*ptr); break;
(*ptr)++; case ATOM_ARG_PS:
val = ctx->ps[idx]; idx = U8(*ptr);
break; (*ptr)++;
case ATOM_ARG_WS: val = ctx->ps[idx];
idx = U8(*ptr); // TODO : val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
(*ptr)++; break;
switch(idx) { case ATOM_ARG_WS:
case ATOM_WS_QUOTIENT: idx = U8(*ptr);
val = gctx->divmul[0]; (*ptr)++;
break; switch(idx) {
case ATOM_WS_REMAINDER: case ATOM_WS_QUOTIENT:
val = gctx->divmul[1]; val = gctx->divmul[0];
break; break;
case ATOM_WS_DATAPTR: case ATOM_WS_REMAINDER:
val = gctx->data_block; val = gctx->divmul[1];
break; break;
case ATOM_WS_SHIFT: case ATOM_WS_DATAPTR:
val = gctx->shift; val = gctx->data_block;
break; break;
case ATOM_WS_OR_MASK: case ATOM_WS_SHIFT:
val = 1<<gctx->shift; val = gctx->shift;
break; break;
case ATOM_WS_AND_MASK: case ATOM_WS_OR_MASK:
val = ~(1<<gctx->shift); val = 1 << gctx->shift;
break; break;
case ATOM_WS_FB_WINDOW: case ATOM_WS_AND_MASK:
val = gctx->fb_base; val = ~(1 << gctx->shift);
break; break;
case ATOM_WS_ATTRIBUTES: case ATOM_WS_FB_WINDOW:
val = gctx->io_attr; val = gctx->fb_base;
break; break;
default: case ATOM_WS_ATTRIBUTES:
val = ctx->ws[idx]; val = gctx->io_attr;
} break;
break; case ATOM_WS_REGPTR:
case ATOM_ARG_ID: val = gctx->reg_block;
idx = U16(*ptr); break;
(*ptr)+=2; default:
val = U32(idx + gctx->data_block); val = ctx->ws[idx];
break; }
case ATOM_ARG_FB: break;
idx = U8(*ptr); case ATOM_ARG_ID:
(*ptr)++; idx = U16(*ptr);
TRACE("%s: FB access is not implemented.\n", __func__); (*ptr) += 2;
return 0; val = U32(idx + gctx->data_block);
case ATOM_ARG_IMM: break;
switch(align) { case ATOM_ARG_FB:
case ATOM_SRC_DWORD: idx = U8(*ptr);
val = U32(*ptr); (*ptr)++;
(*ptr)+=4; val = gctx->scratch[((gctx->fb_base + idx) / 4)];
return val; return 0;
case ATOM_SRC_WORD0: case ATOM_ARG_IMM:
case ATOM_SRC_WORD8: switch(align) {
case ATOM_SRC_WORD16: case ATOM_SRC_DWORD:
val = U16(*ptr); val = U32(*ptr);
(*ptr)+=2; (*ptr)+=4;
return val; return val;
case ATOM_SRC_BYTE0: case ATOM_SRC_WORD0:
case ATOM_SRC_BYTE8: case ATOM_SRC_WORD8:
case ATOM_SRC_BYTE16: case ATOM_SRC_WORD16:
case ATOM_SRC_BYTE24: val = U16(*ptr);
val = U8(*ptr); (*ptr) += 2;
(*ptr)++; return val;
return val; case ATOM_SRC_BYTE0:
} case ATOM_SRC_BYTE8:
return 0; case ATOM_SRC_BYTE16:
case ATOM_ARG_PLL: case ATOM_SRC_BYTE24:
idx = U8(*ptr); val = U8(*ptr);
(*ptr)++; (*ptr)++;
gctx->card->reg_write(PLL_INDEX, idx); return val;
val = gctx->card->reg_read(PLL_DATA); }
break; return 0;
case ATOM_ARG_MC: case ATOM_ARG_PLL:
idx = U8(*ptr); idx = U8(*ptr);
(*ptr)++; (*ptr)++;
TRACE("%s: MC registers are not implemented.\n", __func__); val = gctx->card->pll_read(idx);
return 0; break;
case ATOM_ARG_MC:
idx = U8(*ptr);
(*ptr)++;
val = gctx->card->mc_read(idx);
return 0;
} }
if (saved) if (saved)
*saved = val; *saved = val;
val &= atom_arg_mask[align]; val &= atom_arg_mask[align];
val >>= atom_arg_shift[align]; val >>= atom_arg_shift[align];
return val; return val;
src/add-ons/accelerants/radeon_hd/atombios/atom.h
+2
View File
@@ -107,6 +107,7 @@ struct card_info {
#define ATOM_WS_AND_MASK 0x45 #define ATOM_WS_AND_MASK 0x45
#define ATOM_WS_FB_WINDOW 0x46 #define ATOM_WS_FB_WINDOW 0x46
#define ATOM_WS_ATTRIBUTES 0x47 #define ATOM_WS_ATTRIBUTES 0x47
#define ATOM_WS_REGPTR 0x48
#define ATOM_IIO_NOP 0 #define ATOM_IIO_NOP 0
#define ATOM_IIO_START 1 #define ATOM_IIO_START 1
@@ -138,6 +139,7 @@ typedef struct atom_context_s {
uint8 shift; uint8 shift;
int cs_equal, cs_above; int cs_equal, cs_above;
int io_mode; int io_mode;
uint32 *scratch;
} atom_context; } atom_context;
extern int atom_debug; extern int atom_debug;