* style cleanup
* add some missing functions from drm version git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42583 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -102,11 +102,11 @@ atom_iio_execute(atom_context *ctx, int base, uint32 index, uint32 data)
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base++;
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break;
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case ATOM_IIO_READ:
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temp = ctx->card->reg_read(CU16(base + 1));
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temp = ctx->card->ioreg_read(CU16(base + 1));
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base += 3;
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break;
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case ATOM_IIO_WRITE:
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ctx->card->reg_write(CU16(base + 1), temp);
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ctx->card->ioreg_write(CU16(base + 1), temp);
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base += 3;
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break;
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case ATOM_IIO_CLEAR:
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@@ -165,7 +165,8 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
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TRACE("%s: PCI registers are not implemented.\n", __func__);
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return 0;
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case ATOM_IO_SYSIO:
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TRACE("%s: SYSIO registers are not implemented.\n", __func__);
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TRACE("%s: SYSIO registers are not implemented.\n",
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__func__);
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return 0;
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default:
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if (!(gctx->io_mode & 0x80)) {
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@@ -173,17 +174,19 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
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return 0;
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}
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if (!gctx->iio[gctx->io_mode & 0x7F]) {
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TRACE("%s: Undefined indirect IO read method %d.\n", __func__,
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gctx->io_mode&0x7F);
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TRACE("%s: Undefined indirect IO read method %d.\n",
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__func__, gctx->io_mode & 0x7F);
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return 0;
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}
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val = atom_iio_execute(gctx, gctx->iio[gctx->io_mode&0x7F], idx, 0);
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val = atom_iio_execute(gctx,
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gctx->iio[gctx->io_mode & 0x7F], idx, 0);
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}
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break;
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case ATOM_ARG_PS:
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idx = U8(*ptr);
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(*ptr)++;
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val = ctx->ps[idx];
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// TODO : val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
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break;
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case ATOM_ARG_WS:
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idx = U8(*ptr);
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@@ -213,6 +216,9 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
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case ATOM_WS_ATTRIBUTES:
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val = gctx->io_attr;
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break;
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case ATOM_WS_REGPTR:
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val = gctx->reg_block;
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break;
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default:
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val = ctx->ws[idx];
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}
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@@ -225,7 +231,7 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
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case ATOM_ARG_FB:
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idx = U8(*ptr);
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(*ptr)++;
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TRACE("%s: FB access is not implemented.\n", __func__);
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val = gctx->scratch[((gctx->fb_base + idx) / 4)];
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return 0;
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case ATOM_ARG_IMM:
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switch(align) {
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@@ -251,13 +257,12 @@ atom_get_src_int(atom_exec_context *ctx, uint8 attr, int *ptr,
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case ATOM_ARG_PLL:
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idx = U8(*ptr);
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(*ptr)++;
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gctx->card->reg_write(PLL_INDEX, idx);
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val = gctx->card->reg_read(PLL_DATA);
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val = gctx->card->pll_read(idx);
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break;
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case ATOM_ARG_MC:
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idx = U8(*ptr);
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(*ptr)++;
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TRACE("%s: MC registers are not implemented.\n", __func__);
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val = gctx->card->mc_read(idx);
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return 0;
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}
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if (saved)
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@@ -107,6 +107,7 @@ struct card_info {
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#define ATOM_WS_AND_MASK 0x45
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#define ATOM_WS_FB_WINDOW 0x46
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#define ATOM_WS_ATTRIBUTES 0x47
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#define ATOM_WS_REGPTR 0x48
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#define ATOM_IIO_NOP 0
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#define ATOM_IIO_START 1
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@@ -138,6 +139,7 @@ typedef struct atom_context_s {
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uint8 shift;
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int cs_equal, cs_above;
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int io_mode;
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uint32 *scratch;
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} atom_context;
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extern int atom_debug;
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