From 802ac6355d9d2300ad64f798e6431d7b87de5656 Mon Sep 17 00:00:00 2001
From: Alexander von Gluck IV <kallisti5@unixzen.com>
Date: Fri, 9 Dec 2011 21:22:48 -0600
Subject: [PATCH] Style cleanup, space after switch as it is not a function

---
 src/add-ons/accelerants/radeon_hd/connector.cpp | 4 ++--
 src/add-ons/accelerants/radeon_hd/display.cpp   | 6 +++---
 src/add-ons/accelerants/radeon_hd/encoder.cpp   | 2 +-
 src/add-ons/accelerants/radeon_hd/mode.cpp      | 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/add-ons/accelerants/radeon_hd/connector.cpp b/src/add-ons/accelerants/radeon_hd/connector.cpp
index 642998d5b1..a7e438f094 100644
--- a/src/add-ons/accelerants/radeon_hd/connector.cpp
+++ b/src/add-ons/accelerants/radeon_hd/connector.cpp
@@ -67,7 +67,7 @@ dp_aux_speak(uint32 hwLine, uint8* send, int sendBytes,
 
 	*ack = args.v1.ucReplyStatus;
 
-	switch(args.v1.ucReplyStatus) {
+	switch (args.v1.ucReplyStatus) {
 		case 1:
 			ERROR("%s: dp_aux_ch timeout!\n", __func__);
 			return B_TIMED_OUT;
@@ -978,7 +978,7 @@ connector_probe()
 			gConnector[connectorIndex]->encoder.isTV = false;
 			gConnector[connectorIndex]->encoder.isHDMI = false;
 
-			switch(connectorType) {
+			switch (connectorType) {
 				case VIDEO_CONNECTOR_COMPOSITE:
 				case VIDEO_CONNECTOR_SVIDEO:
 				case VIDEO_CONNECTOR_9DIN:
diff --git a/src/add-ons/accelerants/radeon_hd/display.cpp b/src/add-ons/accelerants/radeon_hd/display.cpp
index 70933ff62d..cc94f568b3 100644
--- a/src/add-ons/accelerants/radeon_hd/display.cpp
+++ b/src/add-ons/accelerants/radeon_hd/display.cpp
@@ -47,7 +47,7 @@ init_registers(register_info* regs, uint8 crtcID)
 		// Evergreen
 		uint32 offset = 0;
 
-		switch(crtcID) {
+		switch (crtcID) {
 			case 0:
 				offset = EVERGREEN_CRTC0_REGISTER_OFFSET;
 				regs->vgaControl = AVIVO_D1VGA_CONTROL;
@@ -111,7 +111,7 @@ init_registers(register_info* regs, uint8 crtcID)
 		// R700 series
 		uint32 offset = 0;
 
-		switch(crtcID) {
+		switch (crtcID) {
 			case 0:
 				offset = R600_CRTC0_REGISTER_OFFSET;
 				regs->vgaControl = AVIVO_D1VGA_CONTROL;
@@ -158,7 +158,7 @@ init_registers(register_info* regs, uint8 crtcID)
 		// Avivo+
 		uint32 offset = 0;
 
-		switch(crtcID) {
+		switch (crtcID) {
 			case 0:
 				offset = R600_CRTC0_REGISTER_OFFSET;
 				regs->vgaControl = AVIVO_D1VGA_CONTROL;
diff --git a/src/add-ons/accelerants/radeon_hd/encoder.cpp b/src/add-ons/accelerants/radeon_hd/encoder.cpp
index 897a8040b1..2a793b9fe4 100644
--- a/src/add-ons/accelerants/radeon_hd/encoder.cpp
+++ b/src/add-ons/accelerants/radeon_hd/encoder.cpp
@@ -1243,7 +1243,7 @@ encoder_object_lookup(uint32 encoderFlags, uint8 dacID)
 uint32
 encoder_type_lookup(uint32 encoderID, uint32 connectorFlags)
 {
-	switch(encoderID) {
+	switch (encoderID) {
 		case ENCODER_OBJECT_ID_INTERNAL_LVDS:
 		case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
diff --git a/src/add-ons/accelerants/radeon_hd/mode.cpp b/src/add-ons/accelerants/radeon_hd/mode.cpp
index a701554f52..d609c7a2de 100644
--- a/src/add-ons/accelerants/radeon_hd/mode.cpp
+++ b/src/add-ons/accelerants/radeon_hd/mode.cpp
@@ -124,7 +124,7 @@ radeon_dpms_set(int mode)
 {
 	radeon_shared_info &info = *gInfo->shared_info;
 
-	switch(mode) {
+	switch (mode) {
 		case B_DPMS_ON:
 			TRACE("%s: ON\n", __func__);
 			for (uint8 id = 0; id < MAX_DISPLAY; id++) {