Merge remote-tracking branch 'haiku/master' into package-management
Conflicts: build/jam/BuildSetup build/jam/HaikuImage build/jam/board/sam460ex/BoardSetup build/jam/board/verdex/BoardSetup data/catalogs/apps/icon-o-matic/fr.catkeys src/add-ons/kernel/drivers/audio/hda/hda_codec.cpp src/add-ons/kernel/drivers/disk/usb/usb_disk/usb_disk.cpp src/apps/debugger/files/FileManager.cpp src/apps/debugger/files/FileManager.h src/apps/debugger/user_interface/gui/inspector_window/MemoryView.cpp src/apps/haiku-depot/MainWindow.cpp src/apps/haiku-depot/MainWindow.h src/apps/haiku-depot/Model.cpp src/apps/haiku-depot/PackageInfo.h src/apps/haiku-depot/PackageInfoListener.h src/apps/haiku-depot/PackageInfoView.cpp src/apps/haiku-depot/PackageInfoView.h src/apps/haiku-depot/PackageListView.cpp src/apps/haiku-depot/PackageListView.h src/system/kernel/arch/arm/arch_timer.cpp src/system/libroot/os/arch/arm/atomic.S src/tools/translation/bitsinfo/Jamfile src/tools/translation/bmpinfo/Jamfile src/tools/translation/tgainfo/Jamfile
This commit is contained in:
Ingo Weinhold
@@ -0,0 +1,468 @@
|
||||
/*
|
||||
* Copyright (c) 2012 Oleksandr Tymoshenko <[email protected]>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
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||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
compatible = "arm,1176jzf-s";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
SOC: axi {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x20000000 0x01000000>;
|
||||
ranges = <0 0x20000000 0x01000000>;
|
||||
|
||||
intc: interrupt-controller {
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||||
compatible = "broadcom,bcm2835-armctrl-ic",
|
||||
"broadcom,bcm2708-armctrl-ic";
|
||||
reg = <0xB200 0x200>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
/* Bank 0
|
||||
* 0: ARM_TIMER
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||||
* 1: ARM_MAILBOX
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||||
* 2: ARM_DOORBELL_0
|
||||
* 3: ARM_DOORBELL_1
|
||||
* 4: VPU0_HALTED
|
||||
* 5: VPU1_HALTED
|
||||
* 6: ILLEGAL_TYPE0
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||||
* 7: ILLEGAL_TYPE1
|
||||
*/
|
||||
|
||||
/* Bank 1
|
||||
* 0: TIMER0 16: DMA0
|
||||
* 1: TIMER1 17: DMA1
|
||||
* 2: TIMER2 18: VC_DMA2
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||||
* 3: TIMER3 19: VC_DMA3
|
||||
* 4: CODEC0 20: DMA4
|
||||
* 5: CODEC1 21: DMA5
|
||||
* 6: CODEC2 22: DMA6
|
||||
* 7: VC_JPEG 23: DMA7
|
||||
* 8: ISP 24: DMA8
|
||||
* 9: VC_USB 25: DMA9
|
||||
* 10: VC_3D 26: DMA10
|
||||
* 11: TRANSPOSER 27: DMA11
|
||||
* 12: MULTICORESYNC0 28: DMA12
|
||||
* 13: MULTICORESYNC1 29: AUX
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||||
* 14: MULTICORESYNC2 30: ARM
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||||
* 15: MULTICORESYNC3 31: VPUDMA
|
||||
*/
|
||||
|
||||
/* Bank 2
|
||||
* 0: HOSTPORT 16: SMI
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||||
* 1: VIDEOSCALER 17: GPIO0
|
||||
* 2: CCP2TX 18: GPIO1
|
||||
* 3: SDC 19: GPIO2
|
||||
* 4: DSI0 20: GPIO3
|
||||
* 5: AVE 21: VC_I2C
|
||||
* 6: CAM0 22: VC_SPI
|
||||
* 7: CAM1 23: VC_I2SPCM
|
||||
* 8: HDMI0 24: VC_SDIO
|
||||
* 9: HDMI1 25: VC_UART
|
||||
* 10: PIXELVALVE1 26: SLIMBUS
|
||||
* 11: I2CSPISLV 27: VEC
|
||||
* 12: DSI1 28: CPG
|
||||
* 13: PWA0 29: RNG
|
||||
* 14: PWA1 30: VC_ARASANSDIO
|
||||
* 15: CPR 31: AVSPMON
|
||||
*/
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "broadcom,bcm2835-system-timer",
|
||||
"broadcom,bcm2708-system-timer";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupts = <8 9 10 11>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
clock-frequency = <1000000>;
|
||||
};
|
||||
|
||||
armtimer {
|
||||
/* Not AMBA compatible */
|
||||
compatible = "broadcom,bcm2835-sp804", "arm,sp804";
|
||||
reg = <0xB400 0x24>;
|
||||
interrupts = <0>;
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
||||
watchdog0 {
|
||||
compatible = "broadcom,bcm2835-wdt",
|
||||
"broadcom,bcm2708-wdt";
|
||||
reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
|
||||
};
|
||||
|
||||
gpio: gpio {
|
||||
compatible = "broadcom,bcm2835-gpio",
|
||||
"broadcom,bcm2708-gpio";
|
||||
reg = <0x200000 0xb0>;
|
||||
|
||||
/* Unusual arrangement of interrupts
|
||||
* (determined by testing)
|
||||
* 17: Bank 0 (GPIOs 0-31)
|
||||
* 19: Bank 1 (GPIOs 32-53)
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||||
* 18: Bank 2
|
||||
* 20: All banks (GPIOs 0-53)
|
||||
*/
|
||||
interrupts = <57 59 58 60>;
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||||
interrupt-parent = <&intc>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pins_reserved>;
|
||||
|
||||
/* Pins that can short 3.3V to GND in output mode: 46-47
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||||
* Pins used by VideoCore: 48-53
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||||
*/
|
||||
broadcom,read-only = <46>, <47>, <48>, <49>, <50>,
|
||||
<51>, <52>, <53>;
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||||
|
||||
/* BSC0 */
|
||||
pins_bsc0_a: bsc0_a {
|
||||
broadcom,pins = <0>, <1>;
|
||||
};
|
||||
|
||||
pins_bsc0_b: bsc0_b {
|
||||
broadcom,pins = <28>, <29>;
|
||||
};
|
||||
|
||||
pins_bsc0_c: bsc0_c {
|
||||
broadcom,pins = <44>, <45>;
|
||||
};
|
||||
|
||||
/* BSC1 */
|
||||
pins_bsc1_a: bsc1_a {
|
||||
broadcom,pins = <2>, <3>;
|
||||
};
|
||||
|
||||
pins_bsc1_b: bsc1_b {
|
||||
broadcom,pins = <44>, <45>;
|
||||
};
|
||||
|
||||
/* GPCLK0 */
|
||||
pins_gpclk0_a: gpclk0_a {
|
||||
broadcom,pins = <4>;
|
||||
};
|
||||
|
||||
pins_gpclk0_b: gpclk0_b {
|
||||
broadcom,pins = <20>;
|
||||
};
|
||||
|
||||
pins_gpclk0_c: gpclk0_c {
|
||||
broadcom,pins = <32>;
|
||||
};
|
||||
|
||||
pins_gpclk0_d: gpclk0_d {
|
||||
broadcom,pins = <34>;
|
||||
};
|
||||
|
||||
/* GPCLK1 */
|
||||
pins_gpclk1_a: gpclk1_a {
|
||||
broadcom,pins = <5>;
|
||||
};
|
||||
|
||||
pins_gpclk1_b: gpclk1_b {
|
||||
broadcom,pins = <21>;
|
||||
};
|
||||
|
||||
pins_gpclk1_c: gpclk1_c {
|
||||
broadcom,pins = <42>;
|
||||
};
|
||||
|
||||
pins_gpclk1_d: gpclk1_d {
|
||||
broadcom,pins = <44>;
|
||||
};
|
||||
|
||||
/* GPCLK2 */
|
||||
pins_gpclk2_a: gpclk2_a {
|
||||
broadcom,pins = <6>;
|
||||
};
|
||||
|
||||
pins_gpclk2_b: gpclk2_b {
|
||||
broadcom,pins = <43>;
|
||||
};
|
||||
|
||||
/* SPI0 */
|
||||
pins_spi0_a: spi0_a {
|
||||
broadcom,pins = <7>, <8>, <9>, <10>, <11>;
|
||||
};
|
||||
|
||||
pins_spi0_b: spi0_b {
|
||||
broadcom,pins = <35>, <36>, <37>, <38>, <39>;
|
||||
};
|
||||
|
||||
/* PWM */
|
||||
pins_pwm0_a: pwm0_a {
|
||||
broadcom,pins = <12>;
|
||||
};
|
||||
|
||||
pins_pwm0_b: pwm0_b {
|
||||
broadcom,pins = <18>;
|
||||
};
|
||||
|
||||
pins_pwm0_c: pwm0_c {
|
||||
broadcom,pins = <40>;
|
||||
};
|
||||
|
||||
pins_pwm1_a: pwm1_a {
|
||||
broadcom,pins = <13>;
|
||||
};
|
||||
|
||||
pins_pwm1_b: pwm1_b {
|
||||
broadcom,pins = <19>;
|
||||
};
|
||||
|
||||
pins_pwm1_c: pwm1_c {
|
||||
broadcom,pins = <41>;
|
||||
};
|
||||
|
||||
pins_pwm1_d: pwm1_d {
|
||||
broadcom,pins = <45>;
|
||||
};
|
||||
|
||||
/* UART0 */
|
||||
pins_uart0_a: uart0_a {
|
||||
broadcom,pins = <14>, <15>;
|
||||
};
|
||||
|
||||
pins_uart0_b: uart0_b {
|
||||
broadcom,pins = <32>, <33>;
|
||||
};
|
||||
|
||||
pins_uart0_c: uart0_c {
|
||||
broadcom,pins = <36>, <37>;
|
||||
};
|
||||
|
||||
pins_uart0_fc_a: uart0_fc_a {
|
||||
broadcom,pins = <16>, <17>;
|
||||
};
|
||||
|
||||
pins_uart0_fc_b: uart0_fc_b {
|
||||
broadcom,pins = <30>, <31>;
|
||||
};
|
||||
|
||||
pins_uart0_fc_c: uart0_fc_c {
|
||||
broadcom,pins = <39>, <38>;
|
||||
};
|
||||
|
||||
/* PCM */
|
||||
pins_pcm_a: pcm_a {
|
||||
broadcom,pins = <18>, <19>, <20>, <21>;
|
||||
};
|
||||
|
||||
pins_pcm_b: pcm_b {
|
||||
broadcom,pins = <28>, <29>, <30>, <31>;
|
||||
};
|
||||
|
||||
/* Secondary Address Bus */
|
||||
pins_sm_addr_a: sm_addr_a {
|
||||
broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
|
||||
};
|
||||
|
||||
pins_sm_addr_b: sm_addr_b {
|
||||
broadcom,pins = <33>, <32>, <31>, <30>, <29>,
|
||||
<28>;
|
||||
};
|
||||
|
||||
pins_sm_ctl_a: sm_ctl_a {
|
||||
broadcom,pins = <6>, <7>;
|
||||
};
|
||||
|
||||
pins_sm_ctl_b: sm_ctl_b {
|
||||
broadcom,pins = <34>, <35>;
|
||||
};
|
||||
|
||||
pins_sm_data_8bit_a: sm_data_8bit_a {
|
||||
broadcom,pins = <8>, <9>, <10>, <11>, <12>,
|
||||
<13>, <14>, <15>;
|
||||
};
|
||||
|
||||
pins_sm_data_8bit_b: sm_data_8bit_b {
|
||||
broadcom,pins = <36>, <37>, <38>, <39>, <40>,
|
||||
<41>, <42>, <43>;
|
||||
};
|
||||
|
||||
pins_sm_data_16bit: sm_data_16bit {
|
||||
broadcom,pins = <16>, <17>, <18>, <19>, <20>,
|
||||
<21>, <22>, <23>;
|
||||
};
|
||||
|
||||
pins_sm_data_18bit: sm_data_18bit {
|
||||
broadcom,pins = <24>, <25>;
|
||||
};
|
||||
|
||||
/* BSCSL */
|
||||
pins_bscsl: bscsl {
|
||||
broadcom,pins = <18>, <19>;
|
||||
};
|
||||
|
||||
/* SPISL */
|
||||
pins_spisl: spisl {
|
||||
broadcom,pins = <18>, <19>, <20>, <21>;
|
||||
};
|
||||
|
||||
/* SPI1 */
|
||||
pins_spi1: spi1 {
|
||||
broadcom,pins = <16>, <17>, <18>, <19>, <20>,
|
||||
<21>;
|
||||
};
|
||||
|
||||
/* UART1 */
|
||||
pins_uart1_a: uart1_a {
|
||||
broadcom,pins = <14>, <15>;
|
||||
};
|
||||
|
||||
pins_uart1_b: uart1_b {
|
||||
broadcom,pins = <32>, <33>;
|
||||
};
|
||||
|
||||
pins_uart1_c: uart1_c {
|
||||
broadcom,pins = <40>, <41>;
|
||||
};
|
||||
|
||||
pins_uart1_fc_a: uart1_fc_a {
|
||||
broadcom,pins = <16>, <17>;
|
||||
};
|
||||
|
||||
pins_uart1_fc_b: uart1_fc_b {
|
||||
broadcom,pins = <30>, <31>;
|
||||
};
|
||||
|
||||
pins_uart1_fc_c: uart1_fc_c {
|
||||
broadcom,pins = <43>, <42>;
|
||||
};
|
||||
|
||||
/* SPI2 */
|
||||
pins_spi2: spi2 {
|
||||
broadcom,pins = <40>, <41>, <42>, <43>, <44>,
|
||||
<45>;
|
||||
};
|
||||
|
||||
/* ARM JTAG */
|
||||
pins_arm_jtag_trst: arm_jtag_trst {
|
||||
broadcom,pins = <22>;
|
||||
};
|
||||
|
||||
pins_arm_jtag_a: arm_jtag_a {
|
||||
broadcom,pins = <4>, <5>, <6>, <12>, <13>;
|
||||
};
|
||||
|
||||
pins_arm_jtag_b: arm_jtag_b {
|
||||
broadcom,pins = <23>, <24>, <25>, <26>, <27>;
|
||||
};
|
||||
|
||||
/* Reserved */
|
||||
pins_reserved: reserved {
|
||||
broadcom,pins = <48>, <49>, <50>, <51>, <52>,
|
||||
<53>;
|
||||
};
|
||||
};
|
||||
|
||||
dma: dma {
|
||||
compatible = "broadcom,bcm2835-dma",
|
||||
"broadcom,bcm2708-dma";
|
||||
reg = <0x7000 0x1000>, <0xE05000 0x1000>;
|
||||
interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
broadcom,channels = <0>; /* Set by VideoCore */
|
||||
};
|
||||
|
||||
vc_mbox: mbox {
|
||||
compatible = "broadcom,bcm2835-mbox",
|
||||
"broadcom,bcm2708-mbox";
|
||||
reg = <0xB880 0x40>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
/* Channels
|
||||
* 0: Power
|
||||
* 1: Frame buffer
|
||||
* 2: Virtual UART
|
||||
* 3: VCHIQ
|
||||
* 4: LEDs
|
||||
* 5: Buttons
|
||||
* 6: Touch screen
|
||||
*/
|
||||
};
|
||||
|
||||
sdhci {
|
||||
compatible = "broadcom,bcm2835-sdhci",
|
||||
"broadcom,bcm2708-sdhci";
|
||||
reg = <0x300000 0x100>;
|
||||
interrupts = <70>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
clock-frequency = <50000000>; /* Set by VideoCore */
|
||||
};
|
||||
|
||||
uart0: uart0 {
|
||||
compatible = "broadcom,bcm2835-uart",
|
||||
"broadcom,bcm2708-uart", "arm,pl011",
|
||||
"arm,primecell";
|
||||
reg = <0x201000 0x1000>;
|
||||
interrupts = <65>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
clock-frequency = <3000000>; /* Set by VideoCore */
|
||||
reg-shift = <2>;
|
||||
};
|
||||
|
||||
vchiq {
|
||||
compatible = "broadcom,bcm2835-vchiq";
|
||||
reg = <0xB800 0x50>;
|
||||
interrupts = <2>;
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
||||
usb {
|
||||
compatible = "broadcom,bcm2835-usb",
|
||||
"broadcom,bcm2708-usb",
|
||||
"synopsys,designware-hs-otg2";
|
||||
reg = <0x980000 0x20000>;
|
||||
interrupts = <17>;
|
||||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,14 @@
|
||||
/* The pxa3xx skeleton simply augments the 2xx version */
|
||||
/include/ "pxa2xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Marvell PXA27x familiy SoC";
|
||||
compatible = "marvell,pxa27x";
|
||||
|
||||
pxabus {
|
||||
pxairq: interrupt-controller@40d00000 {
|
||||
marvell,intc-priority;
|
||||
marvell,intc-nr-irqs = <34>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,135 @@
|
||||
/*
|
||||
* pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
|
||||
*
|
||||
* Copyright (C) 2011 Marek Vasut <[email protected]>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Marvell PXA2xx family SoC";
|
||||
compatible = "marvell,pxa2xx";
|
||||
interrupt-parent = <&pxairq>;
|
||||
|
||||
aliases {
|
||||
serial0 = &ffuart;
|
||||
serial1 = &btuart;
|
||||
serial2 = &stuart;
|
||||
serial3 = &hwuart;
|
||||
/* i2c0 = &pwri2c; */
|
||||
i2c1 = &pxai2c1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
cpu {
|
||||
compatible = "marvell,xscale";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
pxabus {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pxairq: interrupt-controller@40d00000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "marvell,pxa-intc";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
marvell,intc-nr-irqs = <32>;
|
||||
reg = <0x40d00000 0xd0>;
|
||||
};
|
||||
|
||||
gpio: gpio@40e00000 {
|
||||
compatible = "mrvl,pxa-gpio";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
reg = <0x40e00000 0x10000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <0x2>;
|
||||
interrupts = <10>;
|
||||
interrupt-names = "gpio_mux";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <0x2>;
|
||||
ranges;
|
||||
|
||||
gcb0: gpio@40e00000 {
|
||||
reg = <0x40e00000 0x4>;
|
||||
};
|
||||
|
||||
gcb1: gpio@40e00004 {
|
||||
reg = <0x40e00004 0x4>;
|
||||
};
|
||||
|
||||
gcb2: gpio@40e00008 {
|
||||
reg = <0x40e00008 0x4>;
|
||||
};
|
||||
gcb3: gpio@40e0000c {
|
||||
reg = <0x40e0000c 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
ffuart: uart@40100000 {
|
||||
compatible = "mrvl,pxa-uart";
|
||||
reg = <0x40100000 0x30>;
|
||||
interrupts = <22>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
btuart: uart@40200000 {
|
||||
compatible = "mrvl,pxa-uart";
|
||||
reg = <0x40200000 0x30>;
|
||||
interrupts = <21>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
stuart: uart@40700000 {
|
||||
compatible = "mrvl,pxa-uart";
|
||||
reg = <0x40700000 0x30>;
|
||||
interrupts = <20>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hwuart: uart@41100000 {
|
||||
compatible = "mrvl,pxa-uart";
|
||||
reg = <0x41100000 0x30>;
|
||||
interrupts = <7>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pxai2c1: i2c@40301680 {
|
||||
compatible = "mrvl,pxa-i2c";
|
||||
reg = <0x40301680 0x30>;
|
||||
interrupts = <18>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@4c000000 {
|
||||
compatible = "mrvl,pxa-ohci";
|
||||
reg = <0x4c000000 0x10000>;
|
||||
interrupts = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@41100000 {
|
||||
compatible = "mrvl,pxa-mmc";
|
||||
reg = <0x41100000 0x1000>;
|
||||
interrupts = <23>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@40900000 {
|
||||
compatible = "marvell,pxa-rtc";
|
||||
reg = <0x40900000 0x3c>;
|
||||
interrupts = <30 31>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,381 @@
|
||||
/*
|
||||
* Copyright (c) 2012 Oleksandr Tymoshenko <[email protected]>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "bcm2835.dtsi"
|
||||
|
||||
/memreserve/ 0x08000000 0x08000000; /* Set by VideoCore */
|
||||
|
||||
/ {
|
||||
model = "Raspberry Pi (BCM2835)";
|
||||
compatible = "raspberrypi,model-a", "raspberrypi,model-b",
|
||||
"broadcom,bcm2835-vc", "broadcom,bcm2708-vc";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x8000000>; /* 128MB, Set by VideoCore */
|
||||
|
||||
};
|
||||
|
||||
system {
|
||||
revision = <0>; /* Set by VideoCore */
|
||||
serial = <0 0>; /* Set by VideoCore */
|
||||
};
|
||||
|
||||
axi {
|
||||
gpio: gpio {
|
||||
/* BSC0 */
|
||||
pins_bsc0_a: bsc0_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_bsc0_b: bsc0_b {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_bsc0_c: bsc0_c {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
/* BSC1 */
|
||||
pins_bsc1_a: bsc1_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_bsc1_b: bsc1_b {
|
||||
broadcom,function = "ALT2";
|
||||
};
|
||||
|
||||
/* GPCLK0 */
|
||||
pins_gpclk0_a: gpclk0_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_gpclk0_b: gpclk0_b {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_gpclk0_c: gpclk0_c {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_gpclk0_d: gpclk0_d {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
/* GPCLK1 */
|
||||
pins_gpclk1_a: gpclk1_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_gpclk1_b: gpclk1_b {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_gpclk1_c: gpclk1_c {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_gpclk1_d: gpclk1_d {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
/* GPCLK2 */
|
||||
pins_gpclk2_a: gpclk2_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_gpclk2_b: gpclk2_b {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
/* SPI0 */
|
||||
pins_spi0_a: spi0_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_spi0_b: spi0_b {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
/* PWM */
|
||||
pins_pwm0_a: pwm0_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_pwm0_b: pwm0_b {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_pwm0_c: pwm0_c {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_pwm1_a: pwm1_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_pwm1_b: pwm1_b {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_pwm1_c: pwm1_c {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_pwm1_d: pwm1_d {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
/* UART0 */
|
||||
pins_uart0_a: uart0_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_uart0_b: uart0_b {
|
||||
broadcom,function = "ALT3";
|
||||
};
|
||||
|
||||
pins_uart0_c: uart0_c {
|
||||
broadcom,function = "ALT2";
|
||||
};
|
||||
|
||||
pins_uart0_fc_a: uart0_fc_a {
|
||||
broadcom,function = "ALT3";
|
||||
};
|
||||
|
||||
pins_uart0_fc_b: uart0_fc_b {
|
||||
broadcom,function = "ALT3";
|
||||
};
|
||||
|
||||
pins_uart0_fc_c: uart0_fc_c {
|
||||
broadcom,function = "ALT2";
|
||||
};
|
||||
|
||||
/* PCM */
|
||||
pins_pcm_a: pcm_a {
|
||||
broadcom,function = "ALT0";
|
||||
};
|
||||
|
||||
pins_pcm_b: pcm_b {
|
||||
broadcom,function = "ALT2";
|
||||
};
|
||||
|
||||
/* Secondary Address Bus */
|
||||
pins_sm_addr_a: sm_addr_a {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
pins_sm_addr_b: sm_addr_b {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
pins_sm_ctl_a: sm_ctl_a {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
pins_sm_ctl_b: sm_ctl_b {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
pins_sm_data_8bit_a: sm_data_8bit_a {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
pins_sm_data_8bit_b: sm_data_8bit_b {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
pins_sm_data_16bit: sm_data_16bit {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
pins_sm_data_18bit: sm_data_18bit {
|
||||
broadcom,function = "ALT1";
|
||||
};
|
||||
|
||||
/* BSCSL */
|
||||
pins_bscsl: bscsl {
|
||||
broadcom,function = "ALT3";
|
||||
};
|
||||
|
||||
/* SPISL */
|
||||
pins_spisl: spisl {
|
||||
broadcom,function = "ALT3";
|
||||
};
|
||||
|
||||
/* SPI1 */
|
||||
pins_spi1: spi1 {
|
||||
broadcom,function = "ALT4";
|
||||
};
|
||||
|
||||
/* UART1 */
|
||||
pins_uart1_a: uart1_a {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_uart1_b: uart1_b {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_uart1_c: uart1_c {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_uart1_fc_a: uart1_fc_a {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_uart1_fc_b: uart1_fc_b {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_uart1_fc_c: uart1_fc_c {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
/* SPI2 */
|
||||
pins_spi2: spi2 {
|
||||
broadcom,function = "ALT4";
|
||||
};
|
||||
|
||||
/* ARM JTAG */
|
||||
pins_arm_jtag_trst: arm_jtag_trst {
|
||||
broadcom,function = "ALT4";
|
||||
};
|
||||
|
||||
pins_arm_jtag_a: arm_jtag_a {
|
||||
broadcom,function = "ALT5";
|
||||
};
|
||||
|
||||
pins_arm_jtag_b: arm_jtag_b {
|
||||
broadcom,function = "ALT4";
|
||||
};
|
||||
|
||||
/* Reserved */
|
||||
pins_reserved: reserved {
|
||||
broadcom,function = "ALT3";
|
||||
};
|
||||
};
|
||||
usb {
|
||||
hub {
|
||||
compatible = "usb,hub", "usb,device";
|
||||
reg = <0x00000001>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ethernet {
|
||||
compatible = "net,ethernet",
|
||||
"usb,device";
|
||||
reg = <0x00000001>;
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
|
||||
};
|
||||
|
||||
display {
|
||||
compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb";
|
||||
|
||||
broadcom,vc-mailbox = <&vc_mbox>;
|
||||
broadcom,vc-channel = <1>;
|
||||
|
||||
broadcom,width = <0>; /* Set by VideoCore */
|
||||
broadcom,height = <0>; /* Set by VideoCore */
|
||||
broadcom,depth = <0>; /* Set by VideoCore */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ok {
|
||||
label = "ok";
|
||||
gpios = <&gpio 16 1>;
|
||||
|
||||
/* Don't change this - it configures
|
||||
* how the led driver determines if
|
||||
* the led is on or off when it loads.
|
||||
*/
|
||||
default-state = "keep";
|
||||
|
||||
/* This is the real default state. */
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
|
||||
power: regulator {
|
||||
compatible = "broadcom,bcm2835-power-mgr",
|
||||
"broadcom,bcm2708-power-mgr",
|
||||
"simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
broadcom,vc-mailbox = <&vc_mbox>;
|
||||
broadcom,vc-channel = <0>;
|
||||
|
||||
regulator-name = "VideoCore";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on = <1>;
|
||||
|
||||
sd_card_power: regulator@0 {
|
||||
compatible = "broadcom,bcm2835-power-dev",
|
||||
"broadcom,bcm2708-power-dev";
|
||||
reg = <0>;
|
||||
|
||||
vin-supply = <&power>;
|
||||
regulator-name = "SD Card";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
/* This is for the controller itself, not the root port */
|
||||
usb_hcd_power: regulator@3 {
|
||||
compatible = "broadcom,bcm2835-power-dev",
|
||||
"broadcom,bcm2708-power-dev";
|
||||
reg = <3>;
|
||||
|
||||
vin-supply = <&power>;
|
||||
regulator-name = "USB HCD";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
uart0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = ""; /* Set by VideoCore */
|
||||
stdin = "uart0";
|
||||
stdout = "uart0";
|
||||
};
|
||||
|
||||
};
|
||||
@@ -0,0 +1,13 @@
|
||||
/*
|
||||
* Skeleton device tree; the bare minimum needed to boot; just include and
|
||||
* add a compatible value. The bootloader will typically populate the memory
|
||||
* node.
|
||||
*/
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
aliases { };
|
||||
memory { device_type = "memory"; reg = <0 0>; };
|
||||
};
|
||||
@@ -0,0 +1,41 @@
|
||||
/dts-v1/;
|
||||
/include/ "pxa27x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gumstix Verdex";
|
||||
compatible = "gumstix,verdex", "marvell,pxa27x";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 debug";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0xa0000000 0x10000000>;
|
||||
};
|
||||
|
||||
pxabus {
|
||||
ffuart: uart@40100000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb0: ohci@4c000000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* The devices below should be in pxa27x.dtsi, but I kept them here
|
||||
so to keep the files from upstream as clean as possible for now */
|
||||
|
||||
lcdc: lcdc@44000000 {
|
||||
compatible = "mrvl,pxa-lcdc" ;
|
||||
reg = <0x44000000 0xa0> ;
|
||||
interrupts = <17> ;
|
||||
};
|
||||
|
||||
timers: timers@40a00000 {
|
||||
compatible = "mrvl,pxa-timers" ;
|
||||
reg = <0x40a00000 0xc0> ;
|
||||
interrupts = <26>, <27>, <28>, <29>, <7> ;
|
||||
interrupt-names = "OST_0", "OST_1", "OST_2", "OST_3", "OST_4_11" ;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user