From 81d3e946975ff140b636b6e49235b80244640e76 Mon Sep 17 00:00:00 2001 From: shatty Date: Mon, 1 Dec 2003 06:39:19 +0000 Subject: [PATCH] openBeOS_Neomagic_V0.05_src git-svn-id: file:///srv/svn/repos/haiku/trunk/current@5518 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../accelerants/neomagic/GetModeInfo.c | 6 ++-- .../accelerants/neomagic/engine/nm_acc.c | 12 +++---- .../accelerants/neomagic/engine/nm_bes.c | 4 +-- .../accelerants/neomagic/engine/nm_crtc.c | 33 +++++++++++++------ .../accelerants/neomagic/engine/nm_general.c | 7 ++-- .../kernel/drivers/graphics/neomagic/driver.c | 10 ++++-- 6 files changed, 47 insertions(+), 25 deletions(-) diff --git a/src/add-ons/accelerants/neomagic/GetModeInfo.c b/src/add-ons/accelerants/neomagic/GetModeInfo.c index 6a1f4de45d..65318b7464 100644 --- a/src/add-ons/accelerants/neomagic/GetModeInfo.c +++ b/src/add-ons/accelerants/neomagic/GetModeInfo.c @@ -3,7 +3,7 @@ This file may be used under the terms of the Be Sample Code License. Other authors: - Rudolf Cornelissen 4/2003-6/2003 + Rudolf Cornelissen 4/2003-8/2003 */ #define MODULE_BIT 0x02000000 @@ -86,5 +86,7 @@ status_t GET_PIXEL_CLOCK_LIMITS(display_mode *dm, uint32 *low, uint32 *high) /* Return the semaphore id that will be used to signal a vertical sync occured. */ sem_id ACCELERANT_RETRACE_SEMAPHORE(void) { - return si->vblank; +// return si->vblank; +//temp: + return B_ERROR; } diff --git a/src/add-ons/accelerants/neomagic/engine/nm_acc.c b/src/add-ons/accelerants/neomagic/engine/nm_acc.c index 18efd62760..661e56d616 100644 --- a/src/add-ons/accelerants/neomagic/engine/nm_acc.c +++ b/src/add-ons/accelerants/neomagic/engine/nm_acc.c @@ -1,7 +1,7 @@ /* nm Acceleration functions */ /* Authors: Mark Watson 2/2000, - Rudolf Cornelissen 10/2002-4/2003. + Rudolf Cornelissen 10/2002-8/2003. */ #define MODULE_BIT 0x00080000 @@ -33,11 +33,11 @@ static uint8 depth; status_t mn_acc_wait_idle() { - volatile int i; - while (ACCR(STATUS)&(1<<16)) - { - for (i=0;i<10000;i++); /*spin in place so I do not hammer the bus*/ - }; +// volatile int i; +// while (ACCR(STATUS)&(1<<16)) +// { +// for (i=0;i<10000;i++); /*spin in place so I do not hammer the bus*/ +// }; return B_OK; } diff --git a/src/add-ons/accelerants/neomagic/engine/nm_bes.c b/src/add-ons/accelerants/neomagic/engine/nm_bes.c index a75dcbcdcb..2e03f7f048 100644 --- a/src/add-ons/accelerants/neomagic/engine/nm_bes.c +++ b/src/add-ons/accelerants/neomagic/engine/nm_bes.c @@ -455,8 +455,8 @@ status_t mn_configure_bes { /* PCI card */ LOG(4,("Overlay: accelerant is programming BES\n")); - /* unlock card overlay sequencer registers */ - PCIGRPHW(GENLOCK, 0x20); + /* unlock card overlay sequencer registers (b5 = 1) */ + PCIGRPHW(GENLOCK, (PCIGRPHR(GENLOCK) | 0x20)); /* destination rectangle */ PCIGRPHW(HDCOORD1L, ((bi.hcoordv >> 16) & 0xff)); PCIGRPHW(HDCOORD2L, (bi.hcoordv & 0xff)); diff --git a/src/add-ons/accelerants/neomagic/engine/nm_crtc.c b/src/add-ons/accelerants/neomagic/engine/nm_crtc.c index 806682313e..d1163e11c6 100644 --- a/src/add-ons/accelerants/neomagic/engine/nm_crtc.c +++ b/src/add-ons/accelerants/neomagic/engine/nm_crtc.c @@ -1,6 +1,6 @@ /* CTRC functionality */ /* Author: - Rudolf Cornelissen 4/2003-6/2003 + Rudolf Cornelissen 4/2003-8/2003 */ #define MODULE_BIT 0x00040000 @@ -82,9 +82,6 @@ status_t mn_crtc_validate_timing( /* set a mode line */ status_t mn_crtc_set_timing(display_mode target, bool crt_only) { - uint8 hsync_pos = (target.timing.flags & B_POSITIVE_HSYNC); - uint8 vsync_pos = (target.timing.flags & B_POSITIVE_VSYNC); - uint8 temp; uint32 htotal; /*total horizontal total VCLKs*/ @@ -204,17 +201,33 @@ status_t mn_crtc_set_timing(display_mode target, bool crt_only) )); /* setup HSYNC & VSYNC polarity */ + LOG(2,("CRTC: sync polarity: ")); temp = ISARB(MISCR); - if (vsync_pos) temp &= ~0x80; - else temp |= 0x80; - if (hsync_pos) temp &= ~0x40; - else temp |= 0x40; + if (target.timing.flags & B_POSITIVE_HSYNC) + { + LOG(2,("H:pos ")); + temp &= ~0x40; + } + else + { + LOG(2,("H:neg ")); + temp |= 0x40; + } + if (target.timing.flags & B_POSITIVE_VSYNC) + { + LOG(2,("V:pos ")); + temp &= ~0x80; + } + else + { + LOG(2,("V:neg ")); + temp |= 0x80; + } /* we need to wait a bit or the card will mess-up it's register values.. */ snooze(10); ISAWB(MISCW, temp); - LOG(2,("CRTC: HSYNC/VSYNC polarity: %x %x, MISC reg readback: $%02x\n", - hsync_pos, vsync_pos, ISARB(MISCR))); + LOG(2,(", MISC reg readback: $%02x\n", ISARB(MISCR))); } else { diff --git a/src/add-ons/accelerants/neomagic/engine/nm_general.c b/src/add-ons/accelerants/neomagic/engine/nm_general.c index 846e8db5a7..ef1d5ec9e8 100644 --- a/src/add-ons/accelerants/neomagic/engine/nm_general.c +++ b/src/add-ons/accelerants/neomagic/engine/nm_general.c @@ -1,5 +1,5 @@ /* Author: - Rudolf Cornelissen 4/2003-6/2003 + Rudolf Cornelissen 4/2003-8/2003 */ #define MODULE_BIT 0x00008000 @@ -47,7 +47,7 @@ status_t mn_general_powerup() { status_t status; - LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.04 running.\n")); + LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.05 running.\n")); /* detect card type and power it up */ switch(CFGR(DEVID)) @@ -170,7 +170,8 @@ status_t nm_general_powerup() ISAGRPHW(GRPHXLOCK, 0x26); /* unlock cards CRTC registers */ - ISAGRPHW(GENLOCK, 0x00); +//don't touch: most cards get into trouble on this! +// ISAGRPHW(GENLOCK, 0x00); /* initialize the shared_info struct */ set_specs(); diff --git a/src/add-ons/kernel/drivers/graphics/neomagic/driver.c b/src/add-ons/kernel/drivers/graphics/neomagic/driver.c index 2e34dd4d5a..5cd189c625 100644 --- a/src/add-ons/kernel/drivers/graphics/neomagic/driver.c +++ b/src/add-ons/kernel/drivers/graphics/neomagic/driver.c @@ -34,6 +34,7 @@ #define get_pci(o, s) (*pci_bus->read_pci_config)(pcii->bus, pcii->device, pcii->function, (o), (s)) #define set_pci(o, s, v) (*pci_bus->write_pci_config)(pcii->bus, pcii->device, pcii->function, (o), (s), (v)) #define KISAGRPHW(A,B)(isa_bus->write_io_16(NMISA16_GRPHIND, ((NMGRPHX_##A) | ((B) << 8)))) +#define KISAGRPHR(A) (isa_bus->write_io_8(NMISA8_GRPHIND, (NMGRPHX_##A)), isa_bus->read_io_8(NMISA8_GRPHDAT)) #define KISASEQW(A,B)(isa_bus->write_io_16(NMISA16_SEQIND, ((NMSEQX_##A) | ((B) << 8)))) #define MAX_DEVICES 8 @@ -900,9 +901,14 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) { void drv_program_bes_ISA(mn_bes_data *bes) { + uint8 temp; + /* ISA card */ - /* unlock card overlay sequencer registers */ - KISAGRPHW(GENLOCK, 0x20); + /* unlock card overlay sequencer registers (b5 = 1) */ + temp = (KISAGRPHR(GENLOCK) | 0x20); + /* we need to wait a bit or the card will mess-up it's register values.. (NM2160) */ + snooze(10); + KISAGRPHW(GENLOCK, temp); /* destination rectangle */ KISAGRPHW(HDCOORD1L, ((bes->hcoordv >> 16) & 0xff)); KISAGRPHW(HDCOORD2L, (bes->hcoordv & 0xff));