openBeOS_Nvidia_V0.05_src

git-svn-id: file:///srv/svn/repos/haiku/trunk/current@5505 a95241bf-73f2-0310-859d-f6bbb57e9c96

headers/private/graphics/nvidia/nv_macros.h

@@ -130,6 +130,7 @@ chip->PMC[0x00000140/4]  = chip->EnableIRQ & 0x01;
 #define NV32_RASTER			0x00600808
 #define NV32_NV10CURADD32	0x0060080c
 #define NV32_CURCONF		0x00600810
+#define NV32_FUNCSEL		0x00600860
 
 /* secondary head */
 #define NV8_ATTR2INDW		0x006033c0
@@ -143,6 +144,7 @@ chip->PMC[0x00000140/4]  = chip->EnableIRQ & 0x01;
 #define NV32_RASTER2		0x00602808//verify!!!
 #define NV32_NV10CUR2ADD32	0x0060280c//verify!!!
 #define NV32_2CURCONF		0x00602810//verify!!!
+#define NV32_2FUNCSEL		0x00602860
 
 /* Nvidia DAC direct registers (standard VGA palette RAM registers) */
 /* primary head */
@@ -255,9 +257,11 @@ chip->PMC[0x00000140/4]  = chip->EnableIRQ & 0x01;
 #define NVBES_NV10_1DSTREF	0x0000894c
 #define NVBES_NV10_1DSTSIZE	0x00008954
 #define NVBES_NV10_1SRCPTCH	0x0000895c
+/* Nvidia MPEG2 hardware decoder (GeForce4MX only) */
+#define NVBES_DEC_GENCTRL	0x00001588
+
 /*
 	    chip->PMC[0x00008140/4] = 0;
-        chip->PMC[0x00001588/4] = 0;
 */
 //end new.
 

src/add-ons/accelerants/nvidia/Cursor.c

@@ -4,7 +4,7 @@
 
 	Other authors:
 	Mark Watson,
-	Rudolf Cornelissen 4/2003
+	Rudolf Cornelissen 4/2003-8/2003
 */
 
 #define MODULE_BIT 0x20000000
@@ -24,7 +24,9 @@
 
 status_t SET_CURSOR_SHAPE(uint16 width, uint16 height, uint16 hot_x, uint16 hot_y, uint8 *andMask, uint8 *xorMask) 
 {
-	LOG(4,("SET_CURSOR_SHAPE: width %d, height %d\n", width, height));
+	LOG(4,("SET_CURSOR_SHAPE: width %d, height %d, hot_x %d, hot_y %d\n",
+		width, height, hot_x, hot_y));
+
 	if ((width != 16) || (height != 16))
 	{
 		return B_ERROR;
@@ -142,9 +144,11 @@ void MOVE_CURSOR(uint16 x, uint16 y)
 		//move_overlay(hds,vds);
 	}
 
-	/* put cursor in correct physical position */
+	/* put cursor in correct physical position, so stay onscreen (rel. to CRTC) */
-	x -= hds + si->cursor.hot_x;
+	if (x > (hds + si->cursor.hot_x)) x -= (hds + si->cursor.hot_x);
-	y -= vds + si->cursor.hot_y;
+	else x = 0;
+	if (y > (vds + si->cursor.hot_y)) y -= (vds + si->cursor.hot_y);
+	else y = 0;
 
 	/* account for switched CRTC's */
 	if (si->switched_crtcs)	x -= si->dm.timing.h_display;

src/add-ons/accelerants/nvidia/Overlay.c

@@ -429,9 +429,19 @@ status_t GET_OVERLAY_CONSTRAINTS
 		}
 
 		/* GeForce scaling restrictions */
-		oc->h_scale.min = 0.125;
+		switch (si->ps.card_arch)
+		{
+		case NV30A:
+			/* GeForceFX series have a new BES engine... */
+			oc->h_scale.min = 0.5;
+			oc->v_scale.min = 0.5;
+			break;
+		default:
+			oc->h_scale.min = 0.125;
+			oc->v_scale.min = 0.125;
+			break;
+		}
 		oc->h_scale.max = 16384/(float)(ob->width - si->overlay.myBufInfo[offset].slopspace);
-		oc->v_scale.min =  0.125;
 		oc->v_scale.max = 16384/(float)ob->height;
 
 		return B_OK;

src/add-ons/accelerants/nvidia/engine/nv_bes.c

@@ -238,11 +238,25 @@ status_t nv_configure_bes
 		hiscalv = ((((uint32)my_ov.width) << 16) / 16384);
 		LOG(4,("Overlay: horizontal scaling factor too large, clamping at %f\n", (float)65536 / hiscalv));
 	}
-	if (hiscalv > (8 << 16))
+	switch (si->ps.card_arch)
 	{
-		/* (non-inverse) factor too small, set factor to min. valid value */
+	case NV30A:
-		hiscalv = (8 << 16);
+		/* GeForceFX series have a downscaling limit of 0.5 */
-		LOG(4,("Overlay: horizontal scaling factor too small, clamping at %f\n", (float)65536 / hiscalv));
+		if (hiscalv > (2 << 16))
+		{
+			/* (non-inverse) factor too small, set factor to min. valid value */
+			hiscalv = (2 << 16);
+			LOG(4,("Overlay: horizontal scaling factor too small, clamping at %f\n", (float)65536 / hiscalv));
+		}
+		break;
+	default:
+		if (hiscalv > (8 << 16))
+		{
+			/* (non-inverse) factor too small, set factor to min. valid value */
+			hiscalv = (8 << 16);
+			LOG(4,("Overlay: horizontal scaling factor too small, clamping at %f\n", (float)65536 / hiscalv));
+		}
+		break;
 	}
 	/* AND below is required by hardware */
 	hiscalv &= 0x001ffffc;
@@ -338,11 +352,25 @@ status_t nv_configure_bes
 		viscalv = ((((uint32)my_ov.height) << 16) / 16384);
 		LOG(4,("Overlay: vertical scaling factor too large, clamping at %f\n", (float)65536 / viscalv));
 	}
-	if (viscalv > (8 << 16))
+	switch (si->ps.card_arch)
 	{
-		/* (non-inverse) factor too small, set factor to min. valid value */
+	case NV30A:
-		viscalv = (8 << 16);
+		/* GeForceFX series have a downscaling limit of 0.5 */
-		LOG(4,("Overlay: vertical scaling factor too small, clamping at %f\n", (float)65536 / viscalv));
+		if (viscalv > (2 << 16))
+		{
+			/* (non-inverse) factor too small, set factor to min. valid value */
+			viscalv = (2 << 16);
+			LOG(4,("Overlay: vertical scaling factor too small, clamping at %f\n", (float)65536 / viscalv));
+		}
+		break;
+	default:
+		if (viscalv > (8 << 16))
+		{
+			/* (non-inverse) factor too small, set factor to min. valid value */
+			viscalv = (8 << 16);
+			LOG(4,("Overlay: vertical scaling factor too small, clamping at %f\n", (float)65536 / viscalv));
+		}
+		break;
 	}
 	/* AND below is required by hardware */
 	viscalv &= 0x001ffffc;
@@ -430,6 +458,8 @@ status_t nv_configure_bes
 	 *** actually program the registers ***
 	 **************************************/
 
+	/* shut off GeForce4MX MPEG2 decoder */
+	BESW(DEC_GENCTRL, 0x00000000);
 	/* We only use buffer buffer 0: select it. (0x01 = buffer 0, 0x10 = buffer 1) */
 	BESW(NV10_BUFSEL, 0x00000001);  
 	/* setup buffer origin: GeForce uses subpixel precise clipping on left and top! (12.4 values) */

src/add-ons/accelerants/nvidia/engine/nv_general.c

@@ -81,7 +81,7 @@ status_t nv_general_powerup()
 {
 	status_t status;
 
-	LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.04 running.\n"));
+	LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.05 running.\n"));
 
 	/* preset no laptop */
 	si->ps.laptop = false;
@@ -739,7 +739,7 @@ status_t nv_general_bios_to_powergraphics()
 	nv_crtc_cursor_hide();
 
 	/* power-up all nvidia hardware function blocks */
-	/* bit 28: PVIDEO,
+	/* bit 28: OVERLAY ENGINE (BES),
 	 * bit 25: CRTC2, (> NV04A)
 	 * bit 24: CRTC1,
 	 * bit 20: framebuffer,
@@ -750,6 +750,11 @@ status_t nv_general_bios_to_powergraphics()
 	 * bit  0: TVOUT. (> NV04A) */
 	NV_REG32(NV32_PWRUPCTRL) = 0x13111111;
 
+	/* switch overlay engine to head 1 */
+	//fixme: add other function blocks...
+	NV_REG32(NV32_FUNCSEL) |= 0x00001000;
+	NV_REG32(NV32_2FUNCSEL) &= ~0x00001000;
+
 	/* set card to 'enhanced' mode: (only VGA standard registers used for NeoMagic cards) */
 	/* (keep) card enabled, set plain normal memory usage, no old VGA 'tricks' ... */
 //	CRTCW(MODECTL, 0xc3);