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* Reverted last commit - not a good idea to provide untested patches. With the

Browse Source 
patch applied, the card didn't work at all anymore.
* Minor 80-column/white space cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26879 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2008-08-08 15:37:43 +00:00
parent ae9067b364
commit 8c5620e78f
1 changed files with 125 additions and 90 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/kernel/drivers/network/rtl8169/device.c
+74 -39
View File
@@ -16,6 +16,7 @@
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/ */
#include <KernelExport.h> #include <KernelExport.h>
#include <Errors.h> #include <Errors.h>
#include <stdlib.h> #include <stdlib.h>
@@ -280,21 +281,27 @@ init_buf_desc(rtl8169_device *device)
void *rx_buf_virt, *rx_buf_phy; void *rx_buf_virt, *rx_buf_phy;
int i; int i;
device->txBufArea = alloc_mem(&tx_buf_virt, &tx_buf_phy, device->txBufferCount * FRAME_SIZE, 0, "rtl8169 tx buf"); device->txBufArea = alloc_mem(&tx_buf_virt, &tx_buf_phy,
device->rxBufArea = alloc_mem(&rx_buf_virt, &rx_buf_phy, device->rxBufferCount * FRAME_SIZE, 0, "rtl8169 rx buf"); device->txBufferCount * FRAME_SIZE, 0, "rtl8169 tx buf");
device->txDescArea = alloc_mem(&tx_buf_desc_virt, &tx_buf_desc_phy, device->txBufferCount * sizeof(buf_desc), 0, "rtl8169 tx desc"); device->rxBufArea = alloc_mem(&rx_buf_virt, &rx_buf_phy,
device->rxDescArea = alloc_mem(&rx_buf_desc_virt, &rx_buf_desc_phy, device->rxBufferCount * sizeof(buf_desc), 0, "rtl8169 rx desc"); device->rxBufferCount * FRAME_SIZE, 0, "rtl8169 rx buf");
if (device->txBufArea < B_OK || device->rxBufArea < B_OK || device->txDescArea < B_OK || device->rxDescArea < B_OK) device->txDescArea = alloc_mem(&tx_buf_desc_virt, &tx_buf_desc_phy,
device->txBufferCount * sizeof(buf_desc), 0, "rtl8169 tx desc");
device->rxDescArea = alloc_mem(&rx_buf_desc_virt, &rx_buf_desc_phy,
device->rxBufferCount * sizeof(buf_desc), 0, "rtl8169 rx desc");
if (device->txBufArea < B_OK || device->rxBufArea < B_OK
|| device->txDescArea < B_OK || device->rxDescArea < B_OK)
return B_NO_MEMORY; return B_NO_MEMORY;
device->txDesc = (buf_desc *) tx_buf_desc_virt; device->txDesc = (buf_desc *)tx_buf_desc_virt;
device->rxDesc = (buf_desc *) rx_buf_desc_virt; device->rxDesc = (buf_desc *)rx_buf_desc_virt;
// setup transmit descriptors // setup transmit descriptors
for (i = 0; i < device->txBufferCount; i++) { for (i = 0; i < device->txBufferCount; i++) {
device->txBuf[i] = (char *)tx_buf_virt + (i * FRAME_SIZE); device->txBuf[i] = (char *)tx_buf_virt + (i * FRAME_SIZE);
device->txDesc[i].stat_len = TX_DESC_FS | TX_DESC_LS; device->txDesc[i].stat_len = TX_DESC_FS | TX_DESC_LS;
device->txDesc[i].buf_low = (uint32)((char *)tx_buf_phy + (i * FRAME_SIZE)); device->txDesc[i].buf_low
= (uint32)((char *)tx_buf_phy + (i * FRAME_SIZE));
device->txDesc[i].buf_high = 0; device->txDesc[i].buf_high = 0;
} }
device->txDesc[i - 1].stat_len |= TX_DESC_EOR; device->txDesc[i - 1].stat_len |= TX_DESC_EOR;
@@ -303,7 +310,8 @@ init_buf_desc(rtl8169_device *device)
for (i = 0; i < device->rxBufferCount; i++) { for (i = 0; i < device->rxBufferCount; i++) {
device->rxBuf[i] = (char *)rx_buf_virt + (i * FRAME_SIZE); device->rxBuf[i] = (char *)rx_buf_virt + (i * FRAME_SIZE);
device->rxDesc[i].stat_len = RX_DESC_OWN | FRAME_SIZE; device->rxDesc[i].stat_len = RX_DESC_OWN | FRAME_SIZE;
device->rxDesc[i].buf_low = (uint32)((char *)rx_buf_phy + (i * FRAME_SIZE)); device->rxDesc[i].buf_low
= (uint32)((char *)rx_buf_phy + (i * FRAME_SIZE));
device->rxDesc[i].buf_high = 0; device->rxDesc[i].buf_high = 0;
} }
device->rxDesc[i - 1].stat_len |= RX_DESC_EOR; device->rxDesc[i - 1].stat_len |= RX_DESC_EOR;
@@ -483,16 +491,21 @@ rtl8169_open(const char *name, uint32 flags, void** cookie)
set_sem_owner(device->txFreeSem, B_SYSTEM_TEAM); set_sem_owner(device->txFreeSem, B_SYSTEM_TEAM);
// enable busmaster and memory mapped access, disable io port access // enable busmaster and memory mapped access, disable io port access
val = gPci->read_pci_config(device->pciInfo->bus, device->pciInfo->device, device->pciInfo->function, PCI_command, 2); val = gPci->read_pci_config(device->pciInfo->bus, device->pciInfo->device,
device->pciInfo->function, PCI_command, 2);
val = PCI_PCICMD_BME | PCI_PCICMD_MSE | (val & ~PCI_PCICMD_IOS); val = PCI_PCICMD_BME | PCI_PCICMD_MSE | (val & ~PCI_PCICMD_IOS);
gPci->write_pci_config(device->pciInfo->bus, device->pciInfo->device, device->pciInfo->function, PCI_command, 2, val); gPci->write_pci_config(device->pciInfo->bus, device->pciInfo->device,
device->pciInfo->function, PCI_command, 2, val);
// adjust PCI latency timer // adjust PCI latency timer
TRACE("changing PCI latency to 0x40\n"); TRACE("changing PCI latency to 0x40\n");
gPci->write_pci_config(device->pciInfo->bus, device->pciInfo->device, device->pciInfo->function, PCI_latency, 1, 0x40); gPci->write_pci_config(device->pciInfo->bus, device->pciInfo->device,
device->pciInfo->function, PCI_latency, 1, 0x40);
// get IRQ // get IRQ
device->irq = gPci->read_pci_config(device->pciInfo->bus, device->pciInfo->device, device->pciInfo->function, PCI_interrupt_line, 1); device->irq = gPci->read_pci_config(device->pciInfo->bus,
device->pciInfo->device, device->pciInfo->function, PCI_interrupt_line,
1);
if (device->irq == 0 || device->irq == 0xff) { if (device->irq == 0 || device->irq == 0xff) {
ERROR("no IRQ assigned\n"); ERROR("no IRQ assigned\n");
goto err; goto err;
@@ -501,10 +514,12 @@ rtl8169_open(const char *name, uint32 flags, void** cookie)
TRACE("IRQ %d\n", device->irq); TRACE("IRQ %d\n", device->irq);
// map registers into memory // map registers into memory
val = gPci->read_pci_config(device->pciInfo->bus, device->pciInfo->device, device->pciInfo->function, 0x18, 4); val = gPci->read_pci_config(device->pciInfo->bus, device->pciInfo->device,
device->pciInfo->function, 0x14, 4);
val &= PCI_address_memory_32_mask; val &= PCI_address_memory_32_mask;
TRACE("hardware register address %p\n", (void *) val); TRACE("hardware register address %p\n", (void *) val);
device->regArea = map_mem(&device->regAddr, (void *)val, 256, 0, "rtl8169 register"); device->regArea = map_mem(&device->regAddr, (void *)val, 256, 0,
"rtl8169 register");
if (device->regArea < B_OK) { if (device->regArea < B_OK) {
ERROR("can't map hardware registers\n"); ERROR("can't map hardware registers\n");
goto err; goto err;
@@ -527,7 +542,8 @@ rtl8169_open(const char *name, uint32 flags, void** cookie)
TRACE("reset done\n"); TRACE("reset done\n");
// get MAC hardware version // get MAC hardware version
device->mac_version = ((read32(REG_TX_CONFIG) & 0x7c000000) >> 25) | ((read32(REG_TX_CONFIG) & 0x00800000) >> 23); device->mac_version = ((read32(REG_TX_CONFIG) & 0x7c000000) >> 25)
| ((read32(REG_TX_CONFIG) & 0x00800000) >> 23);
TRACE("8169 Mac Version %d\n", device->mac_version); TRACE("8169 Mac Version %d\n", device->mac_version);
if (device->mac_version > 0) { // this is a RTL8169s single chip if (device->mac_version > 0) { // this is a RTL8169s single chip
// get PHY hardware version // get PHY hardware version
@@ -544,7 +560,9 @@ rtl8169_open(const char *name, uint32 flags, void** cookie)
TRACE("Setting MAC Reg C+CR 0x82h = 0x01h\n"); TRACE("Setting MAC Reg C+CR 0x82h = 0x01h\n");
write8(0x82, 0x01); // don't know what this does write8(0x82, 0x01); // don't know what this does
TRACE("Setting PHY Reg 0x0bh = 0x00h\n"); TRACE("Setting PHY Reg 0x0bh = 0x00h\n");
write_phy_reg(device, 0x0b, 0x0000); // 0xb is a reserved (vendor specific register), don't know what this does write_phy_reg(device, 0x0b, 0x0000);
// 0xb is a reserved (vendor specific register), don't know what
// this does
} }
// configure PHY // configure PHY
@@ -562,7 +580,8 @@ rtl8169_open(const char *name, uint32 flags, void** cookie)
device->macaddr[3], device->macaddr[4], device->macaddr[5]); device->macaddr[3], device->macaddr[4], device->macaddr[5]);
// setup interrupt handler // setup interrupt handler
if (install_io_interrupt_handler(device->irq, rtl8169_int, device, 0) < B_OK) { if (install_io_interrupt_handler(device->irq, rtl8169_int, device, 0)
< B_OK) {
ERROR("can't install interrupt handler\n"); ERROR("can't install interrupt handler\n");
goto err; goto err;
} }
@@ -577,16 +596,19 @@ rtl8169_open(const char *name, uint32 flags, void** cookie)
device->intRxCurrentCount = 0; device->intRxCurrentCount = 0;
device->intTxCurrentCount = 0; device->intTxCurrentCount = 0;
device->intTimerCurrentCount = 0; device->intTimerCurrentCount = 0;
device->timer = create_timer(print_debug_info, device, 1000000, B_PERIODIC_TIMER); device->timer = create_timer(print_debug_info, device, 1000000,
B_PERIODIC_TIMER);
#endif // PROFILING #endif // PROFILING
write16(0xe0, read16(0xe0)); // write CR+ command write16(0xe0, read16(0xe0)); // write CR+ command
write16(0xe0, read16(0xe0) | 0x0003); // don't know what this does, BSD says "enable C+ Tx/Rx" write16(0xe0, read16(0xe0) | 0x0003);
// don't know what this does, BSD says "enable C+ Tx/Rx"
if (device->mac_version == 1) { if (device->mac_version == 1) {
TRACE("Setting Reg C+CR bit 3 and bit 14 to 1\n"); TRACE("Setting Reg C+CR bit 3 and bit 14 to 1\n");
// bit 3 is PCI multiple read/write enable (max Tx/Rx DMA burst size setting is no longer valid then) // bit 3 is PCI multiple read/write enable (max Tx/Rx DMA burst size
// setting is no longer valid then)
// bit 14 ??? (need more docs) // bit 14 ??? (need more docs)
write16(0xe0, read16(0xe0) | 0x4008); write16(0xe0, read16(0xe0) | 0x4008);
} }
@@ -615,20 +637,23 @@ rtl8169_open(const char *name, uint32 flags, void** cookie)
// 1024 byte FIFO treshold, 1024 DMA burst // 1024 byte FIFO treshold, 1024 DMA burst
write32(REG_RX_CONFIG, (read32(REG_RX_CONFIG) & RX_CONFIG_MASK) write32(REG_RX_CONFIG, (read32(REG_RX_CONFIG) & RX_CONFIG_MASK)
| (0x6 << RC_CONFIG_RXFTH_Shift) | (0x6 << RC_CONFIG_MAXDMA_Shift) | (0x6 << RC_CONFIG_RXFTH_Shift) | (0x6 << RC_CONFIG_MAXDMA_Shift)
| RX_CONFIG_AcceptBroad | RX_CONFIG_AcceptMulti | RX_CONFIG_AcceptMyPhys); | RX_CONFIG_AcceptBroad | RX_CONFIG_AcceptMulti
| RX_CONFIG_AcceptMyPhys);
write32(0x8, 0); // multicast filter write32(0x8, 0); // multicast filter
write32(0xc, 0); // multicast filter write32(0xc, 0); // multicast filter
// setup transmit config, can only be done when transmitter is enabled! // setup transmit config, can only be done when transmitter is enabled!
// append CRC, 1024 DMA burst // append CRC, 1024 DMA burst
write32(REG_TX_CONFIG, (read32(REG_TX_CONFIG) & ~(0x10000 | (1 << 8))) | (0x6 << 8)); write32(REG_TX_CONFIG, (read32(REG_TX_CONFIG) & ~(0x10000 | (1 << 8)))
| (0x6 << 8));
// clear pending interrupt status // clear pending interrupt status
write16(REG_INT_STAT, 0xffff); write16(REG_INT_STAT, 0xffff);
// enable used interrupts // enable used interrupts
write16(REG_INT_MASK, INT_FOVW | INT_PUN | INT_TER | INT_TOK | INT_RER | INT_ROK); write16(REG_INT_MASK, INT_FOVW | INT_PUN | INT_TER | INT_TOK | INT_RER
| INT_ROK);
return B_OK; return B_OK;
@@ -695,7 +720,7 @@ rtl8169_free(void* cookie)
status_t status_t
rtl8169_read(void* cookie, off_t position, void *buf, size_t* num_bytes) rtl8169_read(void* cookie, off_t position, void *buf, size_t* numBytes)
{ {
rtl8169_device *device = (rtl8169_device *)cookie; rtl8169_device *device = (rtl8169_device *)cookie;
cpu_status cpu; cpu_status cpu;
@@ -708,14 +733,17 @@ rtl8169_read(void* cookie, off_t position, void *buf, size_t* num_bytes)
return B_INTERRUPTED; return B_INTERRUPTED;
} }
retry: retry:
stat = acquire_sem_etc(device->rxReadySem, 1, B_CAN_INTERRUPT | (device->nonblocking ? B_TIMEOUT : 0), 0); stat = acquire_sem_etc(device->rxReadySem, 1,
B_CAN_INTERRUPT | (device->nonblocking ? B_TIMEOUT : 0), 0);
if (device->closed) { if (device->closed) {
// TRACE("rtl8169_read() interrupted 2\n"); // net_server will crash if we print this (race condition in net_server?) // TRACE("rtl8169_read() interrupted 2\n");
// net_server will crash if we print this
// (race condition in net_server?)
return B_INTERRUPTED; return B_INTERRUPTED;
} }
if (stat == B_WOULD_BLOCK) { if (stat == B_WOULD_BLOCK) {
TRACE("rtl8169_read() would block (OK 0 bytes)\n"); TRACE("rtl8169_read() would block (OK 0 bytes)\n");
*num_bytes = 0; *numBytes = 0;
return B_OK; return B_OK;
} }
if (stat != B_OK) { if (stat != B_OK) {
@@ -732,16 +760,17 @@ retry:
len -= 4; // remove CRC that Realtek always appends len -= 4; // remove CRC that Realtek always appends
if (len < 0) if (len < 0)
len = 0; len = 0;
if (len > (int)*num_bytes) if (len > (int)*numBytes)
len = *num_bytes; len = *numBytes;
memcpy(buf, device->rxBuf[device->rxNextIndex], len); memcpy(buf, device->rxBuf[device->rxNextIndex], len);
*num_bytes = len; *numBytes = len;
cpu = disable_interrupts(); cpu = disable_interrupts();
acquire_spinlock(&device->rxSpinlock); acquire_spinlock(&device->rxSpinlock);
device->rxDesc[device->rxNextIndex].stat_len = RX_DESC_OWN | FRAME_SIZE | (device->rxDesc[device->rxNextIndex].stat_len & RX_DESC_EOR); device->rxDesc[device->rxNextIndex].stat_len = RX_DESC_OWN | FRAME_SIZE
| (device->rxDesc[device->rxNextIndex].stat_len & RX_DESC_EOR);
device->rxFree++; device->rxFree++;
release_spinlock(&device->rxSpinlock); release_spinlock(&device->rxSpinlock);
@@ -755,7 +784,8 @@ retry:
status_t status_t
rtl8169_write(void* cookie, off_t position, const void* buffer, size_t* num_bytes) rtl8169_write(void* cookie, off_t position, const void* buffer,
size_t* numBytes)
{ {
rtl8169_device *device = (rtl8169_device *)cookie; rtl8169_device *device = (rtl8169_device *)cookie;
cpu_status cpu; cpu_status cpu;
@@ -764,7 +794,7 @@ rtl8169_write(void* cookie, off_t position, const void* buffer, size_t* num_byte
TRACE("rtl8169_write() enter\n"); TRACE("rtl8169_write() enter\n");
len = *num_bytes; len = *numBytes;
if (len > FRAME_SIZE) { if (len > FRAME_SIZE) {
TRACE("rtl8169_write() buffer too large\n"); TRACE("rtl8169_write() buffer too large\n");
return B_ERROR; return B_ERROR;
@@ -775,14 +805,15 @@ rtl8169_write(void* cookie, off_t position, const void* buffer, size_t* num_byte
return B_INTERRUPTED; return B_INTERRUPTED;
} }
retry: retry:
stat = acquire_sem_etc(device->txFreeSem, 1, B_CAN_INTERRUPT | B_TIMEOUT, device->nonblocking ? 0 : TX_TIMEOUT); stat = acquire_sem_etc(device->txFreeSem, 1, B_CAN_INTERRUPT | B_TIMEOUT,
device->nonblocking ? 0 : TX_TIMEOUT);
if (device->closed) { if (device->closed) {
TRACE("rtl8169_write() interrupted 2\n"); TRACE("rtl8169_write() interrupted 2\n");
return B_INTERRUPTED; return B_INTERRUPTED;
} }
if (stat == B_WOULD_BLOCK) { if (stat == B_WOULD_BLOCK) {
TRACE("rtl8169_write() would block (OK 0 bytes)\n"); TRACE("rtl8169_write() would block (OK 0 bytes)\n");
*num_bytes = 0; *numBytes = 0;
return B_OK; return B_OK;
} }
if (stat == B_TIMED_OUT) { if (stat == B_TIMED_OUT) {
@@ -805,7 +836,9 @@ retry:
acquire_spinlock(&device->txSpinlock); acquire_spinlock(&device->txSpinlock);
device->txUsed++; device->txUsed++;
device->txDesc[device->txNextIndex].stat_len = (device->txDesc[device->txNextIndex].stat_len & RX_DESC_EOR) | TX_DESC_OWN | TX_DESC_FS | TX_DESC_LS | len; device->txDesc[device->txNextIndex].stat_len
= (device->txDesc[device->txNextIndex].stat_len & RX_DESC_EOR)
| TX_DESC_OWN | TX_DESC_FS | TX_DESC_LS | len;
release_spinlock(&device->txSpinlock); release_spinlock(&device->txSpinlock);
restore_interrupts(cpu); restore_interrupts(cpu);
@@ -860,12 +893,14 @@ rtl8169_control(void *cookie, uint32 op, void *arg, size_t len)
case ETHER_SETPROMISC: case ETHER_SETPROMISC:
if (*(int32 *)arg) { if (*(int32 *)arg) {
TRACE("promiscuous mode on\n"); TRACE("promiscuous mode on\n");
write32(REG_RX_CONFIG, read32(REG_RX_CONFIG) | RX_CONFIG_AcceptAllPhys); write32(REG_RX_CONFIG, read32(REG_RX_CONFIG)
| RX_CONFIG_AcceptAllPhys);
write32(0x8, 0xffffffff); // multicast filter write32(0x8, 0xffffffff); // multicast filter
write32(0xc, 0xffffffff); // multicast filter write32(0xc, 0xffffffff); // multicast filter
} else { } else {
TRACE("promiscuous mode off\n"); TRACE("promiscuous mode off\n");
write32(REG_RX_CONFIG, read32(REG_RX_CONFIG) & ~RX_CONFIG_AcceptAllPhys); write32(REG_RX_CONFIG, read32(REG_RX_CONFIG)
& ~RX_CONFIG_AcceptAllPhys);
write32(0x8, 0); // multicast filter write32(0x8, 0); // multicast filter
write32(0xc, 0); // multicast filter write32(0xc, 0); // multicast filter
} }