added explicit clearing of the hashtable engine RAM. This sneaky thing won't get to me again: it keeps it's contents even over power-outages of upto say 15 seconds!!

git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10932 a95241bf-73f2-0310-859d-f6bbb57e9c96

src/add-ons/accelerants/nvidia/engine/nv_acc.c

@@ -156,6 +156,19 @@ status_t nv_acc_init()
 	ACCW(PF_CACHES, 0x00000001);
 
 	/*** PRAMIN ***/
+	/* first clear the entire RAMHT (hash-table) space to a defined state. It turns
+	 * out at least NV11 will keep the previously programmed handles over resets and
+	 * power-outages upto about 15 seconds!! Faulty entries might well hang the
+	 * engine (confirmed on NV11).
+	 * Note:
+	 * this behaviour is not very strange: even very old DRAM chips are known to be
+	 * able to do this, even though you should refresh them every few milliseconds or
+	 * so. (Large memory cell capacitors, though different cells vary a lot in their
+	 * capacity.)
+	 * Of course data valitidy is not certain by a long shot over this large
+	 * amount of time.. */
+	for(cnt = 0; cnt < 0x0400; cnt++)
+		NV_REG32(NVACC_HT_HANDL_00 + (cnt << 2)) = 0;
 	/* RAMHT space (hash-table) SETUP FIFO HANDLES */
 	/* note:
 	 * 'instance' tells you where the engine command is stored in 'PR_CTXx_x' sets

src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c

@@ -109,6 +109,19 @@ status_t nv_acc_init_dma()
 	}
 
 	/*** PRAMIN ***/
+	/* first clear the entire RAMHT (hash-table) space to a defined state. It turns
+	 * out at least NV11 will keep the previously programmed handles over resets and
+	 * power-outages upto about 15 seconds!! Faulty entries might well hang the
+	 * engine (confirmed on NV11).
+	 * Note:
+	 * this behaviour is not very strange: even very old DRAM chips are known to be
+	 * able to do this, even though you should refresh them every few milliseconds or
+	 * so. (Large memory cell capacitors, though different cells vary a lot in their
+	 * capacity.)
+	 * Of course data valitidy is not certain by a long shot over this large
+	 * amount of time.. */
+	for(cnt = 0; cnt < 0x0400; cnt++)
+		NV_REG32(NVACC_HT_HANDL_00 + (cnt << 2)) = 0;
 	/* RAMHT (hash-table) space SETUP FIFO HANDLES */
 	/* note:
 	 * 'instance' tells you where the engine command is stored in 'PR_CTXx_x' sets