* renamed smp_boot.c to smp.cpp
* there is now a "Disable Hyper-Threading" safemode in the boot loader * the SMP & HT menu items are now added in smp.cpp - and are only added if the system supports one of them. * more cleanup to smp_apic.h * removed cpuid() from the boot loader's support.S - instead, it will now use the one from the kernel. * added a very weak HT detection: if the MP config only listed one CPU, and this CPU supports HT, we enable the other logic processor manually - as this currently doesn't work, it's disabled, though. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14536 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
@@ -8,70 +8,83 @@
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#ifndef _KERNEL_ARCH_x86_SMP_APIC_H
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#define _KERNEL_ARCH_x86_SMP_APIC_H
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#define MP_FLT_SIGNATURE '_PM_'
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#define MP_CTH_SIGNATURE 'PCMP'
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#define MP_FLOATING_SIGNATURE '_PM_'
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#define MP_CONFIG_TABLE_SIGNATURE 'PCMP'
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#define APIC_ENABLE 0x100
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#define APIC_FOCUS (~(1 << 9))
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#define APIC_SIV (0xff)
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// offsets to APIC register
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#define APIC_ID 0x020
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#define APIC_VERSION 0x030
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#define APIC_TPRI 0x080
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#define APIC_EOI 0x0b0
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#define APIC_LDR 0x0d0
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#define APIC_SIVR 0x0f0
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#define APIC_ESR 0x280
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#define APIC_ICR1 0x300
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#define APIC_ICR2 0x310
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#define APIC_LVTT 0x320
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#define APIC_LINT0 0x350
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#define APIC_LINT1 0x360
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#define APIC_LVT3 0x370
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#define APIC_ICRT 0x380
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#define APIC_CCRT 0x390
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#define APIC_TDCR 0x3e0
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#define APIC_ID 0x020
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#define APIC_VERSION 0x030
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#define APIC_TASK_PRIORITY 0x080
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#define APIC_ARBITRATION_PRIORITY 0x090
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#define APIC_PROCESSOR_PRIORITY 0x0a0
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#define APIC_EOI 0x0b0
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#define APIC_LOGICAL_DEST 0x0d0
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#define APIC_DEST_FORMAT 0x0e0
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#define APIC_SPURIOUS_INTR_VECTOR 0x0f0
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#define APIC_ERROR_STATUS 0x280
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#define APIC_INTR_COMMAND_1 0x300 // bits 0-31
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#define APIC_INTR_COMMAND_2 0x310 // bits 32-63
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#define APIC_LVT_TIMER 0x320
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#define APIC_LVT_THERMAL_SENSOR 0x330
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#define APIC_LVT_PERFMON_COUNTERS 0x340
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#define APIC_LVT_LINT0 0x350
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#define APIC_LVT_LINT1 0x360
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#define APIC_LVT_ERROR 0x370
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#define APIC_INITIAL_TIMER_COUNT 0x380
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#define APIC_CURRENT_TIMER_COUNT 0x390
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#define APIC_TIMER_DIVIDE_CONFIG 0x3e0
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/* ICR defines */
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#define APIC_ICR1_WRITE_MASK 0xfff3f000
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#define APIC_ICR1_READ_MASK 0xfff32000
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#define APIC_ICR2_MASK 0x00ffffff
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/* standard APIC interrupt defines */
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#define APIC_DELIVERY_MODE_FIXED 0
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#define APIC_DELIVERY_MODE_LOWESTPRI (1 << 8) // ICR1 only
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#define APIC_DELIVERY_MODE_SMI (2 << 8)
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#define APIC_DELIVERY_MODE_NMI (4 << 8)
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#define APIC_DELIVERY_MODE_INIT (5 << 8)
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#define APIC_DELIVERY_MODE_STARTUP (6 << 8) // ICR1 only
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#define APIC_DELIVERY_MODE_ExtINT (7 << 8) // LINT0/1 only
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#define APIC_ICR1_DELIVERY_MODE_FIXED 0
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#define APIC_ICR1_DELIVERY_MODE_LOWESTPRI (1 << 8)
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#define APIC_ICR1_DELIVERY_MODE_INIT (5 << 8)
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#define APIC_ICR1_DELIVERY_MODE_STARTUP (6 << 8)
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#define APIC_DELIVERY_STATUS (1 << 12)
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#define APIC_TRIGGER_MODE_LEVEL (1 << 15)
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#define APIC_ICR1_DEST_MODE_PHYSICAL 0
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#define APIC_ICR1_DEST_MODE_LOGICAL (1 << 11)
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/* Interrupt Command defines */
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#define APIC_INTR_COMMAND_1_MASK 0xfff3f000
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#define APIC_INTR_COMMAND_2_MASK 0x00ffffff
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#define APIC_ICR1_ASSERT (1 << 13)
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#define APIC_ICR1_TRIGGER_MODE_LEVEL (1 << 14)
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#define APIC_ICR1_DELIVERY_STATUS (1 << 12)
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#define APIC_INTR_COMMAND_1_DEST_MODE_PHYSICAL 0
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#define APIC_INTR_COMMAND_1_DEST_MODE_LOGICAL (1 << 11)
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#define APIC_ICR1_DEST_FIELD 0
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#define APIC_ICR1_DEST_SELF (1 << 18)
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#define APIC_ICR1_DEST_ALL (2 << 18)
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#define APIC_ICR1_DEST_ALL_BUT_SELF (3 << 18)
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#define APIC_INTR_COMMAND_1_ASSERT (1 << 14)
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/* other defines */
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#define APIC_INTR_COMMAND_1_DEST_FIELD 0
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#define APIC_INTR_COMMAND_1_DEST_SELF (1 << 18)
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#define APIC_INTR_COMMAND_1_DEST_ALL (2 << 18)
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#define APIC_INTR_COMMAND_1_DEST_ALL_BUT_SELF (3 << 18)
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#define APIC_TDCR_2 0x00
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#define APIC_TDCR_4 0x01
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#define APIC_TDCR_8 0x02
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#define APIC_TDCR_16 0x03
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#define APIC_TDCR_32 0x08
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#define APIC_TDCR_64 0x09
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#define APIC_TDCR_128 0x0a
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#define APIC_TDCR_1 0x0b
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/* Local Vector Table defines */
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#define APIC_LVT_MASKED (1 << 16)
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#define APIC_LVTT_MASK 0x000310ff
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#define APIC_LVTT_VECTOR 0x000000ff
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#define APIC_LVTT_DS 0x00001000
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#define APIC_LVTT_M 0x00010000
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#define APIC_LVTT_TM 0x00020000
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// timer defines
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#define APIC_LVT_TIMER_MASK 0xfffcef00
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// LINT0/1 defines
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#define APIC_LVT_LINT_MASK 0xfffe0800
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#define APIC_LVT_LINT_INPUT_POLARITY (1 << 13)
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// Timer Divide Config Divisors
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#define APIC_TIMER_DIVIDE_CONFIG_1 0x0b
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#define APIC_TIMER_DIVIDE_CONFIG_2 0x00
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#define APIC_TIMER_DIVIDE_CONFIG_4 0x01
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#define APIC_TIMER_DIVIDE_CONFIG_8 0x02
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#define APIC_TIMER_DIVIDE_CONFIG_16 0x03
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#define APIC_TIMER_DIVIDE_CONFIG_32 0x08
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#define APIC_TIMER_DIVIDE_CONFIG_64 0x09
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#define APIC_TIMER_DIVIDE_CONFIG_128 0x0a
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/*
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#define APIC_LVT_DM 0x00000700
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#define APIC_LVT_DM_ExtINT 0x00000700
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#define APIC_LVT_DM_NMI 0x00000400
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@@ -87,10 +100,6 @@
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#define APIC_SVR_SWEN 0x00000100
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#define APIC_SVR_FOCUS 0x00000200
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#define APIC_DEST_STARTUP 0x00600
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#define LOPRIO_LEVEL 0x00000010
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#define IOAPIC_ID 0x0
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#define IOAPIC_VERSION 0x1
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#define IOAPIC_ARB 0x2
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@@ -101,12 +110,7 @@
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#define IPI_INV_PTE 0x42
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#define IPI_INV_RESCHED 0x43
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#define IPI_STOP 0x44
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#define MP_EXT_PE 0
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#define MP_EXT_BUS 1
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#define MP_EXT_IO_APIC 2
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#define MP_EXT_IO_INT 3
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#define MP_EXT_LOCAL_INT 4
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*/
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struct mp_config_table {
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uint32 signature; /* "PCMP" */
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@@ -134,6 +138,15 @@ struct mp_floating_struct {
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uint8 mp_feature_3, mp_feature_4, mp_feature_5; /* reserved */
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};
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/* base config entry types */
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enum {
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MP_BASE_PROCESSOR = 0,
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MP_BASE_BUS,
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MP_BASE_IO_APIC,
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MP_BASE_IO_INTR,
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MP_BASE_LOCAL_INTR,
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};
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struct mp_base_processor {
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uint8 type;
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uint8 apic_id;
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@@ -171,10 +184,10 @@ struct mp_base_interrupt {
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};
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enum {
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MP_INT_TYPE_INT = 0,
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MP_INT_TYPE_NMI,
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MP_INT_TYPE_SMI,
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MP_INT_TYPE_ExtINT,
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MP_INTR_TYPE_INT = 0,
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MP_INTR_TYPE_NMI,
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MP_INTR_TYPE_SMI,
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MP_INTR_TYPE_ExtINT,
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};
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#endif /* _KERNEL_ARCH_x86_SMP_APIC_H */
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@@ -14,7 +14,8 @@
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#define B_SAFEMODE_DISABLE_USER_ADD_ONS "disableuseraddons"
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#define B_SAFEMODE_DISABLE_IDE_DMA "disableidedma"
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#define B_SAFEMODE_DISABLE_SMP "disablesmp"
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#define B_SAFEMODE_DISABLE_SMP "disable_smp"
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#define B_SAFEMODE_DISABLE_HYPER_THREADING "disable_hyperthreading"
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#ifdef __cplusplus
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