diff --git a/src/add-ons/accelerants/vesa/mode.cpp b/src/add-ons/accelerants/vesa/mode.cpp
index 9e052fca4d..9c96c22b1e 100644
--- a/src/add-ons/accelerants/vesa/mode.cpp
+++ b/src/add-ons/accelerants/vesa/mode.cpp
@@ -54,7 +54,8 @@ is_mode_supported(display_mode* mode)
 {
 	vesa_mode* modes = gInfo->vesa_modes;
 
-	if (gInfo->shared_info->bios_type == kIntelBiosType) {
+	bios_type_enum type = gInfo->shared_info->bios_type;
+	if (type == kIntelBiosType || type == kAtomBiosType1 || type == kAtomBiosType2) {
 		// We know how to patch the BIOS, so we can set any mode we want
 		return true;
 	}
@@ -157,7 +158,8 @@ vesa_propose_display_mode(display_mode* target, const display_mode* low,
 		return B_OK;
 	}
 
-	if (gInfo->shared_info->bios_type == kIntelBiosType) {
+	bios_type_enum type = gInfo->shared_info->bios_type;
+	if (type == kIntelBiosType || type == kAtomBiosType1 || type == kAtomBiosType2) {
 		// The driver says it knows the BIOS type, and therefore how to patch it to apply custom
 		// modes. However, it only knows how to do so for 32bit modes.
 		// TODO: for nVidia there is actually an hardcoded list of possible modes (because no one
diff --git a/src/add-ons/kernel/drivers/graphics/vesa/vesa.cpp b/src/add-ons/kernel/drivers/graphics/vesa/vesa.cpp
index 10a882ce05..f7eaea14da 100644
--- a/src/add-ons/kernel/drivers/graphics/vesa/vesa.cpp
+++ b/src/add-ons/kernel/drivers/graphics/vesa/vesa.cpp
@@ -322,13 +322,14 @@ vbe_identify_bios(bios_state* state, vesa_shared_info* sharedInfo)
 		ATOM_ANALOG_TV_INFO* standardVesaTable = (ATOM_ANALOG_TV_INFO*)(bios
 			+ masterDataTable->ListOfDataTables.StandardVESA_Timing);
 		dprintf(DEVICE_NAME ": std_vesa: %p", standardVesaTable);
-		if (standardVesaTable->aModeTimings == NULL) {
-			dprintf(DEVICE_NAME ": unable to locate the mode table\n");
-		} else {
+		sharedInfo->mode_table_offset = (uint8*)&standardVesaTable->aModeTimings - bios;
+
+		size_t tableSize = standardVesaTable->sHeader.usStructureSize 
+			- sizeof(ATOM_COMMON_TABLE_HEADER);
+		if (tableSize % sizeof(ATOM_MODE_TIMING) == 0)
+			sharedInfo->bios_type = kAtomBiosType2;
+		else
 			sharedInfo->bios_type = kAtomBiosType1;
-			// TODO detect kAtomBiosType2
-			// TODO set sharedInfo->mode_table_offset
-		}
 	} else if (memmem(bios, 512, "NVID", 4) != NULL) {
 		dprintf(DEVICE_NAME ": detected nVidia BIOS\n");
 
@@ -610,7 +611,7 @@ vbe_patch_intel_bios(bios_state* state, display_mode& mode)
 		if (bios == NULL)
 			break;
 		memcpy(bios, &timing, sizeof(timing));
-		bios++; // Skip one byte so the next memmem finds another occurence
+		bios += sizeof(knownMode);
 		replacementCount++;
 	}
 
@@ -623,6 +624,210 @@ vbe_patch_intel_bios(bios_state* state, display_mode& mode)
 }
 
 
+status_t
+vbe_patch_nvidia_bios(bios_state* state, display_mode& mode)
+{
+	struct nvidia_mode {
+		uint32 width;
+		uint32 height;
+		uint8 patch0[17];
+		uint8 patch1[9];
+		uint8 patch2[13];
+		uint8 patch3[5];
+	};
+
+	static const nvidia_mode allowedModes[] = {
+		{1280,  720, {0x16, 0xCB, 0x9F, 0x9F, 0x8F, 0xA7, 0x17, 0xEA, 0xD2, 0xCF, 0xCF, 0xEB, 0x47,
+				0xE0, 0xC0, 0x00, 0x01},
+			{0x00, 0x05, 0xD0, 0x02, 0xA0, 0x2C, 0x10, 0x07, 0x05},
+			{0x7B, 0x01, 0x03, 0x7B, 0x01, 0x08, 0x01, 0x20, 0x80, 0x02, 0xFF, 0xFF, 0x20},
+			{0x00, 0x05, 0xBA, 0xD0, 0x02}},
+		{1280,  800, {0x12, 0xCD, 0x9F, 0x9F, 0x91, 0xA9, 0x1A, 0x3A, 0x21, 0x1F, 0x1F, 0x3B, 0x44,
+				0xFE, 0xC0, 0x00, 0x01},
+			{0x00, 0x05, 0x20, 0x03, 0xA0, 0x32, 0x10, 0x23, 0x05},
+			{0x61, 0x01, 0x03, 0x61, 0x01, 0x08, 0x01, 0x20, 0x80, 0x02, 0xFF, 0xFF, 0x20},
+			{0x00, 0x05, 0xBA, 0x20, 0x03}},
+		{1360,  768, {0x16, 0xB9, 0xA9, 0x9F, 0x8F, 0xB2, 0x16, 0x14, 0x01, 0xFF, 0xCF, 0xEB, 0x46,
+				0xEA, 0xC0, 0x00, 0x01},
+			{0x50, 0x05, 0x00, 0x03, 0xAA, 0x2F, 0x10, 0x07, 0x05},
+			{0x4D, 0x01, 0x03, 0x4D, 0x01, 0x08, 0x01, 0x20, 0xA8, 0x02, 0xFF, 0xFF, 0x20},
+			{0x50, 0x05, 0xBA, 0x00, 0x03}},
+		{1400, 1050, {0x12, 0xE6, 0xAE, 0xAE, 0x8A, 0xBB, 0x8E, 0x3D, 0x1B, 0x19, 0x19, 0x3E, 0x0E,
+				0x00, 0xC0, 0x24, 0x12},
+			{0x78, 0x05, 0x1A, 0x04, 0xAF, 0x4A, 0x0E, 0x21, 0x05},
+			{0x49, 0x01, 0x03, 0x49, 0x01, 0x08, 0x01, 0x20, 0xBC, 0x02, 0xFF, 0xFF, 0x20},
+			{0x78, 0x05, 0xBA, 0x1A, 0x04}},
+		{1440,  900, {0x12, 0xE9, 0xB3, 0xB3, 0x8D, 0xBF, 0x92, 0xA3, 0x85, 0x83, 0x83, 0xA4, 0x48,
+				0xFE, 0xC0, 0x00, 0x00},
+			{0xA0, 0x05, 0x84, 0x03, 0xB4, 0x38, 0x10, 0x24, 0x05},
+			{0x65, 0x01, 0x03, 0x65, 0x01, 0x08, 0x01, 0x20, 0xD0, 0x02, 0xFF, 0xFF, 0x20},
+			{0xA0, 0x05, 0xBA, 0x84, 0x03}},
+		{1600,  900, {0x1A, 0xD7, 0xC7, 0xC7, 0x9B, 0xCD, 0x11, 0x9C, 0x86, 0x83, 0x83, 0x9D, 0x4B,
+				0xFE, 0xC0, 0x00, 0x00},
+			{0x40, 0x06, 0x84, 0x03, 0xC8, 0x38, 0x10, 0x27, 0x05},
+			{0x67, 0x01, 0x03, 0x67, 0x01, 0x08, 0x01, 0x20, 0x20, 0x03, 0xFF, 0xFF, 0x20},
+			{0x40, 0x06, 0xBA, 0x84, 0x03}},
+		{1600, 1200, {0x12, 0x03, 0xC7, 0xC7, 0x87, 0xD1, 0x09, 0xE0, 0xB1, 0xAF, 0xAF, 0xE1, 0x04,
+				0x00, 0x01, 0x24, 0x13},
+			{0x40, 0x06, 0xB0, 0x04, 0xC8, 0x4A, 0x10, 0x19, 0x05},
+			{0x4A, 0x01, 0x03, 0x4A, 0x01, 0x08, 0x01, 0x20, 0x20, 0x03, 0xFF, 0xFF, 0x20},
+			{0x40, 0x06, 0xBA, 0xB0, 0x04}},
+		{1680, 1050, {0x12, 0x15, 0xD1, 0xD1, 0x99, 0xE0, 0x17, 0x3D, 0x1B, 0x19, 0x19, 0x3E, 0x0E,
+				0x00, 0x01, 0x24, 0x13},
+			{0x90, 0x06, 0x1A, 0x04, 0xD2, 0x41, 0x10, 0x25, 0x05},
+			{0x69, 0x01, 0x03, 0x69, 0x01, 0x08, 0x01, 0x20, 0x48, 0x03, 0xFF, 0xFF, 0x20},
+			{0x90, 0x06, 0xBA, 0x1A, 0x04}},
+		{1920, 1080, {0x16, 0x0E, 0xEF, 0x9F, 0x8F, 0xFD, 0x02, 0x63, 0x3B, 0x37, 0xCF, 0xEB, 0x40,
+				0x00, 0xC1, 0x24, 0x02},
+			{0x80, 0x07, 0x38, 0x04, 0xF0, 0x42, 0x10, 0x07, 0x05},
+			{0x4D, 0x01, 0x03, 0x4D, 0x01, 0x08, 0x01, 0x20, 0xC0, 0x03, 0xFF, 0xFF, 0x20},
+			{0x80, 0x07, 0xBA, 0x38, 0x04}},
+		{1920, 1200, {0x12, 0x3F, 0xEF, 0xEF, 0x83, 0x01, 0x1B, 0xD8, 0xB1, 0xAF, 0xAF, 0xD9, 0x04,
+				0x00, 0x41, 0x25, 0x12},
+			{0x80, 0x07, 0xB0, 0x04, 0xF0, 0x4B, 0x10, 0x26, 0x05},
+			{0x7D, 0x01, 0x03, 0x7D, 0x01, 0x08, 0x01, 0x20, 0xC0, 0x03, 0xFF, 0xFF, 0x20},
+			{0x80, 0x07, 0xBA, 0xB0, 0x04}},
+		{2048, 1536, {0x12, 0x63, 0xFF, 0xFF, 0x9D, 0x12, 0x0E, 0x34, 0x01, 0x00, 0x00, 0x35, 0x44,
+				0xE0, 0x41, 0x25, 0x13},
+			{0x00, 0x08, 0x00, 0x06, 0x00, 0x60, 0x10, 0x22, 0x05},
+			{0x7A, 0x01, 0x03, 0x52, 0x01, 0x08, 0x01, 0x20, 0x00, 0x04, 0xFF, 0xFF, 0x20},
+			{0x00, 0x08, 0xBA, 0x00, 0x06}}
+	};
+
+	static const nvidia_mode knownMode = { 0, 0,
+		{0x34, 0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x9c, 0x8f, 0x96, 0xb9, 0x8e, 0x1f, 0x00,
+			0x00, 0x00},
+		{0x28, 0x00, 0x19, 0x00, 0x28, 0x18, 0x08, 0x08, 0x05},
+		{0x82, 0x0f, 0x03, 0x01, 0x00, 0x00, 0x08, 0x04, 0x14, 0x00, 0x00, 0x08, 0x17},
+		{0x40, 0x06, 0xba, 0xb0, 0x04}
+	};
+
+	int i;
+	for (i = 0; i < B_COUNT_OF(allowedModes); i++) {
+		if (allowedModes[i].width == mode.timing.h_display
+			&& allowedModes[i].height == mode.timing.v_display) {
+			break;
+		}
+	}
+
+	if (i >= B_COUNT_OF(allowedModes))
+		return B_BAD_VALUE;
+
+	// Get a pointer to the BIOS
+	const uintptr_t kBiosBase = 0xc0000;
+	const size_t kBiosSize = 0x10000;
+	uint8_t* biosBase = (uint8_t*)sBIOSModule->virtual_address(state, kBiosBase);
+	uint8_t* biosEnd = bios + kBiosSize
+
+	int replacementCount = 0;
+	uint8_t* bios = biosBase;
+	while (bios < biosEnd) {
+		bios = (uint8_t*)memmem(bios, biosEnd - bios, knownMode.patch0, sizeof(knownMode.patch0));
+		if (bios == NULL)
+			break;
+		memcpy(bios, allowedModes[i].patch0, sizeof(allowedModes[i].patch0));
+		bios += sizeof(knownMode.patch0);
+		replacementCount++;
+	}
+	dprintf(DEVICE_NAME ": applied patch0 in %d locations\n", replacementCount);
+
+	replacementCount = 0;
+	bios = biosBase;
+	while (bios < biosEnd) {
+		bios = (uint8_t*)memmem(bios, biosEnd - bios, knownMode.patch1, sizeof(knownMode.patch1));
+		if (bios == NULL)
+			break;
+		memcpy(bios, allowedModes[i].patch1, sizeof(allowedModes[i].patch1));
+		bios += sizeof(knownMode.patch1);
+		replacementCount++;
+	}
+	dprintf(DEVICE_NAME ": applied patch1 in %d locations\n", replacementCount);
+
+	replacementCount = 0;
+	bios = biosBase;
+	while (bios < biosEnd) {
+		bios = (uint8_t*)memmem(bios, biosEnd - bios, knownMode.patch2, sizeof(knownMode.patch2));
+		if (bios == NULL)
+			break;
+		memcpy(bios, allowedModes[i].patch2, sizeof(allowedModes[i].patch2));
+		bios += sizeof(knownMode.patch2);
+		replacementCount++;
+	}
+	dprintf(DEVICE_NAME ": applied patch1 in %d locations\n", replacementCount);
+
+	replacementCount = 0;
+	bios = biosBase;
+	while (bios < biosEnd) {
+		bios = (uint8_t*)memmem(bios, biosEnd - bios, knownMode.patch3, sizeof(knownMode.patch3));
+		if (bios == NULL)
+			break;
+		memcpy(bios, allowedModes[i].patch3, sizeof(allowedModes[i].patch3));
+		bios += sizeof(knownMode.patch3);
+		replacementCount++;
+	}
+	dprintf(DEVICE_NAME ": applied patch1 in %d locations\n", replacementCount);
+
+	if ((bios[0x34] & 0x8F) == 0x80)
+		bios[0x34] |= 0x01;
+
+	return B_OK;
+}
+
+
+status_t
+vbe_patch_atom1_bios(vesa_info& info, bios_state* state, display_mode& mode)
+{
+	// Get a pointer to the BIOS
+	const uintptr_t kBiosBase = 0xc0000;
+	uint8_t* bios = (uint8_t*)sBIOSModule->virtual_address(state, kBiosBase);
+
+	ATOM_MODE_TIMING* timing = (ATOM_MODE_TIMING*)(bios + info.shared_info->mode_table_offset);
+	dprintf(DEVICE_NAME ": patching ATOM mode timing (overwriting mode %dx%d)\n",
+		timing->usCRTC_H_Disp, timing->usCRTC_V_Disp);
+
+	timing->usCRTC_H_Total = mode.timing.h_total;
+	timing->usCRTC_H_Disp = mode.timing.h_display;
+	timing->usCRTC_H_SyncStart = mode.timing.h_sync_start;
+	timing->usCRTC_H_SyncWidth = mode.timing.h_sync_end - mode.timing.h_sync_start;
+
+	timing->usCRTC_V_Total = mode.timing.v_total;
+	timing->usCRTC_V_Disp = mode.timing.v_display;
+	timing->usCRTC_V_SyncStart = mode.timing.v_sync_start;
+	timing->usCRTC_V_SyncWidth = mode.timing.v_sync_end - mode.timing.v_sync_start;
+
+	timing->usPixelClock = mode.timing.pixel_clock / 10;
+
+	return B_OK;
+}
+
+
+status_t
+vbe_patch_atom2_bios(vesa_info& info, bios_state* state, display_mode& mode)
+{
+	// Get a pointer to the BIOS
+	const uintptr_t kBiosBase = 0xc0000;
+	uint8_t* bios = (uint8_t*)sBIOSModule->virtual_address(state, kBiosBase);
+
+	ATOM_DTD_FORMAT* timing = (ATOM_DTD_FORMAT*)(bios + info.shared_info->mode_table_offset);
+	dprintf(DEVICE_NAME ": patching ATOM DTD format (overwriting mode %dx%d)\n",
+		timing->usHActive, timing->usVActive);
+
+	timing->usHBlanking_Time = mode.timing.h_total - mode.timing.h_display;
+	timing->usHActive = mode.timing.h_display;
+	timing->usHSyncOffset = mode.timing.h_sync_start;
+	timing->usHSyncWidth = mode.timing.h_sync_end - mode.timing.h_sync_start;
+
+	timing->usVBlanking_Time = mode.timing.v_total - mode.timing.v_display;
+	timing->usVActive = mode.timing.v_display;
+	timing->usVSyncOffset = mode.timing.v_sync_start;
+	timing->usVSyncWidth = mode.timing.v_sync_end - mode.timing.v_sync_start;
+
+	timing->usPixClk = mode.timing.pixel_clock / 10;
+
+	return B_OK;
+}
+
+
 status_t
 vesa_set_custom_display_mode(vesa_info& info, display_mode& mode)
 {
@@ -654,13 +859,15 @@ vesa_set_custom_display_mode(vesa_info& info, display_mode& mode)
 		case kNVidiaBiosType:
 			status = vbe_patch_nvidia_bios(state, mode);
 			break;
+#endif
 		case kAtomBiosType1:
-			status = vbe_patch_atom1_bios(state, mode);
+			status = vbe_patch_atom1_bios(info, state, mode);
+			modeIndex = 0; // TODO how does this work? Is it 100 (first VBE2 mode)?
 			break;
 		case kAtomBiosType2:
-			status = vbe_patch_atom2_bios(state, mode);
+			status = vbe_patch_atom2_bios(info, state, mode);
+			modeIndex = 0; // TODO how does this work? Is it 100 (first VBE2 mode)?
 			break;
-#endif
 		default:
 			status = B_NOT_SUPPORTED;
 			break;
@@ -671,9 +878,28 @@ vesa_set_custom_display_mode(vesa_info& info, display_mode& mode)
 
 	// Get mode information
 	struct vbe_mode_info modeInfo;
-	status = vbe_get_mode_info(state, modeIndex, &modeInfo);
-	if (status != B_OK) {
-		dprintf(DEVICE_NAME ": vesa_set_custom_display_mode(): cannot get mode info\n");
+	for (int i = 0; i < info.shared_info->mode_count; i++) {
+		status = vbe_get_mode_info(state, info.modes[i].mode, &modeInfo);
+		if (status != B_OK) {
+			// Sometimes the patching prevents us from getting the mode info?
+			dprintf(DEVICE_NAME ": vesa_set_custom_display_mode(): cannot get mode info for %x\n",
+				info.modes[i].mode);
+			// Just ignore modes that turn out to be invalid...
+			continue;
+		}
+
+		if (modeInfo.width == mode.timing.h_display && modeInfo.height == mode.timing.v_display
+			&& get_color_space_for_depth(info.modes[i].bits_per_pixel) == mode.space) {
+			modeIndex = info.modes[i].mode;
+			break;
+		}
+	}
+
+	if (modeIndex >= 0) {
+		dprintf(DEVICE_NAME ": custom mode resolution %dx%d succesfully patched at index %"
+			B_PRIx32 "\n", modeInfo.width, modeInfo.height, modeIndex);
+	} else {
+		dprintf(DEVICE_NAME ": video mode patching failed!\n");
 		goto out;
 	}