From 9b592446a011339f6719f5036f7053d54a702a4d Mon Sep 17 00:00:00 2001 From: David Karoly Date: Fri, 22 Apr 2022 12:02:51 +0200 Subject: [PATCH] kernel/arm/paging: adjust page table entry flags Map physical memory by default as Normal Memory, Outer and Inner Write-Back, no Write-Allocate This corresponds to the following flags: TEX=0, B=1, C=1 AP flags are not filled in at this point as access permissions are not enforced. see also ARM Architecture Reference Manual, section B3.8.2, Short-descriptor format memory region attributes, without TEX remap Change-Id: I90bc95a8feb9f22583d41135f4cbd03489fd1b72 Reviewed-on: https://review.haiku-os.org/c/haiku/+/5230 Reviewed-by: Fredrik Holmqvist --- .../kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp b/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp index 05673ea7f2..45be441b27 100644 --- a/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp +++ b/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp @@ -181,7 +181,8 @@ ARMPagingMethod32Bit::PhysicalPageSlotPool::Map(phys_addr_t physicalAddress, page_table_entry& pte = fPageTable[ (virtualAddress - fVirtualBase) / B_PAGE_SIZE]; pte = (physicalAddress & ARM_PTE_ADDRESS_MASK) - | ARM_MMU_L2_TYPE_SMALLEXT; + | ARM_MMU_L2_TYPE_SMALLNEW + | ARM_MMU_L2_FLAG_B | ARM_MMU_L2_FLAG_C; arch_cpu_invalidate_TLB_range(virtualAddress, virtualAddress + B_PAGE_SIZE); // invalidate_TLB(virtualAddress); @@ -508,7 +509,8 @@ ARMPagingMethod32Bit::PutPageTableEntryInTable(page_table_entry* entry, bool globalPage) { page_table_entry page = (physicalAddress & ARM_PTE_ADDRESS_MASK) - | ARM_MMU_L2_TYPE_SMALLEXT; + | ARM_MMU_L2_TYPE_SMALLNEW + | ARM_MMU_L2_FLAG_B | ARM_MMU_L2_FLAG_C; #if 0 //IRA | X86_PTE_PRESENT | (globalPage ? X86_PTE_GLOBAL : 0) | MemoryTypeToPageTableEntryFlags(memoryType);