From 9c90fc59d2f114dc8ee5b36b9dbbca7a1165c42f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Axel=20D=C3=B6rfler?= Date: Thu, 22 Oct 2009 20:36:45 +0000 Subject: [PATCH] * Disabled the LVDS post2 for i965 cards, maybe that helps Adrien, and don't break the display for others. If that doesn't work out, there is probably a bit more to it. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33731 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/intel_extreme/mode.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/add-ons/accelerants/intel_extreme/mode.cpp b/src/add-ons/accelerants/intel_extreme/mode.cpp index 05ea480503..ea3652d9d7 100644 --- a/src/add-ons/accelerants/intel_extreme/mode.cpp +++ b/src/add-ons/accelerants/intel_extreme/mode.cpp @@ -385,7 +385,8 @@ retrieve_current_mode(display_mode& mode, uint32 pllRegister) divisors.post1 = (pll & DISPLAY_PLL_9xx_POST1_DIVISOR_MASK) >> DISPLAY_PLL_POST1_DIVISOR_SHIFT; - if (pllRegister == INTEL_DISPLAY_B_PLL) { + if (pllRegister == INTEL_DISPLAY_B_PLL + && gInfo->shared_info->device_type.InGroup(INTEL_TYPE_96x)) { // TODO: Fix this? Need to support dual channel LVDS. divisors.post2 = LVDS_POST2_RATE_SLOW; } else {