From 9d063f00a525a89cea1e915e0c2bfb9879e20f03 Mon Sep 17 00:00:00 2001
From: Rudolf Cornelissen <rudolf.cornelissen@gmail.com>
Date: Thu, 4 Nov 2004 15:28:24 +0000
Subject: [PATCH] removed a lot of references to nVidia

git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9791 a95241bf-73f2-0310-859d-f6bbb57e9c96
---
 .../accelerants/skeleton/EngineManagement.c    |  4 ++--
 .../accelerants/skeleton/InitAccelerant.c      |  4 ++--
 src/add-ons/accelerants/skeleton/Overlay.c     |  6 +++---
 .../accelerants/skeleton/SetDisplayMode.c      |  4 ++--
 src/add-ons/accelerants/skeleton/acc_std.h     |  2 +-
 src/add-ons/accelerants/skeleton/engine/acc.c  |  2 +-
 src/add-ons/accelerants/skeleton/engine/agp.c  | 18 +++++++++---------
 src/add-ons/accelerants/skeleton/engine/bes.c  |  4 ++--
 src/add-ons/accelerants/skeleton/engine/dac.c  |  2 +-
 src/add-ons/accelerants/skeleton/engine/dac2.c |  2 +-
 .../accelerants/skeleton/engine/general.c      |  8 ++++----
 .../accelerants/skeleton/engine/globals.c      |  4 ++--
 .../accelerants/skeleton/engine/globals.h      |  4 ++--
 src/add-ons/accelerants/skeleton/engine/info.c | 12 ++++++------
 .../accelerants/skeleton/engine/proto.h        | 12 ++++++------
 .../accelerants/skeleton/engine/support.c      |  2 +-
 16 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/src/add-ons/accelerants/skeleton/EngineManagement.c b/src/add-ons/accelerants/skeleton/EngineManagement.c
index 40a8505b6d..3078796c9f 100644
--- a/src/add-ons/accelerants/skeleton/EngineManagement.c
+++ b/src/add-ons/accelerants/skeleton/EngineManagement.c
@@ -12,7 +12,7 @@
 #include "acc_std.h"
 
 
-static engine_token nv_engine_token = { 1, B_2D_ACCELERATION, NULL };
+static engine_token eng_engine_token = { 1, B_2D_ACCELERATION, NULL };
 
 uint32 ACCELERANT_ENGINE_COUNT(void)
 {
@@ -28,7 +28,7 @@ status_t ACQUIRE_ENGINE(uint32 capabilities, uint32 max_wait, sync_token *st, en
 	if (st) SYNC_TO_TOKEN(st);
 
 	/* return an engine token */
-	*et = &nv_engine_token;
+	*et = &eng_engine_token;
 	return B_OK;
 }
 
diff --git a/src/add-ons/accelerants/skeleton/InitAccelerant.c b/src/add-ons/accelerants/skeleton/InitAccelerant.c
index b5718f249c..1782e9cf3d 100644
--- a/src/add-ons/accelerants/skeleton/InitAccelerant.c
+++ b/src/add-ons/accelerants/skeleton/InitAccelerant.c
@@ -18,7 +18,7 @@ static status_t init_common(int the_fd);
 /* Initialization code shared between primary and cloned accelerants */
 static status_t init_common(int the_fd) {
 	status_t result;
-	nv_get_private_data gpd;
+	eng_get_private_data gpd;
 	
 	// LOG not available from here to next LOG: NULL si
 
@@ -220,7 +220,7 @@ Return the info required to clone the device.  void *data points to
 a buffer at least ACCELERANT_CLONE_INFO_SIZE() bytes in length.
 */
 void GET_ACCELERANT_CLONE_INFO(void *data) {
-	nv_device_name dn;
+	eng_device_name dn;
 	status_t result;
 
 	/* call the kernel driver to get the device name */	
diff --git a/src/add-ons/accelerants/skeleton/Overlay.c b/src/add-ons/accelerants/skeleton/Overlay.c
index c1f37af207..99e1243b15 100644
--- a/src/add-ons/accelerants/skeleton/Overlay.c
+++ b/src/add-ons/accelerants/skeleton/Overlay.c
@@ -197,7 +197,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
 		/* NOTE to app programmers:
 		 * For testing app behaviour regarding workspace switches or screen prefs changes to settings
 		 * that do not have enough cardRAM left for allocation of overlay bitmaps, you need a card with
-		 * a low amount of RAM. Or you can set in the file nv.settings for example:
+		 * a low amount of RAM. Or you can set in the file skel.settings for example:
 		 * memory 8 #8Mb RAM on card
 		 * and reboot (this simulates 8Mb RAM on the card).
 		 *
@@ -529,7 +529,7 @@ status_t RELEASE_OVERLAY(overlay_token ot)
 	/* call is for real */
 	{
 
-		nv_release_bes();
+		eng_release_bes();
 
 		LOG(4,("succesfull\n"));
 
@@ -597,7 +597,7 @@ status_t CONFIGURE_OVERLAY
 			LOG(4,("succesfull, switching to buffer %d\n", offset));
 
 			/* program overlay hardware */
-			nv_configure_bes(ob, ow, ov, offset);
+			eng_configure_bes(ob, ow, ov, offset);
 
 			return B_OK;
 		}
diff --git a/src/add-ons/accelerants/skeleton/SetDisplayMode.c b/src/add-ons/accelerants/skeleton/SetDisplayMode.c
index a6a4d31c00..307d57e582 100644
--- a/src/add-ons/accelerants/skeleton/SetDisplayMode.c
+++ b/src/add-ons/accelerants/skeleton/SetDisplayMode.c
@@ -19,7 +19,7 @@
 */
 static void interrupt_enable(bool flag) {
 	status_t result;
-	nv_set_bool_state sbs;
+	eng_set_bool_state sbs;
 
 	/* set the magic number so the driver knows we're for real */
 	sbs.magic = NV_PRIVATE_DATA_MAGIC;
@@ -323,7 +323,7 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
 //	head1_mem_priority(colour_depth1);
 
 	/* Tune RAM CAS-latency if needed. Must be done *here*! */
-	nv_set_cas_latency();
+	eng_set_cas_latency();
 
 	return B_OK;
 }
diff --git a/src/add-ons/accelerants/skeleton/acc_std.h b/src/add-ons/accelerants/skeleton/acc_std.h
index 36b582588f..81a36d1cb9 100644
--- a/src/add-ons/accelerants/skeleton/acc_std.h
+++ b/src/add-ons/accelerants/skeleton/acc_std.h
@@ -10,7 +10,7 @@
 #include <sys/ioctl.h>
 #include "DriverInterface.h"
 #include "globals.h"
-//apsed #include "nv_extern.h"
+//apsed #include "extern.h"
 #include "proto.h"
 #include "be_driver_proto.h"
 
diff --git a/src/add-ons/accelerants/skeleton/engine/acc.c b/src/add-ons/accelerants/skeleton/engine/acc.c
index a1ea4ce5e0..cb0671b944 100644
--- a/src/add-ons/accelerants/skeleton/engine/acc.c
+++ b/src/add-ons/accelerants/skeleton/engine/acc.c
@@ -37,7 +37,7 @@ status_t eng_acc_init()
 	uint16 cnt;
 
 	/* setup PTIMER: */
-	//fixme? how about NV28 setup as just after coldstarting? (see nv_info.c)
+	//fixme? how about NV28 setup as just after coldstarting? (see eng_info.c)
 	/* set timer numerator to 8 (in b0-15) */
 	ACCW(PT_NUMERATOR, 0x00000008);
 	/* set timer denominator to 3 (in b0-15) */
diff --git a/src/add-ons/accelerants/skeleton/engine/agp.c b/src/add-ons/accelerants/skeleton/engine/agp.c
index 8fdf3829f1..a580d5f133 100644
--- a/src/add-ons/accelerants/skeleton/engine/agp.c
+++ b/src/add-ons/accelerants/skeleton/engine/agp.c
@@ -12,10 +12,10 @@ static void eng_agp_list_active(uint32 cmd);
 
 status_t eng_agp_setup(void)
 {
-	nv_nth_agp_info nai;
-	nv_cmd_agp nca;
+	eng_nth_agp_info nai;
+	eng_cmd_agp nca;
 	uint8 index;
-	agp_info nv_ai;
+	agp_info eng_ai;
 	bool agp = false;
 
 	/* first try to enable FW support on our card if user requested this
@@ -36,7 +36,7 @@ status_t eng_agp_setup(void)
 		LOG(4, ("AGP: STRAPINFO2 now contains $%08x\n", NV_REG32(NV32_NVSTRAPINFO2)));
 	}
 
-	/* set the magic number so the nvidia kerneldriver knows we're for real */
+	/* set the magic number so the skeleton kerneldriver knows we're for real */
 	nca.magic = nai.magic = NV_PRIVATE_DATA_MAGIC;
 
 	/* contact driver and get a pointer to the registers and shared data */
@@ -78,7 +78,7 @@ status_t eng_agp_setup(void)
 			LOG(4,("AGP: (this is the device this accelerant controls)\n"));
 			agp = true;
 			/* remember our info */
-			nv_ai = nai.agpi;
+			eng_ai = nai.agpi;
 		}
 
 		/* log capabilities */
@@ -104,8 +104,8 @@ status_t eng_agp_setup(void)
 
 	if (si->settings.force_pci)
 	{
-		/* set PCI mode if specified by user in nv.settings */
-		LOG(4,("AGP: forcing PCI mode (specified in nv.settings)\n"));
+		/* set PCI mode if specified by user in skel.settings */
+		LOG(4,("AGP: forcing PCI mode (specified in skel.settings)\n"));
 
 		/* let the AGP busmanager setup PCI mode.
 		 * (the AGP speed scheme is of no consequence now) */
@@ -120,13 +120,13 @@ status_t eng_agp_setup(void)
 		/* let the AGP busmanager worry about what mode to set.. */
 		nca.cmd = 0xfffffff7;
 		/* ..but we do need to select the right speed scheme fetched from our card */
-		if (nv_ai.interface.agp_stat & AGP_rate_rev) nca.cmd |= AGP_rate_rev;
+		if (eng_ai.interface.agp_stat & AGP_rate_rev) nca.cmd |= AGP_rate_rev;
 		ioctl(fd, NV_ENABLE_AGP, &nca, sizeof(nca));
 	}
 
 	/* list mode now activated,
 	 * make sure we have the correct speed scheme for logging */
-	eng_agp_list_active(nca.cmd | (nv_ai.interface.agp_stat & AGP_rate_rev));
+	eng_agp_list_active(nca.cmd | (eng_ai.interface.agp_stat & AGP_rate_rev));
 
 	/* extra check */
 	LOG(4,("AGP: graphics card AGPCMD register readback $%08x\n", CFGR(AGPCMD)));
diff --git a/src/add-ons/accelerants/skeleton/engine/bes.c b/src/add-ons/accelerants/skeleton/engine/bes.c
index b51e68033a..43bac1a566 100644
--- a/src/add-ons/accelerants/skeleton/engine/bes.c
+++ b/src/add-ons/accelerants/skeleton/engine/bes.c
@@ -421,7 +421,7 @@ status_t eng_bes_init()
 	return B_OK;
 }
 
-status_t nv_configure_bes
+status_t eng_configure_bes
 	(const overlay_buffer *ob, const overlay_window *ow, const overlay_view *ov, int offset)
 {
 	/* yuy2 (4:2:2) colorspace calculations */
@@ -848,7 +848,7 @@ status_t nv_configure_bes
 	return B_OK;
 }
 
-status_t nv_release_bes()
+status_t eng_release_bes()
 {
 	if (si->ps.card_arch < NV10A)
 	{
diff --git a/src/add-ons/accelerants/skeleton/engine/dac.c b/src/add-ons/accelerants/skeleton/engine/dac.c
index 7b0dba46cf..205e578858 100644
--- a/src/add-ons/accelerants/skeleton/engine/dac.c
+++ b/src/add-ons/accelerants/skeleton/engine/dac.c
@@ -148,7 +148,7 @@ status_t eng_dac_set_pix_pll(display_mode target)
 	//fixme: when VESA DDC EDID stuff is implemented, this option can be deleted...
 	if (si->ps.tmds1_active && !si->settings.pgm_panel)
 	{
-		LOG(4,("DAC: Not programming DFP refresh (specified in nv.settings)\n"));
+		LOG(4,("DAC: Not programming DFP refresh (specified in skel.settings)\n"));
 		return B_OK;
 	}
 
diff --git a/src/add-ons/accelerants/skeleton/engine/dac2.c b/src/add-ons/accelerants/skeleton/engine/dac2.c
index ab27b26403..b7b1458905 100644
--- a/src/add-ons/accelerants/skeleton/engine/dac2.c
+++ b/src/add-ons/accelerants/skeleton/engine/dac2.c
@@ -156,7 +156,7 @@ status_t eng_dac2_set_pix_pll(display_mode target)
 	//fixme: when VESA DDC EDID stuff is implemented, this option can be deleted...
 	if (si->ps.tmds2_active && !si->settings.pgm_panel)
 	{
-		LOG(4,("DAC2: Not programming DFP refresh (specified in nv.settings)\n"));
+		LOG(4,("DAC2: Not programming DFP refresh (specified in skel.settings)\n"));
 		return B_OK;
 	}
 
diff --git a/src/add-ons/accelerants/skeleton/engine/general.c b/src/add-ons/accelerants/skeleton/engine/general.c
index 14ed0416c4..9fe6728cc8 100644
--- a/src/add-ons/accelerants/skeleton/engine/general.c
+++ b/src/add-ons/accelerants/skeleton/engine/general.c
@@ -12,7 +12,7 @@ static status_t test_ram(void);
 static status_t nvxx_general_powerup (void);
 static status_t eng_general_bios_to_powergraphics(void);
 
-static void nv_dump_configuration_space (void)
+static void eng_dump_configuration_space (void)
 {
 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \
 	uint32 value = CFGR(reg); \
@@ -137,7 +137,7 @@ static status_t test_ram()
  * This routine *has* to be done *after* SetDispplayMode has been executed,
  * or test results will not be representative!
  * (CAS latency is dependant on NV setup on some (DRAM) boards) */
-status_t nv_set_cas_latency()
+status_t eng_set_cas_latency()
 {
 	status_t result = B_ERROR;
 	uint8 latency = 0;
@@ -317,7 +317,7 @@ static status_t nvxx_general_powerup()
 	dump_pins();
 
 	/* dump config space as it is after a possible coldstart attempt */
-	if (si->settings.logmask & 0x80000000) nv_dump_configuration_space();
+	if (si->settings.logmask & 0x80000000) eng_dump_configuration_space();
 
 	/* setup CRTC and DAC functions access: determined in fake_panel_start */
 	setup_virtualized_heads(si->ps.crtc2_prim);
@@ -409,7 +409,7 @@ static status_t eng_general_bios_to_powergraphics()
 	NV_REG32(NV32_PWRUPCTRL) = 0x13110011;
 	snooze(1000);
 
-	/* power-up all nvidia hardware function blocks */
+	/* power-up all hardware function blocks */
 	/* bit 28: OVERLAY ENGINE (BES),
 	 * bit 25: CRTC2, (> NV04A)
 	 * bit 24: CRTC1,
diff --git a/src/add-ons/accelerants/skeleton/engine/globals.c b/src/add-ons/accelerants/skeleton/engine/globals.c
index cc0eeb65cc..ed9d7674a4 100644
--- a/src/add-ons/accelerants/skeleton/engine/globals.c
+++ b/src/add-ons/accelerants/skeleton/engine/globals.c
@@ -18,7 +18,7 @@ display_mode *my_mode_list;
 area_id	my_mode_list_area;
 int accelerantIsClone;
 
-nv_get_set_pci nv_pci_access=
+eng_get_set_pci eng_pci_access=
 	{
 		NV_PRIVATE_DATA_MAGIC,
 		0,
@@ -26,7 +26,7 @@ nv_get_set_pci nv_pci_access=
 		0
 	};
 
-nv_in_out_isa nv_isa_access=
+eng_in_out_isa eng_isa_access=
 	{
 		NV_PRIVATE_DATA_MAGIC,
 		0,
diff --git a/src/add-ons/accelerants/skeleton/engine/globals.h b/src/add-ons/accelerants/skeleton/engine/globals.h
index 5afab87516..6561c0e3b1 100644
--- a/src/add-ons/accelerants/skeleton/engine/globals.h
+++ b/src/add-ons/accelerants/skeleton/engine/globals.h
@@ -7,8 +7,8 @@ extern display_mode *my_mode_list;
 extern area_id my_mode_list_area;
 extern int accelerantIsClone;
 
-extern nv_get_set_pci nv_pci_access;
-extern nv_in_out_isa nv_isa_access;
+extern eng_get_set_pci eng_pci_access;
+extern eng_in_out_isa eng_isa_access;
 
 
 typedef status_t (*crtc_validate_timing)(uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*);
diff --git a/src/add-ons/accelerants/skeleton/engine/info.c b/src/add-ons/accelerants/skeleton/engine/info.c
index f623743efa..83e20f1a45 100644
--- a/src/add-ons/accelerants/skeleton/engine/info.c
+++ b/src/add-ons/accelerants/skeleton/engine/info.c
@@ -2634,7 +2634,7 @@ static void pinsnv4_fake(void)
 	si->ps.max_dac2_clock_32 = 0;
 	/* 'failsave' values */
 	si->ps.max_dac2_clock_32dh = 0;
-	//fixme: primary & secondary_dvi should be overrule-able via nv.settings
+	//fixme: primary & secondary_dvi should be overrule-able via skel.settings
 	si->ps.primary_dvi = false;
 	si->ps.secondary_dvi = false;
 	/* not used (yet) because no coldstart will be attempted (yet) */
@@ -2668,7 +2668,7 @@ static void pinsnv5_nv5m64_fake(void)
 	si->ps.max_dac2_clock_32 = 0;
 	/* 'failsave' values */
 	si->ps.max_dac2_clock_32dh = 0;
-	//fixme: primary & secondary_dvi should be overrule-able via nv.settings
+	//fixme: primary & secondary_dvi should be overrule-able via skel.settings
 	si->ps.primary_dvi = false;
 	si->ps.secondary_dvi = false;
 	/* not used (yet) because no coldstart will be attempted (yet) */
@@ -2702,7 +2702,7 @@ static void pinsnv6_fake(void)
 	si->ps.max_dac2_clock_32 = 0;
 	/* 'failsave' values */
 	si->ps.max_dac2_clock_32dh = 0;
-	//fixme: primary & secondary_dvi should be overrule-able via nv.settings
+	//fixme: primary & secondary_dvi should be overrule-able via skel.settings
 	si->ps.primary_dvi = false;
 	si->ps.secondary_dvi = false;
 	/* not used (yet) because no coldstart will be attempted (yet) */
@@ -2754,7 +2754,7 @@ static void pinsnv10_arch_fake(void)
 		si->ps.max_dac2_clock_32 = 280;
 		si->ps.max_dac2_clock_32dh = 250;
 	}
-	//fixme: primary & secondary_dvi should be overrule-able via nv.settings
+	//fixme: primary & secondary_dvi should be overrule-able via skel.settings
 	si->ps.primary_dvi = false;
 	si->ps.secondary_dvi = false;
 	/* not used (yet) because no coldstart will be attempted (yet) */
@@ -2790,7 +2790,7 @@ static void pinsnv20_arch_fake(void)
 	si->ps.max_dac2_clock_24 = 320;
 	si->ps.max_dac2_clock_32 = 280;
 	si->ps.max_dac2_clock_32dh = 250;
-	//fixme: primary & secondary_dvi should be overrule-able via nv.settings
+	//fixme: primary & secondary_dvi should be overrule-able via skel.settings
 	si->ps.primary_dvi = false;
 	si->ps.secondary_dvi = false;
 	/* not used (yet) because no coldstart will be attempted (yet) */
@@ -2840,7 +2840,7 @@ static void pinsnv30_arch_fake(void)
 	si->ps.max_dac2_clock_24 = 320;
 	si->ps.max_dac2_clock_32 = 280;
 	si->ps.max_dac2_clock_32dh = 250;
-	//fixme: primary & secondary_dvi should be overrule-able via nv.settings
+	//fixme: primary & secondary_dvi should be overrule-able via skel.settings
 	si->ps.primary_dvi = false;
 	si->ps.secondary_dvi = false;
 	/* not used (yet) because no coldstart will be attempted (yet) */
diff --git a/src/add-ons/accelerants/skeleton/engine/proto.h b/src/add-ons/accelerants/skeleton/engine/proto.h
index b800fad235..117001a122 100644
--- a/src/add-ons/accelerants/skeleton/engine/proto.h
+++ b/src/add-ons/accelerants/skeleton/engine/proto.h
@@ -1,6 +1,6 @@
 /* general card functions */
 status_t eng_general_powerup(void);
-status_t nv_set_cas_latency(void);
+status_t eng_set_cas_latency(void);
 void setup_virtualized_heads(bool);
 void set_crtc_owner(bool);
 status_t eng_general_output_select(bool);
@@ -13,17 +13,17 @@ status_t eng_agp_setup(void);
 
 /* apsed: logging macros */
 #define MSG(args) do { /* if needed or si->settings with si NULL */ \
-	nv_log args; \
+	eng_log args; \
 } while (0)
 #define LOG(level_bit, args) do { \
 	uint32 mod = (si->settings.logmask &  0xfffffff0) & MODULE_BIT; \
 	uint32 lev = (si->settings.logmask & ~0xfffffff0) & level_bit; \
-	if (mod && lev) nv_log args; \
+	if (mod && lev) eng_log args; \
 } while (0)
 
 /* support functions */
 void delay(bigtime_t i);
-void nv_log(char *format, ...);
+void eng_log(char *format, ...);
 
 /* i2c functions */
 int i2c_maven_read(unsigned char address);
@@ -118,9 +118,9 @@ status_t check_overlay_capability(uint32 feature);
 void eng_bes_move_overlay(void);
 status_t eng_bes_to_crtc(bool crtc);
 status_t eng_bes_init(void);
-status_t nv_configure_bes
+status_t eng_configure_bes
 	(const overlay_buffer *ob, const overlay_window *ow,const overlay_view *ov, int offset);
-status_t nv_release_bes(void);
+status_t eng_release_bes(void);
 
 /* I2C functions */
 status_t i2c_sec_tv_adapter(void);
diff --git a/src/add-ons/accelerants/skeleton/engine/support.c b/src/add-ons/accelerants/skeleton/engine/support.c
index 322bd8cdb9..56eece349f 100644
--- a/src/add-ons/accelerants/skeleton/engine/support.c
+++ b/src/add-ons/accelerants/skeleton/engine/support.c
@@ -15,7 +15,7 @@ void delay(bigtime_t i)
 }
 
 /*debug logging*/
-void nv_log(char *fmt, ...)
+void eng_log(char *fmt, ...)
 {
 	char     buffer[1024];
 	char     fname[64];