AHCI: Rework port reset and control

* Move to more standardized functions matching AHCI spec
* Don't perform unnecessary double port resets
* Begin implementing a software reset to try first per spec.
  Software reset needs more work, falls through to port reset
  for the moment which is stable.
* Don't duplicate ATA defines, use what we already provide.
* Tested working on VirtualBox 1-16 AHCI ports, Intel C200,
  and AMD FCH.
This commit is contained in:
Alexander von Gluck IV
2015-10-05 19:46:03 -05:00
parent 3f93d71a14
commit a1ed294ff9
5 changed files with 213 additions and 102 deletions
+2 -2
View File
@@ -248,12 +248,12 @@ enum {
ATA_STATUS_BUSY = 0x80 // busy
};
// device control register
// device control register (ATA command block)
enum {
// bit 0 must be zero
ATA_DEVICE_CONTROL_DISABLE_INTS = 0x02, // disable INTRQ
ATA_DEVICE_CONTROL_SOFT_RESET = 0x04, // software device reset
ATA_DEVICE_CONTROL_BIT3 = 0x08, // don't know, but must be set
ATA_DEVICE_CONTROL_BIT3 = 0x08, // obsolete. Must always be set
// bits inbetween are reserved
ATA_DEVICE_CONTROL_HIGH_ORDER_BYTE = 0x80 // read high order byte
// (for 48-bit lba)