bus_managers/pci: split PCI controller to separate add-on

busses/pci/x86: add
Other add-ons are in following commits.

Change-Id: I7a77bfaef0e8995917b4b54c8369d7075533ec26
Reviewed-on: https://review.haiku-os.org/c/haiku/+/6220
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: waddlesplash <[email protected]>
This commit is contained in:
X512
2023-04-25 15:54:32 +00:00
committed by waddlesplash
parent 97b7c7719d
commit a23ac85fa9
67 changed files with 989 additions and 4974 deletions
+48
View File
@@ -58,6 +58,54 @@ typedef struct pci_device_module_info {
} pci_device_module_info;
enum {
kPciRangeInvalid = 0,
kPciRangeIoPort = 1,
kPciRangeMmio = 2,
kPciRangeMmio64Bit = 1 << 0,
kPciRangeMmioPrefetch = 1 << 1,
kPciRangeMmioEnd = 6,
kPciRangeEnd = 6,
};
typedef struct pci_resource_range {
uint32 type;
phys_addr_t host_addr;
phys_addr_t pci_addr;
uint64 size;
} pci_resource_range;
typedef struct pci_controller_module_info {
driver_module_info info;
// read PCI config space
status_t (*read_pci_config)(void *cookie,
uint8 bus, uint8 device, uint8 function,
uint16 offset, uint8 size, uint32 *value);
// write PCI config space
status_t (*write_pci_config)(void *cookie,
uint8 bus, uint8 device, uint8 function,
uint16 offset, uint8 size, uint32 value);
status_t (*get_max_bus_devices)(void *cookie, int32 *count);
status_t (*read_pci_irq)(void *cookie,
uint8 bus, uint8 device, uint8 function,
uint8 pin, uint8 *irq);
status_t (*write_pci_irq)(void *cookie,
uint8 bus, uint8 device, uint8 function,
uint8 pin, uint8 irq);
status_t (*get_range)(void *cookie, uint32 index, pci_resource_range *range);
status_t (*finalize)(void *cookie);
} pci_controller_module_info;
/* Attributes of PCI device nodes */
#define B_PCI_DEVICE_DOMAIN "pci/domain" /* uint32 */
#define B_PCI_DEVICE_BUS "pci/bus" /* uint8 */