i2p/haiku-beta6
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

* Style and automatic whitespace cleanup, no functional change.

Browse Source 
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36410 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2010-04-22 12:03:47 +00:00
parent 8af2493444
commit a2f2499840
2 changed files with 91 additions and 75 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp
+65 -49
View File
@@ -3,20 +3,23 @@
* Distributed under the terms of the MIT License. * Distributed under the terms of the MIT License.
*/ */
#include "ahci_port.h"
#include "ahci_controller.h"
#include "util.h"
#include "ata_cmds.h"
#include "scsi_cmds.h"
#include "sata_request.h"
#include <KernelExport.h> #include "ahci_port.h"
#include <ByteOrder.h>
#include <new>
#include <stdio.h> #include <stdio.h>
#include <string.h> #include <string.h>
#include <new>
#include <ByteOrder.h>
#include <KernelExport.h>
#include "ahci_controller.h"
#include "ahci_tracing.h" #include "ahci_tracing.h"
#include "ata_cmds.h"
#include "sata_request.h"
#include "scsi_cmds.h"
#include "util.h"
#define TRACE_AHCI #define TRACE_AHCI
#ifdef TRACE_AHCI #ifdef TRACE_AHCI
@@ -31,7 +34,8 @@
AHCIPort::AHCIPort(AHCIController *controller, int index) AHCIPort::AHCIPort(AHCIController *controller, int index)
: fController(controller), :
fController(controller),
fIndex(index), fIndex(index),
fRegs(&controller->fRegs->port[index]), fRegs(&controller->fRegs->port[index]),
fArea(-1), fArea(-1),
@@ -51,7 +55,7 @@ AHCIPort::AHCIPort(AHCIController *controller, int index)
fRequestSem = create_sem(1, "ahci request"); fRequestSem = create_sem(1, "ahci request");
fResponseSem = create_sem(0, "ahci response"); fResponseSem = create_sem(0, "ahci response");
} }
AHCIPort::~AHCIPort() AHCIPort::~AHCIPort()
{ {
@@ -59,7 +63,7 @@ AHCIPort::~AHCIPort()
delete_sem(fResponseSem); delete_sem(fResponseSem);
} }
status_t status_t
AHCIPort::Init1() AHCIPort::Init1()
{ {
@@ -88,7 +92,7 @@ AHCIPort::Init1()
virtAddr += sizeof(command_table); virtAddr += sizeof(command_table);
fPRDTable = (prd *)virtAddr; fPRDTable = (prd *)virtAddr;
TRACE("PRD table is at %p\n", fPRDTable); TRACE("PRD table is at %p\n", fPRDTable);
fRegs->clb = LO32(physAddr); fRegs->clb = LO32(physAddr);
fRegs->clbu = HI32(physAddr); fRegs->clbu = HI32(physAddr);
physAddr += sizeof(command_list_entry) * COMMAND_LIST_ENTRY_COUNT; physAddr += sizeof(command_list_entry) * COMMAND_LIST_ENTRY_COUNT;
@@ -116,7 +120,7 @@ AHCIPort::Init1()
// activate link // activate link
fRegs->cmd = (fRegs->cmd & ~PORT_CMD_ICC_MASK) | PORT_CMD_ICC_ACTIVE; fRegs->cmd = (fRegs->cmd & ~PORT_CMD_ICC_MASK) | PORT_CMD_ICC_ACTIVE;
// enable FIS receive // enable FIS receive
fRegs->cmd |= PORT_CMD_FER; fRegs->cmd |= PORT_CMD_FER;
@@ -157,7 +161,7 @@ AHCIPort::Init2()
} }
void void
AHCIPort::Uninit() AHCIPort::Uninit()
{ {
TRACE("AHCIPort::Uninit port %d\n", fIndex); TRACE("AHCIPort::Uninit port %d\n", fIndex);
@@ -181,10 +185,10 @@ AHCIPort::Uninit()
// disable interrupts // disable interrupts
fRegs->ie = 0; fRegs->ie = 0;
// clear pending interrupts // clear pending interrupts
fRegs->is = fRegs->is; fRegs->is = fRegs->is;
// invalidate DMA addresses // invalidate DMA addresses
fRegs->clb = 0; fRegs->clb = 0;
fRegs->clbu = 0; fRegs->clbu = 0;
@@ -201,7 +205,7 @@ AHCIPort::ResetDevice()
if (fRegs->cmd & PORT_CMD_ST) if (fRegs->cmd & PORT_CMD_ST)
TRACE("AHCIPort::ResetDevice PORT_CMD_ST set, behaviour undefined\n"); TRACE("AHCIPort::ResetDevice PORT_CMD_ST set, behaviour undefined\n");
// perform a hard reset // perform a hard reset
fRegs->sctl = (fRegs->sctl & ~0xf) | 1; fRegs->sctl = (fRegs->sctl & ~0xf) | 1;
FlushPostedWrites(); FlushPostedWrites();
spin(1100); spin(1100);
@@ -494,7 +498,7 @@ AHCIPort::StartTransfer()
{ {
acquire_sem(fRequestSem); acquire_sem(fRequestSem);
} }
status_t status_t
AHCIPort::WaitForTransfer(int *tfd, bigtime_t timeout) AHCIPort::WaitForTransfer(int *tfd, bigtime_t timeout)
@@ -600,13 +604,13 @@ AHCIPort::ScsiInquiry(scsi_ccb *request)
sizeof(scsiData.product_rev)); sizeof(scsiData.product_rev));
if (!fIsATAPI) { if (!fIsATAPI) {
bool lba = (ataData.words[49] & (1 << 9)) != 0; bool lba = (ataData.words[49] & (1 << 9)) != 0;
bool lba48 = (ataData.words[83] & (1 << 10)) != 0; bool lba48 = (ataData.words[83] & (1 << 10)) != 0;
uint32 sectors = *(uint32*)&ataData.words[60]; uint32 sectors = *(uint32*)&ataData.words[60];
uint64 sectors48 = *(uint64*)&ataData.words[100]; uint64 sectors48 = *(uint64*)&ataData.words[100];
fUse48BitCommands = lba && lba48; fUse48BitCommands = lba && lba48;
fSectorSize = 512; fSectorSize = 512;
fSectorCount = !(lba || sectors) ? 0 : lba48 ? sectors48 : sectors; fSectorCount = !(lba || sectors) ? 0 : lba48 ? sectors48 : sectors;
TRACE("lba %d, lba48 %d, fUse48BitCommands %d, sectors %lu, " TRACE("lba %d, lba48 %d, fUse48BitCommands %d, sectors %lu, "
"sectors48 %llu, size %llu\n", "sectors48 %llu, size %llu\n",
lba, lba48, fUse48BitCommands, sectors, sectors48, lba, lba48, fUse48BitCommands, sectors, sectors48,
@@ -637,7 +641,7 @@ AHCIPort::ScsiInquiry(scsi_ccb *request)
TRACE("firmware rev.: %s\n", firmwareRev); TRACE("firmware rev.: %s\n", firmwareRev);
if (sg_memcpy(request->sg_list, request->sg_count, &scsiData, if (sg_memcpy(request->sg_list, request->sg_count, &scsiData,
sizeof(scsiData)) < B_OK) { sizeof(scsiData)) < B_OK) {
request->subsys_status = SCSI_DATA_RUN_ERR; request->subsys_status = SCSI_DATA_RUN_ERR;
} else { } else {
request->subsys_status = SCSI_REQ_CMP; request->subsys_status = SCSI_REQ_CMP;
@@ -679,7 +683,8 @@ AHCIPort::ScsiReadCapacity(scsi_ccb *request)
scsiData.block_size = B_HOST_TO_BENDIAN_INT32(fSectorSize); scsiData.block_size = B_HOST_TO_BENDIAN_INT32(fSectorSize);
scsiData.lba = B_HOST_TO_BENDIAN_INT32(fSectorCount - 1); scsiData.lba = B_HOST_TO_BENDIAN_INT32(fSectorCount - 1);
if (sg_memcpy(request->sg_list, request->sg_count, &scsiData, sizeof(scsiData)) < B_OK) { if (sg_memcpy(request->sg_list, request->sg_count, &scsiData,
sizeof(scsiData)) < B_OK) {
request->subsys_status = SCSI_DATA_RUN_ERR; request->subsys_status = SCSI_DATA_RUN_ERR;
} else { } else {
request->subsys_status = SCSI_REQ_CMP; request->subsys_status = SCSI_REQ_CMP;
@@ -690,10 +695,12 @@ AHCIPort::ScsiReadCapacity(scsi_ccb *request)
void void
AHCIPort::ScsiReadWrite(scsi_ccb *request, uint64 lba, size_t sectorCount, bool isWrite) AHCIPort::ScsiReadWrite(scsi_ccb *request, uint64 lba, size_t sectorCount,
bool isWrite)
{ {
RWTRACE("[%lld] %ld ScsiReadWrite: position %llu, size %lu, isWrite %d\n", RWTRACE("[%lld] %ld ScsiReadWrite: position %llu, size %lu, isWrite %d\n",
system_time(), find_thread(NULL), lba * 512, sectorCount * 512, isWrite); system_time(), find_thread(NULL), lba * 512, sectorCount * 512,
isWrite);
#if 0 #if 0
if (isWrite) { if (isWrite) {
@@ -709,14 +716,18 @@ AHCIPort::ScsiReadWrite(scsi_ccb *request, uint64 lba, size_t sectorCount, bool
sata_request *sreq = new(std::nothrow) sata_request(request); sata_request *sreq = new(std::nothrow) sata_request(request);
if (fUse48BitCommands) { if (fUse48BitCommands) {
if (sectorCount > 65536) if (sectorCount > 65536) {
panic("ahci: ScsiReadWrite length too large, %lu sectors", sectorCount); panic("ahci: ScsiReadWrite length too large, %lu sectors",
sectorCount);
}
if (lba > MAX_SECTOR_LBA_48) if (lba > MAX_SECTOR_LBA_48)
panic("achi: ScsiReadWrite position too large for 48-bit LBA\n"); panic("achi: ScsiReadWrite position too large for 48-bit LBA\n");
sreq->set_ata48_cmd(isWrite ? 0x35 : 0x25, lba, sectorCount); sreq->set_ata48_cmd(isWrite ? 0x35 : 0x25, lba, sectorCount);
} else { } else {
if (sectorCount > 256) if (sectorCount > 256) {
panic("ahci: ScsiReadWrite length too large, %lu sectors", sectorCount); panic("ahci: ScsiReadWrite length too large, %lu sectors",
sectorCount);
}
if (lba > MAX_SECTOR_LBA_28) if (lba > MAX_SECTOR_LBA_28)
panic("achi: ScsiReadWrite position too large for normal LBA\n"); panic("achi: ScsiReadWrite position too large for normal LBA\n");
sreq->set_ata28_cmd(isWrite ? 0xca : 0xc8, lba, sectorCount); sreq->set_ata28_cmd(isWrite ? 0xca : 0xc8, lba, sectorCount);
@@ -735,20 +746,20 @@ AHCIPort::ExecuteSataRequest(sata_request *request, bool isWrite)
int prdEntrys; int prdEntrys;
if (request->ccb() && request->ccb()->data_length) if (request->ccb() && request->ccb()->data_length) {
FillPrdTable(fPRDTable, &prdEntrys, PRD_TABLE_ENTRY_COUNT, FillPrdTable(fPRDTable, &prdEntrys, PRD_TABLE_ENTRY_COUNT,
request->ccb()->sg_list, request->ccb()->sg_count, request->ccb()->sg_list, request->ccb()->sg_count,
request->ccb()->data_length); request->ccb()->data_length);
else if (request->data() && request->size()) } else if (request->data() && request->size()) {
FillPrdTable(fPRDTable, &prdEntrys, PRD_TABLE_ENTRY_COUNT, FillPrdTable(fPRDTable, &prdEntrys, PRD_TABLE_ENTRY_COUNT,
request->data(), request->size()); request->data(), request->size());
else } else
prdEntrys = 0; prdEntrys = 0;
FLOW("prdEntrys %d\n", prdEntrys); FLOW("prdEntrys %d\n", prdEntrys);
fCommandList->prdtl_flags_cfl = 0; fCommandList->prdtl_flags_cfl = 0;
fCommandList->cfl = 5; // 20 bytes, length in DWORDS fCommandList->cfl = 5; // 20 bytes, length in DWORDS
memcpy((char *)fCommandTable->cfis, request->fis(), 20); memcpy((char *)fCommandTable->cfis, request->fis(), 20);
fTestUnitReadyActive = request->is_test_unit_ready(); fTestUnitReadyActive = request->is_test_unit_ready();
@@ -760,7 +771,7 @@ AHCIPort::ExecuteSataRequest(sata_request *request, bool isWrite)
fCommandList->a = 1; fCommandList->a = 1;
} }
if (isWrite) if (isWrite)
fCommandList->w = 1; fCommandList->w = 1;
fCommandList->prdtl = prdEntrys; fCommandList->prdtl = prdEntrys;
fCommandList->prdbc = 0; fCommandList->prdbc = 0;
@@ -841,7 +852,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
default: default:
panic("CDB has invalid direction mask"); panic("CDB has invalid direction mask");
} }
// TRACE("AHCIPort::ScsiExecuteRequest ATAPI: port %d, opcode 0x%02x, length %u\n", fIndex, request->cdb[0], request->cdb_length); // TRACE("AHCIPort::ScsiExecuteRequest ATAPI: port %d, opcode 0x%02x, length %u\n", fIndex, request->cdb[0], request->cdb_length);
sata_request *sreq = new(std::nothrow) sata_request(request); sata_request *sreq = new(std::nothrow) sata_request(request);
@@ -865,7 +876,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
gSCSI->finished(request, 1); gSCSI->finished(request, 1);
return; return;
} }
request->subsys_status = SCSI_REQ_CMP; request->subsys_status = SCSI_REQ_CMP;
switch (request->cdb[0]) { switch (request->cdb[0]) {
@@ -885,7 +896,8 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
case SCSI_OP_WRITE_6: case SCSI_OP_WRITE_6:
{ {
scsi_cmd_rw_6 *cmd = (scsi_cmd_rw_6 *)request->cdb; scsi_cmd_rw_6 *cmd = (scsi_cmd_rw_6 *)request->cdb;
uint32 position = ((uint32)cmd->high_lba << 16) | ((uint32)cmd->mid_lba << 8) | (uint32)cmd->low_lba; uint32 position = ((uint32)cmd->high_lba << 16)
| ((uint32)cmd->mid_lba << 8) | (uint32)cmd->low_lba;
size_t length = cmd->length != 0 ? cmd->length : 256; size_t length = cmd->length != 0 ? cmd->length : 256;
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_6; bool isWrite = request->cdb[0] == SCSI_OP_WRITE_6;
ScsiReadWrite(request, position, length, isWrite); ScsiReadWrite(request, position, length, isWrite);
@@ -901,7 +913,8 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
if (length) { if (length) {
ScsiReadWrite(request, position, length, isWrite); ScsiReadWrite(request, position, length, isWrite);
} else { } else {
TRACE("AHCIPort::ScsiExecuteRequest error: transfer without data!\n"); TRACE("AHCIPort::ScsiExecuteRequest error: transfer without "
"data!\n");
request->subsys_status = SCSI_REQ_INVALID; request->subsys_status = SCSI_REQ_INVALID;
gSCSI->finished(request, 1); gSCSI->finished(request, 1);
} }
@@ -917,14 +930,16 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
if (length) { if (length) {
ScsiReadWrite(request, position, length, isWrite); ScsiReadWrite(request, position, length, isWrite);
} else { } else {
TRACE("AHCIPort::ScsiExecuteRequest error: transfer without data!\n"); TRACE("AHCIPort::ScsiExecuteRequest error: transfer without "
"data!\n");
request->subsys_status = SCSI_REQ_INVALID; request->subsys_status = SCSI_REQ_INVALID;
gSCSI->finished(request, 1); gSCSI->finished(request, 1);
} }
break; break;
} }
default: default:
TRACE("AHCIPort::ScsiExecuteRequest port %d unsupported request opcode 0x%02x\n", fIndex, request->cdb[0]); TRACE("AHCIPort::ScsiExecuteRequest port %d unsupported request "
"opcode 0x%02x\n", fIndex, request->cdb[0]);
request->subsys_status = SCSI_REQ_ABORTED; request->subsys_status = SCSI_REQ_ABORTED;
gSCSI->finished(request, 1); gSCSI->finished(request, 1);
} }
@@ -952,13 +967,14 @@ AHCIPort::ScsiResetDevice()
return SCSI_REQ_CMP; return SCSI_REQ_CMP;
} }
void void
AHCIPort::ScsiGetRestrictions(bool *isATAPI, bool *noAutoSense, uint32 *maxBlocks) AHCIPort::ScsiGetRestrictions(bool *isATAPI, bool *noAutoSense,
uint32 *maxBlocks)
{ {
*isATAPI = fIsATAPI; *isATAPI = fIsATAPI;
*noAutoSense = fIsATAPI; // emulated auto sense for ATA, but not ATAPI *noAutoSense = fIsATAPI; // emulated auto sense for ATA, but not ATAPI
*maxBlocks = fUse48BitCommands ? 65536 : 256; *maxBlocks = fUse48BitCommands ? 65536 : 256;
TRACE("AHCIPort::ScsiGetRestrictions port %d: isATAPI %d, noAutoSense %d, maxBlocks %lu\n", TRACE("AHCIPort::ScsiGetRestrictions port %d: isATAPI %d, noAutoSense %d, "
fIndex, *isATAPI, *noAutoSense, *maxBlocks); "maxBlocks %lu\n", fIndex, *isATAPI, *noAutoSense, *maxBlocks);
} }
src/add-ons/kernel/busses/scsi/ahci/sata_request.cpp
+26 -26
View File
@@ -3,28 +3,33 @@
* Distributed under the terms of the MIT License. * Distributed under the terms of the MIT License.
*/ */
#include "sata_request.h"
#include "scsi_cmds.h"
#include <string.h> #include <string.h>
#include "sata_request.h"
#include "scsi_cmds.h"
sata_request::sata_request() sata_request::sata_request()
: fCcb(NULL) :
, fIsATAPI(false) fCcb(NULL),
, fCompletionSem(create_sem(0, "sata completion")) fIsATAPI(false),
, fCompletionStatus(0) fCompletionSem(create_sem(0, "sata completion")),
, fData(NULL) fCompletionStatus(0),
, fDataSize(0) fData(NULL),
fDataSize(0)
{ {
} }
sata_request::sata_request(scsi_ccb *ccb) sata_request::sata_request(scsi_ccb *ccb)
: fCcb(ccb) :
, fIsATAPI(false) fCcb(ccb),
, fCompletionSem(-1) fIsATAPI(false),
, fCompletionStatus(0) fCompletionSem(-1),
, fData(NULL) fCompletionStatus(0),
, fDataSize(0) fData(NULL),
fDataSize(0)
{ {
} }
@@ -67,7 +72,7 @@ sata_request::set_ata28_cmd(uint8 command, uint32 lba, uint8 sectorCount)
} }
void void
sata_request::set_ata48_cmd(uint8 command, uint64 lba, uint16 sectorCount) sata_request::set_ata48_cmd(uint8 command, uint64 lba, uint16 sectorCount)
{ {
set_ata_cmd(command); set_ata_cmd(command);
@@ -122,13 +127,14 @@ sata_request::finish(int tfd, size_t bytesTransfered)
fCcb->subsys_status = SCSI_REQ_CMP_ERR; fCcb->subsys_status = SCSI_REQ_CMP_ERR;
if (fIsATAPI) { if (fIsATAPI) {
if (!is_test_unit_ready()) { if (!is_test_unit_ready()) {
dprintf("ahci: sata_request::finish ATAPI packet %02x %02x %02x %02x " dprintf("ahci: sata_request::finish ATAPI packet %02x %02x "
"%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x (len %d)\n", "%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x "
"%02x %02x %02x %02x (len %d)\n",
fCcb->cdb[0], fCcb->cdb[1], fCcb->cdb[2], fCcb->cdb[3], fCcb->cdb[0], fCcb->cdb[1], fCcb->cdb[2], fCcb->cdb[3],
fCcb->cdb[4], fCcb->cdb[5], fCcb->cdb[6], fCcb->cdb[7], fCcb->cdb[4], fCcb->cdb[5], fCcb->cdb[6], fCcb->cdb[7],
fCcb->cdb[8], fCcb->cdb[9], fCcb->cdb[10], fCcb->cdb[11], fCcb->cdb[8], fCcb->cdb[9], fCcb->cdb[10],
fCcb->cdb[12], fCcb->cdb[13], fCcb->cdb[14], fCcb->cdb[15], fCcb->cdb[11], fCcb->cdb[12], fCcb->cdb[13],
fCcb->cdb_length); fCcb->cdb[14], fCcb->cdb[15], fCcb->cdb_length);
} }
fCcb->device_status = SCSI_STATUS_CHECK_CONDITION; fCcb->device_status = SCSI_STATUS_CHECK_CONDITION;
@@ -189,9 +195,3 @@ sata_request::completition_status()
if (fCcb) panic("wrong usage"); if (fCcb) panic("wrong usage");
return fCompletionStatus; return fCompletionStatus;
} }