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more NV40 arch stuff for the acc engine (not yet working)

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10596 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2005-01-06 19:13:39 +00:00
parent e25d0ac8e6
commit a3d7b2a4ad
1 changed files with 61 additions and 9 deletions
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src/add-ons/accelerants/nvidia/engine/nv_acc.c
+57 -5
View File
@@ -465,13 +465,23 @@ status_t nv_acc_init()
} }
if (si->ps.card_arch >= NV20A) if (si->ps.card_arch >= NV20A)
{ {
/* fixme(?): assuming more BLIMIT registers here: Then how about BBASE6-9? if (si->ps.card_type > NV40)
* (linux fixed value 'BLIMIT6-9' 0x01ffffff) */ {
ACCW(NV40P_BLIMIT6, (si->ps.memory_size - 1));
ACCW(NV40P_BLIMIT7, (si->ps.memory_size - 1));
}
else
{
/* fixme(?): assuming more BLIMIT registers here: Then how about BBASE6-9? */
ACCW(NV20_BLIMIT6, (si->ps.memory_size - 1)); ACCW(NV20_BLIMIT6, (si->ps.memory_size - 1));
ACCW(NV20_BLIMIT7, (si->ps.memory_size - 1)); ACCW(NV20_BLIMIT7, (si->ps.memory_size - 1));
if (si->ps.card_type < NV40)
{
ACCW(NV20_BLIMIT8, (si->ps.memory_size - 1)); ACCW(NV20_BLIMIT8, (si->ps.memory_size - 1));
ACCW(NV20_BLIMIT9, (si->ps.memory_size - 1)); ACCW(NV20_BLIMIT9, (si->ps.memory_size - 1));
} }
}
}
/* disable all acceleration engine INT reguests */ /* disable all acceleration engine INT reguests */
ACCW(ACC_INTE, 0x00000000); ACCW(ACC_INTE, 0x00000000);
@@ -687,7 +697,6 @@ status_t nv_acc_init()
break; break;
case NV20A: case NV20A:
case NV30A: case NV30A:
case NV40A:
/* location of active screen in framebuffer */ /* location of active screen in framebuffer */
ACCW(NV20_OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); ACCW(NV20_OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
ACCW(NV20_OFFSET1, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); ACCW(NV20_OFFSET1, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
@@ -700,6 +709,34 @@ status_t nv_acc_init()
ACCW(NV20_PITCH2, (si->fbc.bytes_per_row & 0x0000ffff)); ACCW(NV20_PITCH2, (si->fbc.bytes_per_row & 0x0000ffff));
ACCW(NV20_PITCH3, (si->fbc.bytes_per_row & 0x0000ffff)); ACCW(NV20_PITCH3, (si->fbc.bytes_per_row & 0x0000ffff));
break; break;
case NV40A:
if (si->ps.card_type == NV40)
{
/* location of active screen in framebuffer */
ACCW(NV20_OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
ACCW(NV20_OFFSET1, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
//ACCW(NV20_OFFSET2, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
//ACCW(NV20_OFFSET3, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
/* setup buffer pitch */
//fixme?
ACCW(NV20_PITCH0, (si->fbc.bytes_per_row & 0x0000ffff));
ACCW(NV20_PITCH1, (si->fbc.bytes_per_row & 0x0000ffff));
ACCW(NV20_PITCH2, (si->fbc.bytes_per_row & 0x0000ffff));
ACCW(NV20_PITCH3, (si->fbc.bytes_per_row & 0x0000ffff));
}
else
{
/* location of active screen in framebuffer */
ACCW(NV40P_OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
ACCW(NV40P_OFFSET1, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer));
/* setup buffer pitch */
//fixme?
ACCW(NV40P_PITCH0, (si->fbc.bytes_per_row & 0x0000ffff));
ACCW(NV40P_PITCH1, (si->fbc.bytes_per_row & 0x0000ffff));
}
break;
} }
/*** setup tile and pipe stuff ***/ /*** setup tile and pipe stuff ***/
@@ -724,8 +761,23 @@ status_t nv_acc_init()
if (si->ps.card_arch >= NV20A) if (si->ps.card_arch >= NV20A)
{ {
/* unknown: */ /* unknown: */
ACCW(NV20_WHAT0, ACCR(NV20_FBWHAT0)); if (si->ps.card_type > NV40)
ACCW(NV20_WHAT1, ACCR(NV20_FBWHAT1)); {
ACCW(NV40P_WHAT_T0, ACCR(NV20_FBWHAT0));
ACCW(NV40P_WHAT_T1, ACCR(NV20_FBWHAT1));
ACCW(NV40P_WHAT_T2, ACCR(NV20_FBWHAT0));
ACCW(NV40P_WHAT_T3, ACCR(NV20_FBWHAT1));
}
else
{
ACCW(NV20_WHAT_T0, ACCR(NV20_FBWHAT0));
ACCW(NV20_WHAT_T1, ACCR(NV20_FBWHAT1));
if (si->ps.card_type == NV40)
{
ACCW(NV40_WHAT_T2, ACCR(NV20_FBWHAT0));
ACCW(NV40_WHAT_T3, ACCR(NV20_FBWHAT1));
}
}
} }
/* tile 0: */ /* tile 0: */
/* tile invalid, tile adress = $00000 (18bit) */ /* tile invalid, tile adress = $00000 (18bit) */