arm: Add 8250 omap variant uart driver

* Untested, someone with an omap3,4,5 could though.
This commit is contained in:
Alexander von Gluck IV
2017-11-20 09:16:58 -06:00
parent 0835170c80
commit a42249db2d
5 changed files with 95 additions and 1 deletions
@@ -34,6 +34,7 @@ public:
extern DebugUART8250 *arch_get_uart_8250(addr_t base, int64 clock);
extern DebugUART8250 *arch_get_uart_8250_omap(addr_t base, int64 clock);
#endif /* _KERNEL_ARCH_DEBUG_UART_8250_H */
+8 -1
View File
@@ -30,15 +30,22 @@ local kernelDebugSources =
;
BootMergeObject boot_arch_$(TARGET_KERNEL_ARCH).o :
# Serial UART Drivers
debug_uart_8250.cpp
arch_uart_8250.cpp
arch_uart_8250_omap.cpp
arch_uart_pl011.cpp
arch_elf.cpp
# Framebuffer Drivers
arch_framebuffer_920.cpp
arch_framebuffer_bcm2835.cpp
arch_framebuffer_pxa.cpp
arch_framebuffer_omap3.cpp
# Mailbox drivers
arch_mailbox_bcm2835.cpp
arch_elf.cpp
arch_cpu.cpp
arch_mmu.cpp
arch_start_kernel.S
+3
View File
@@ -25,8 +25,11 @@ KernelMergeObject kernel_arch_arm.o :
arch_vm.cpp
arch_vm_translation_map.cpp
arch_asm.S
# Serial UART and drivers
debug_uart_8250.cpp
arch_uart_8250.cpp
arch_uart_8250_omap.cpp
arch_uart_pl011.cpp
arch_atomic64.cpp
@@ -0,0 +1,78 @@
/*
* Copyright 2011-2012 Haiku, Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*
* Authors:
* François Revol, [email protected]
*/
#include <arch/arm/reg.h>
#include <arch/generic/debug_uart_8250.h>
#include <debug.h>
#include <omap3.h>
#include <new>
class ArchUART8250Omap : public DebugUART8250 {
public:
ArchUART8250Omap(addr_t base, int64 clock);
~ArchUART8250Omap();
void InitEarly();
// ARM MMIO: on ARM the UART regs are aligned on 32bit
virtual void Out8(int reg, uint8 value);
virtual uint8 In8(int reg);
};
ArchUART8250Omap::ArchUART8250Omap(addr_t base, int64 clock)
:
DebugUART8250(base, clock)
{
}
ArchUART8250Omap::~ArchUART8250Omap()
{
}
void
ArchUART8250Omap::InitEarly()
{
// Perform special hardware UART configuration
/* UART1 */
RMWREG32(CM_FCLKEN1_CORE, 13, 1, 1);
RMWREG32(CM_ICLKEN1_CORE, 13, 1, 1);
/* UART2 */
RMWREG32(CM_FCLKEN1_CORE, 14, 1, 1);
RMWREG32(CM_ICLKEN1_CORE, 14, 1, 1);
/* UART3 */
RMWREG32(CM_FCLKEN_PER, 11, 1, 1);
RMWREG32(CM_ICLKEN_PER, 11, 1, 1);
}
void
ArchUART8250Omap::Out8(int reg, uint8 value)
{
*((uint8 *)Base() + reg * sizeof(uint32)) = value;
}
uint8
ArchUART8250Omap::In8(int reg)
{
return *((uint8 *)Base() + reg * sizeof(uint32));
}
DebugUART8250 *arch_get_uart_8250_omap(addr_t base, int64 clock)
{
static char buffer[sizeof(ArchUART8250Omap)];
ArchUART8250Omap *uart = new(buffer) ArchUART8250Omap(base, clock);
return uart;
}
@@ -102,6 +102,11 @@ debug_uart_from_fdt(const void *fdt)
TRACE(("serial: Found 8250 serial UART!\n"));
uart = arch_get_uart_8250(regs, clock);
#ifdef __ARM__
} else if (fdt_node_check_compatible(fdt, node, "ti,omap3-uart") == 0
|| fdt_node_check_compatible(fdt, node, "ti,omap4-uart") == 0
|| fdt_node_check_compatible(fdt, node, "ti,omap5-uart") == 0) {
TRACE(("serial: Found omap 8250 serial UART!\n"));
uart = arch_get_uart_8250_omap(regs, clock);
} else if (fdt_node_check_compatible(fdt, node, "arm,pl011") == 0
|| fdt_node_check_compatible(fdt, node, "arm,primecell") == 0) {
TRACE(("serial: Found pl011 serial UART!\n"));