updated DPMS programming to be compatible with secondary TVout modes.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14662 a95241bf-73f2-0310-859d-f6bbb57e9c96

src/add-ons/accelerants/nvidia/ProposeDisplayMode.c

@@ -4,7 +4,7 @@
 
 	Other authors for NV driver:
 	Mark Watson,
-	Rudolf Cornelissen 9/2002-10/2005
+	Rudolf Cornelissen 9/2002-11/2005
 */
 
 #define MODULE_BIT 0x00400000

src/add-ons/accelerants/nvidia/SetDisplayMode.c

@@ -6,7 +6,7 @@
 	Other authors:
 	Mark Watson,
 	Apsed,
-	Rudolf Cornelissen 11/2002-10/2005
+	Rudolf Cornelissen 11/2002-11/2005
 */
 
 #define MODULE_BIT 0x00200000
@@ -520,33 +520,63 @@ status_t SET_DPMS_MODE(uint32 dpms_flags)
 	}
 
 	/* CRTC used for TVout needs specific DPMS programming */
-	//fixme: assuming tvout is on head1, while head assignment is straight!!
 	if (si->dm.flags & TV_BITS)
 	{
-		LOG(4,("SET_DPMS_MODE: tuning DPMS settings for TVout compatibility\n"));
+		if (si->dm.flags & TV_PRIMARY)
-
-		if (!(si->settings.vga_on_tv))
 		{
-			/* block VGA output on head displaying on TV */
+			LOG(4,("SET_DPMS_MODE: tuning primary head DPMS settings for TVout compatibility\n"));
-			/* Note:
+
-			 * this specific sync setting is required: Vsync is used to keep TVout
+			if (!(si->settings.vga_on_tv))
-			 * synchronized to the CRTC 'vertically' (otherwise 'rolling' occurs).
+			{
-			 * This leaves Hsync only for shutting off the VGA screen. */
+				/* block VGA output on head displaying on TV */
-			h1h = false;
+				/* Note:
-			h1v = true;
+				 * this specific sync setting is required: Vsync is used to keep TVout
+				 * synchronized to the CRTC 'vertically' (otherwise 'rolling' occurs).
+				 * This leaves Hsync only for shutting off the VGA screen. */
+				h1h = false;
+				h1v = true;
+			}
+			else
+			{
+				/* when concurrent VGA is used alongside TVout on a head, DPMS is safest
+				 * applied this way: Vsync is needed for stopping TVout successfully when
+				 * a (new) modeswitch occurs.
+				 * (see routine BT_stop_tvout() in nv_brooktreetv.c) */
+				/* Note:
+				 * applying 'normal' DPMS here and forcing Vsync on in the above mentioned
+				 * routine seems to not always be enough: sometimes image generation will
+				 * not resume in that case. */
+				h1h = display;
+				h1v = true;
+			}
 		}
 		else
 		{
-			/* when concurrent VGA is used alongside TVout on a head, DPMS is safest
+			LOG(4,("SET_DPMS_MODE: tuning secondary head DPMS settings for TVout compatibility\n"));
-			 * applied this way: Vsync is needed for stopping TVout successfully when
+
-			 * a (new) modeswitch occurs.
+			if (!(si->settings.vga_on_tv))
-			 * (see routine BT_stop_tvout() in nv_brooktreetv.c) */
+			{
-			/* Note:
+				/* block VGA output on head displaying on TV */
-			 * applying 'normal' DPMS here and forcing Vsync on in the above mentioned
+				/* Note:
-			 * routine seems to not always be enough: sometimes image generation will
+				 * this specific sync setting is required: Vsync is used to keep TVout
-			 * not resume in that case. */
+				 * synchronized to the CRTC 'vertically' (otherwise 'rolling' occurs).
-			h1h = display;
+				 * This leaves Hsync only for shutting off the VGA screen. */
-			h1v = true;
+				h2h = false;
+				h2v = true;
+			}
+			else
+			{
+				/* when concurrent VGA is used alongside TVout on a head, DPMS is safest
+				 * applied this way: Vsync is needed for stopping TVout successfully when
+				 * a (new) modeswitch occurs.
+				 * (see routine BT_stop_tvout() in nv_brooktreetv.c) */
+				/* Note:
+				 * applying 'normal' DPMS here and forcing Vsync on in the above mentioned
+				 * routine seems to not always be enough: sometimes image generation will
+				 * not resume in that case. */
+				h2h = display;
+				h2v = true;
+			}
 		}
 	}
 

src/add-ons/accelerants/nvidia/engine/nv_brooktreetv.c

@@ -1,6 +1,6 @@
 /*
 	Author:
-	Rudolf Cornelissen 4/2002-10/2005
+	Rudolf Cornelissen 4/2002-11/2005
 */
 
 #define MODULE_BIT 0x00100000
@@ -1581,24 +1581,9 @@ static status_t BT_update_mode_for_gpu(display_mode *target, uint8 tvmode)
 static status_t BT_start_tvout(display_mode tv_target)
 {
 	if (tv_target.flags & TV_PRIMARY)
-	{
-		if (si->ps.secondary_head)
-		{
-			/* switch TV encoder to CRTC1 */
-			NV_REG32(NV32_2FUNCSEL) &= ~0x00000100;
-			NV_REG32(NV32_FUNCSEL) |= 0x00000100;
-		}
-
 		nv_crtc_start_tvout();
-	}
 	else
-	{
-		/* switch TV encoder to CRTC2 */
-		NV_REG32(NV32_FUNCSEL) &= ~0x00000100;
-		NV_REG32(NV32_2FUNCSEL) |= 0x00000100;
-
 		nv_crtc2_start_tvout();
-	}
 
 	return B_OK;
 }//end BT_start_tvout.

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

@@ -1,6 +1,6 @@
 /* CTRC functionality */
 /* Author:
-   Rudolf Cornelissen 11/2002-10/2005
+   Rudolf Cornelissen 11/2002-11/2005
 */
 
 #define MODULE_BIT 0x00040000
@@ -978,6 +978,13 @@ status_t nv_crtc_start_tvout(void)
 {
 	LOG(4,("CRTC: starting TV output\n"));
 
+	if (si->ps.secondary_head)
+	{
+		/* switch TV encoder to CRTC1 */
+		NV_REG32(NV32_2FUNCSEL) &= ~0x00000100;
+		NV_REG32(NV32_FUNCSEL) |= 0x00000100;
+	}
+
 	/* enable access to primary head */
 	set_crtc_owner(0);
 

src/add-ons/accelerants/nvidia/engine/nv_crtc2.c

@@ -1,6 +1,6 @@
 /* second CTRC functionality for GeForce cards */
 /* Author:
-   Rudolf Cornelissen 11/2002-10/2005
+   Rudolf Cornelissen 11/2002-11/2005
 */
 
 #define MODULE_BIT 0x00020000
@@ -825,6 +825,10 @@ status_t nv_crtc2_start_tvout(void)
 {
 	LOG(4,("CRTC2: starting TV output\n"));
 
+	/* switch TV encoder to CRTC2 */
+	NV_REG32(NV32_FUNCSEL) &= ~0x00000100;
+	NV_REG32(NV32_2FUNCSEL) |= 0x00000100;
+
 	/* enable access to secondary head */
 	set_crtc_owner(1);