From a82d70c719127aa8511903f3036b24d60192bb67 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Axel=20D=C3=B6rfler?= Date: Tue, 2 Oct 2007 17:40:05 +0000 Subject: [PATCH] Fixed PLL clock for i8xx chips again. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22415 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/intel_extreme/mode.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/add-ons/accelerants/intel_extreme/mode.cpp b/src/add-ons/accelerants/intel_extreme/mode.cpp index 21c7950739..2e0258bd48 100644 --- a/src/add-ons/accelerants/intel_extreme/mode.cpp +++ b/src/add-ons/accelerants/intel_extreme/mode.cpp @@ -529,7 +529,7 @@ if (first) { if ((gInfo->shared_info->device_type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_965) pll |= 6 << DISPLAY_PLL_PULSE_PHASE_SHIFT; } else { - if (divisors.post2_high) + if (!divisors.post2_high) pll |= DISPLAY_PLL_DIVIDE_4X; pll |= DISPLAY_PLL_2X_CLOCK;