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pci: memory behind bridge wasn't padded correctly.

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This commit is contained in:
Jérôme Duval
2013-06-26 22:27:56 +02:00
parent b9a31d3e18
commit a83b0c51c0
1 changed files with 1 additions and 1 deletions
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src/add-ons/kernel/bus_managers/pci/pci_info.cpp
+1 -1
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@@ -48,7 +48,7 @@ print_pci2pci_bridge_info(const pci_info *info, bool verbose)
uint32 memory_base = ((uint32)info->u.h1.memory_base & 0xfff0) << 16; uint32 memory_base = ((uint32)info->u.h1.memory_base & 0xfff0) << 16;
uint32 memory_limit = (((uint32)info->u.h1.memory_limit & 0xfff0) << 16) uint32 memory_limit = (((uint32)info->u.h1.memory_limit & 0xfff0) << 16)
+ 0xfffff; + 0xfffff;
TRACE(("PCI: memory window %04" B_PRIx32 "-%04" B_PRIx32 "\n", TRACE(("PCI: memory window %08" B_PRIx32 "-%08" B_PRIx32 "\n",
memory_base, memory_limit)); memory_base, memory_limit));
uint64 prefetchable_memory_base = uint64 prefetchable_memory_base =
((uint32)info->u.h1.prefetchable_memory_base & 0xfff0) << 16; ((uint32)info->u.h1.prefetchable_memory_base & 0xfff0) << 16;