diff --git a/src/system/kernel/arch/x86/arch_cpu.c b/src/system/kernel/arch/x86/arch_cpu.c
index 9b848ce4e9..c1405b7ea0 100644
--- a/src/system/kernel/arch/x86/arch_cpu.c
+++ b/src/system/kernel/arch/x86/arch_cpu.c
@@ -44,6 +44,17 @@ x86_get_main_tss(void)
 }
 
 
+static void
+load_tss(void *data, int cpu)
+{
+	short seg = ((TSS_BASE_SEGMENT + cpu) << 3) | DPL_KERNEL;
+	asm("movw  %0, %%ax;"
+		"ltr %%ax;" : : "r" (seg) : "eax");
+
+	sIsTSSLoaded[cpu] = true;
+}
+
+
 static void
 init_double_fault(int cpuNum)
 {
@@ -158,15 +169,9 @@ arch_cpu_init_post_vm(kernel_args *args)
 		// initialize TSS
 		init_double_fault(i);
 	}
-	
-	/* TODO: Axel - call on all CPUs */
-	{
-		short seg = ((TSS_BASE_SEGMENT + 0) << 3) | DPL_KERNEL;
-		asm("movw  %0, %%ax;"
-			"ltr %%ax;" : : "r" (seg) : "eax");
-		sIsTSSLoaded[0] = true;
-	}
-	
+
+	call_all_cpus(&load_tss, NULL);
+
 	x86_set_task_gate(8, DOUBLE_FAULT_TSS_BASE_SEGMENT << 3);
 
 	// setup TLS descriptors (one for every CPU)
@@ -175,7 +180,7 @@ arch_cpu_init_post_vm(kernel_args *args)
 		set_segment_descriptor(&gGDT[TLS_BASE_SEGMENT + i], 0, TLS_SIZE,
 			DT_DATA_WRITEABLE, DPL_USER);
 	}
-	
+
 	return B_OK;
 }