From ab29dee1ed8775e78fbc93fd1e193fa8c5ff08da Mon Sep 17 00:00:00 2001
From: Alexander von Gluck IV <kallisti5@unixzen.com>
Date: Thu, 16 Jun 2011 15:24:08 +0000
Subject: [PATCH] A few style fixes, no functional change

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42207 a95241bf-73f2-0310-859d-f6bbb57e9c96
---
 src/add-ons/accelerants/radeon_hd/dac.cpp | 15 ++++++++++-----
 src/add-ons/accelerants/radeon_hd/dac.h   |  2 +-
 src/add-ons/accelerants/radeon_hd/pll.cpp |  6 ++++--
 3 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/src/add-ons/accelerants/radeon_hd/dac.cpp b/src/add-ons/accelerants/radeon_hd/dac.cpp
index b72092ae7c..68cf4d8532 100644
--- a/src/add-ons/accelerants/radeon_hd/dac.cpp
+++ b/src/add-ons/accelerants/radeon_hd/dac.cpp
@@ -73,15 +73,18 @@ DACGetElectrical(uint8 type, uint8 dac,
 		while (list[i].pciIdMin != 0) {
 			if (list[i].pciIdMin <= info.device_id
 				&& list[i].pciIdMax >= info.device_id) {
-				if (*bandgap == 0) *bandgap = list[i].bandgap[dac][type];
-				if (*whitefine == 0) *whitefine = list[i].whitefine[dac][type];
+				if (*bandgap == 0)
+					*bandgap = list[i].bandgap[dac][type];
+				if (*whitefine == 0)
+					*whitefine = list[i].whitefine[dac][type];
 				break;
 			}
 			i++;
 		}
-		if (list[i].pciIdMin != 0)
+		if (list[i].pciIdMin != 0) {
 			TRACE("%s: found new BandGap / WhiteFine in table for card!\n",
 				__func__);
+		}
 	}
 }
 
@@ -99,8 +102,10 @@ DACSet(uint8 dacIndex, uint32 crtid)
 	DACGetElectrical(standard, dacIndex, &bandGap, &whiteFine);
 
 	uint32 mask = 0;
-	if (bandGap) mask |= 0xFF << 16;
-	if (whiteFine) mask |= 0xFF << 8;
+	if (bandGap)
+		mask |= 0xFF << 16;
+	if (whiteFine)
+		mask |= 0xFF << 8;
 
 	uint32 dacOffset = (dacIndex == 1) ? REG_DACB_OFFSET : REG_DACA_OFFSET;
 
diff --git a/src/add-ons/accelerants/radeon_hd/dac.h b/src/add-ons/accelerants/radeon_hd/dac.h
index 4fb485d6d6..daccd93713 100644
--- a/src/add-ons/accelerants/radeon_hd/dac.h
+++ b/src/add-ons/accelerants/radeon_hd/dac.h
@@ -5,10 +5,10 @@
  * Authors:
  *      Alexander von Gluck, kallisti5@unixzen.com
  */
-
 #ifndef RADEON_HD_DAC_H
 #define RADEON_HD_DAC_H
 
+
 // DAC Offsets
 #define REG_DACA_OFFSET 0
 #define REG_DACB_OFFSET 0x200
diff --git a/src/add-ons/accelerants/radeon_hd/pll.cpp b/src/add-ons/accelerants/radeon_hd/pll.cpp
index 5297ea887d..0ca072424f 100644
--- a/src/add-ons/accelerants/radeon_hd/pll.cpp
+++ b/src/add-ons/accelerants/radeon_hd/pll.cpp
@@ -55,9 +55,10 @@ PLLControlTable(struct PLL_Control *table, uint16 feedbackDivider)
 {
 	int i;
 
-	for (i = 0; table[i].feedbackDivider < 0xFFFF ; i++)
+	for (i = 0; table[i].feedbackDivider < 0xFFFF ; i++) {
 		if (table[i].feedbackDivider >= feedbackDivider)
 			break;
+	}
 
 	return table[i].control;
 }
@@ -445,9 +446,10 @@ PLLCalibrate(uint8 pllIndex)
 
 	int i;
 
-	for (i = 0; i < PLL_CALIBRATE_WAIT; i++)
+	for (i = 0; i < PLL_CALIBRATE_WAIT; i++) {
 		if (((Read32(PLL, pllControlReg) >> 20) & 0x03) == 0x03)
 			break;
+	}
 
 	if (i >= PLL_CALIBRATE_WAIT) {
 		if (Read32(PLL, pllControlReg) & 0x00100000) /* Calibration done? */