diff --git a/src/add-ons/accelerants/nvidia/engine/nv_globals.c b/src/add-ons/accelerants/nvidia/engine/nv_globals.c index bf29cbf4a0..af3fb8c8a6 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_globals.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_globals.c @@ -3,7 +3,8 @@ This file may be used under the terms of the Be Sample Code License. Other authors: - Mark Watson + Mark Watson, + Rudolf Cornelissen 8/2004 */ #include "nv_std.h" @@ -24,3 +25,11 @@ nv_get_set_pci nv_pci_access= 4, 0 }; + +nv_in_out_isa nv_isa_access= + { + NV_PRIVATE_DATA_MAGIC, + 0, + 1, + 0 + }; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_globals.h b/src/add-ons/accelerants/nvidia/engine/nv_globals.h index a91f10dc61..5afab87516 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_globals.h +++ b/src/add-ons/accelerants/nvidia/engine/nv_globals.h @@ -8,6 +8,7 @@ extern area_id my_mode_list_area; extern int accelerantIsClone; extern nv_get_set_pci nv_pci_access; +extern nv_in_out_isa nv_isa_access; typedef status_t (*crtc_validate_timing)(uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*, uint16*); diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c index f976b0b524..a17389881a 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_info.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c @@ -413,14 +413,12 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size) adress += 1; LOG(8,("cmd 'RD 8bit ISA I/O REG $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n", reg, and_out, or_in)); - //fixme? this is for ISA I/O registers. Looks like they are in mapped range - // as well (confirm or update code!) if (exec) { - byte = NV_REG8(/*0x00601000 + */reg); + byte = ISARB(reg); byte &= (uint8)and_out; byte |= (uint8)or_in; - NV_REG8(/*0x00601000 + */reg) = byte; + ISAWB(reg, byte); } break; case 0x6e: @@ -521,17 +519,15 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size) adress += 1; LOG(8,("cmd 'RD 8bit idx ISA I/O REG $%02x via $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n", index, reg, and_out, or_in)); - //fixme? this is for ISA I/O registers. Looks like they are in mapped range - // as well (confirm or update code!) if (exec) { - safe = NV_REG8(/*0x00601000 + */reg); - NV_REG8(/*0x00601000 + */reg) = index; - byte = NV_REG8(/*0x00601000 + */reg + 1); + safe = ISARB(reg); + ISAWB(reg, index); + byte = ISARB(reg + 1); byte &= (uint8)and_out; byte |= (uint8)or_in; - NV_REG8(/*0x00601000 + */reg + 1) = byte; - NV_REG8(/*0x00601000 + */reg) = safe; + ISAWB((reg + 1), byte); + ISAWB(reg, safe); } break; case 0x79: