diff --git a/src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp b/src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp index eb3cb06704..9c1309508f 100644 --- a/src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp +++ b/src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp @@ -50,7 +50,7 @@ typedef struct { pci_device* device; bool virtio1; addr_t base_addr; - area_id registersArea[4]; + area_id registersArea[6]; addr_t commonCfgAddr; addr_t isrAddr; addr_t notifyAddr; @@ -672,22 +672,25 @@ init_bus(device_node* node, void** bus_cookie) if (deviceCfgFound && deviceCap.length > 0) bars[deviceCap.bar] = max_c(bars[deviceCap.bar], deviceCap.offset + deviceCap.length); - int index = 0; - addr_t registers[6] = {0}; - for (int i = 0; i < 6; i++) { - if (bars[i] == 0) + size_t index = 0; + addr_t registers[B_COUNT_OF(bars)] = {0}; + for (size_t i = 0; i < B_COUNT_OF(bars); i++, index++) { + if (bars[index] == 0) { + bus->registersArea[index] = -1; continue; + } phys_addr_t barAddr = pciInfo->u.h0.base_registers[i]; size_t barSize = pciInfo->u.h0.base_register_sizes[i]; - if ((pciInfo->u.h0.base_register_flags[i] & PCI_address_type) == PCI_address_type_64) { - barAddr |= (uint64)pciInfo->u.h0.base_registers[i + 1] << 32; - barSize |= (uint64)pciInfo->u.h0.base_register_sizes[i + 1] << 32; + if ((pciInfo->u.h0.base_register_flags[i] & PCI_address_type) == PCI_address_type_64 + && i < (B_COUNT_OF(bars) - 1)) { + i++; + barAddr |= (uint64)pciInfo->u.h0.base_registers[i] << 32; + barSize |= (uint64)pciInfo->u.h0.base_register_sizes[i] << 32; } - bus->registersArea[i] = map_physical_memory("Virtio PCI memory mapped registers", + bus->registersArea[index] = map_physical_memory("Virtio PCI memory mapped registers", barAddr, barSize, B_ANY_KERNEL_ADDRESS, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, - (void **)®isters[i]); - index++; + (void**)®isters[index]); } bus->commonCfgAddr = registers[common.bar] + common.offset;