diff --git a/headers/private/kernel/arch/m68k/arch_040_mmu.h b/headers/private/kernel/arch/m68k/arch_040_mmu.h
index 115833b984..e5827f6ad9 100644
--- a/headers/private/kernel/arch/m68k/arch_040_mmu.h
+++ b/headers/private/kernel/arch/m68k/arch_040_mmu.h
@@ -65,22 +65,55 @@ struct short_indirect_entry {
    - the 3rd level is a "page table" as on x86. (pgtbl)
 */
 
-typedef struct short_page_directory_entry page_root_entry;
-typedef struct short_page_directory_entry page_directory_entry;
-typedef struct short_page_table_entry page_table_entry;
-typedef struct short_indirect_entry page_indirect_entry;
+/* struct types suffixed with _s */
+typedef struct short_page_directory_entry page_root_entry_s;
+typedef struct short_page_directory_entry page_directory_entry_s;
+typedef struct short_page_table_entry page_table_entry_s;
+typedef struct short_indirect_entry page_indirect_entry_s;
 
 /* scalar storage type that maps them */
-typedef uint32 page_root_entry_scalar;
-typedef uint32 page_directory_entry_scalar;
-typedef uint32 page_table_entry_scalar;
-typedef uint32 page_indirect_entry_scalar;
+typedef uint32 page_root_entry;
+typedef uint32 page_directory_entry;
+typedef uint32 page_table_entry;
+typedef uint32 page_indirect_entry;
 
 #define DT_ROOT DT_VALID_4
 #define DT_DIR DT_VALID_4
 //#define DT_PAGE DT_PAGE :)
 #define DT_INDIRECT DT_VALID_4
 
+/* bitmask access */
+
+/* those are valid for all entries */
+#define M68K_PE_READONLY			0x00000004
+#define M68K_PE_ACCESSED			0x00000008
+
+#define M68K_PRE_READONLY		T	M68K_PE_READONLY
+#define M68K_PRE_ACCESSED			M68K_PE_ACCESSED
+#define M68K_PRE_ADDRESS_MASK		0xfffffff0
+
+#define M68K_PDE_READONLY			M68K_PE_READONLY
+#define M68K_PDE_ACCESSED			M68K_PE_ACCESSED
+#define M68K_PDE_ADDRESS_MASK		0xfffffff0
+
+#define M68K_PTE_READONLY			M68K_PE_READONLY
+#define M68K_PTE_ACCESSED			M68K_PE_ACCESSED
+#define M68K_PTE_DIRTY				0x00000010
+#define M68K_PTE_CACHE_MODE_MASK	0x00000060
+#define M68K_PTE_CACHE_MODE_SHIFT	5
+
+#define M68K_PTE_SUPERVISOR			0x00000080
+#define M68K_PTE_UPA1				0x00000100
+#define M68K_PTE_UPA0				0x00000200
+#define M68K_PTE_GLOBAL				0x00000400
+#define M68K_PTE_USER_RESERVED		0x00000800
+#define M68K_PTE_ADDRESS_MASK		0xfffff000
+
+
+#define M68K_PIE_ADDRESS_MASK		0xfffffffc
+
+
+
 /* default scalar values for entries */
 #define DFL_ROOTENT_VAL 0x00000000
 #define DFL_DIRENT_VAL 0x00000000
@@ -114,34 +147,41 @@ typedef uint32 page_indirect_entry_scalar;
 // PI: page index (index of table relative to page start)
 
 // from a root entry
-#define PRE_TO_TA(a) ((*(uint32 *)(&(a))) & ~((1<<9)-1))
-#define PRE_TO_PN(e) ((*(uint32 *)(&(e))) >> 12)
-#define PRE_TO_PA(e) ((*(uint32 *)(&(e))) & ~((1<<12)-1))
-//#define PRE_TO_PO(e) ((*(uint32 *)(&(e))) & ((1<<12)-1))
-//#define PRE_TO_PI(e) (((*(uint32 *)(&(e))) & ((1<<12)-1)) / SIZ_DIRTBL)
-#define TA_TO_PREA(a) ((a) >> 4)
+#define PRE_TYPE(e)  	((e) & M68K_PE_DT_MASK)
+#define PRE_TO_TA(e)	(((uint32)(e)) & ~((1<<9)-1))
+#define PRE_TO_PN(e)	(((uint32)(e)) >> 12)
+#define PRE_TO_PA(e)	(((uint32)(e)) & ~((1<<12)-1))
+//#define PRE_TO_PO(e)	(((uint32)(e)) & ((1<<12)-1))
+//#define PRE_TO_PI(e)	((((uint32)(e)) & ((1<<12)-1)) / SIZ_DIRTBL)
+#define TA_TO_PREA(a)	((a) & M68K_PRE_ADDRESS_MASK)
+
 // from a directory entry
-#define PDE_TO_TA(a) ((*(uint32 *)(&(a))) & ~((1<<8)-1))
-#define PDE_TO_PN(e) ((*(uint32 *)(&(e))) >> 12)
-#define PDE_TO_PA(e) ((*(uint32 *)(&(e))) & ~((1<<12)-1))
-//#define PDE_TO_PO(e) ((*(uint32 *)(&(e))) & ((1<<12)-1))
-//#define PDE_TO_PI(e) (((*(uint32 *)(&(e))) & ((1<<12)-1)) / SIZ_PAGETBL)
-#define TA_TO_PDEA(a) ((a) >> 4)
+#define PDE_TYPE(e)  	((e) & M68K_PE_DT_MASK)
+#define PDE_TO_TA(e)	(((uint32)(e)) & ~((1<<8)-1))
+#define PDE_TO_PN(e)	(((uint32)(e)) >> 12)
+#define PDE_TO_PA(e)	(((uint32)(e)) & ~((1<<12)-1))
+//#define PDE_TO_PO(e)	(((uint32)(e)) & ((1<<12)-1))
+//#define PDE_TO_PI(e)	((((uint32)(e)) & ((1<<12)-1)) / SIZ_PAGETBL)
+#define TA_TO_PDEA(a)	((a) & M68K_PDE_ADDRESS_MASK)
+
 // from a table entry
-#define PTE_TO_TA(a) ((*((uint32 *)(&(a)))) & ~((1<<12)-1))
-#define PTE_TO_PN(e) ((*((uint32 *)(&(e)))) >> 12)
-#define PTE_TO_PA(e) ((*((uint32 *)(&(e)))) & ~((1<<12)-1))
-#define TA_TO_PTEA(a) ((a) >> 12)
+#define PTE_TYPE(e)  	((e) & M68K_PE_DT_MASK)
+#define PTE_TO_TA(e)	(((uint32)(e)) & ~((1<<12)-1))
+#define PTE_TO_PN(e)	(((uint32)(e)) >> 12)
+#define PTE_TO_PA(e)	(((uint32)(e)) & ~((1<<12)-1))
+#define TA_TO_PTEA(a)	((a) & M68K_PTE_ADDRESS_MASK)
+
 // from an indirect entry
-#define PIE_TO_TA(a) ((*((uint32 *)(&(a)))) & ~((1<<2)-1))
-#define PIE_TO_PN(e) ((*((uint32 *)(&(e)))) >> 12)
-#define PIE_TO_PA(e) ((*((uint32 *)(&(e)))) & ~((1<<12)-1))
-#define PIE_TO_PO(e) ((*((uint32 *)(&(e)))) & ((1<<12)-(1<<2)))
-#define TA_TO_PIEA(a) ((a) >> 2)
+#define PIE_TYPE(e)  	((e) & M68K_PE_DT_MASK)
+#define PIE_TO_TA(e)	(((uint32)(e)) & ~((1<<2)-1))
+#define PIE_TO_PN(e)	(((uint32)(e)) >> 12)
+#define PIE_TO_PA(e)	(((uint32)(e)) & ~((1<<12)-1))
+#define PIE_TO_PO(e)	(((uint32)(e)) & ((1<<12)-(1<<2)))
+#define TA_TO_PIEA(a)	((a) & M68K_PIE_ADDRESS_MASK)
 
 /* 7/7/6 split */
-#define VADDR_TO_PRENT(va) (((va) / B_PAGE_SIZE) / (64*128))
-#define VADDR_TO_PDENT(va) ((((va) / B_PAGE_SIZE) / 64) % 128)
-#define VADDR_TO_PTENT(va) (((va) / B_PAGE_SIZE) % 64)
+#define VADDR_TO_PRENT(va)	(((va) / B_PAGE_SIZE) / (64*128))
+#define VADDR_TO_PDENT(va)	((((va) / B_PAGE_SIZE) / 64) % 128)
+#define VADDR_TO_PTENT(va)	(((va) / B_PAGE_SIZE) % 64)
 
 #endif	/* _KERNEL_ARCH_M68K_040_MMU_H */