* Since JMicron generously send me one of their ethernet cards to add support
to Haiku for them, I finally got around taking a look at their FreeBSD drivers, and imported them into our repository. * They don't compile yet -- looks like our FreeBSD compatibility layer needs some further improvements. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@29445 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
@@ -18,7 +18,7 @@ SubInclude HAIKU_TOP src add-ons kernel drivers network 3com ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network broadcom440x ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network broadcom440x ;
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||||||
SubInclude HAIKU_TOP src add-ons kernel drivers network broadcom570x ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network broadcom570x ;
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||||||
SubInclude HAIKU_TOP src add-ons kernel drivers network ipro100 ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network ipro100 ;
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||||||
#SubInclude HAIKU_TOP src add-ons kernel drivers network jmicron ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network jmicron2x0 ;
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||||||
SubInclude HAIKU_TOP src add-ons kernel drivers network marvell_yukon ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network marvell_yukon ;
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||||||
SubInclude HAIKU_TOP src add-ons kernel drivers network nforce ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network nforce ;
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||||||
SubInclude HAIKU_TOP src add-ons kernel drivers network pcnet ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network pcnet ;
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||||||
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@@ -0,0 +1,3 @@
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SubDir HAIKU_TOP src add-ons kernel drivers network jmicron2x0 ;
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||||||
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||||||
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SubInclude HAIKU_TOP src add-ons kernel drivers network jmicron2x0 dev ;
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@@ -0,0 +1,4 @@
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SubDir HAIKU_TOP src add-ons kernel drivers network jmicron2x0 dev ;
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||||||
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||||||
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SubInclude HAIKU_TOP src add-ons kernel drivers network jmicron2x0 dev jme ;
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SubInclude HAIKU_TOP src add-ons kernel drivers network jmicron2x0 dev mii ;
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@@ -0,0 +1,17 @@
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SubDir HAIKU_TOP src add-ons kernel drivers network jmicron2x0 dev jme ;
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||||||
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SubDirCcFlags -Wall ;
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||||||
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||||||
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UsePrivateHeaders kernel net ;
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||||||
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||||||
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UseHeaders [ FDirName $(SUBDIR) .. .. ] : true ;
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UseHeaders [ FDirName $(SUBDIR) .. mii ] : true ;
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||||||
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_network compat ] : true ;
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SubDirCcFlags [ FDefines _KERNEL=1 FBSD_DRIVER=1 ] ;
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KernelAddon jmicron2x0 :
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if_jme.c
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glue.c
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: libfreebsd_network.a jmicron2x0_mii.a
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;
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@@ -0,0 +1,30 @@
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/*
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* Copyright 2009, Axel Dörfler. All Rights Reserved.
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* Distributed under the terms of the MIT License.
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|
*/
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include "if_jmereg.h"
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HAIKU_FBSD_DRIVER_GLUE(jmicron2x0, jme, pci);
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extern driver_t *DRIVER_MODULE_NAME(jmephy, miibus);
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HAIKU_DRIVER_REQUIREMENTS(FBSD_TASKQUEUES | FBSD_SWI_TASKQUEUE);
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#if 0
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driver_t*
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__haiku_select_miibus_driver(device_t dev)
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{
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driver_t* drivers[] = {
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DRIVER_MODULE_NAME(jmephy, miibus),
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|
NULL
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};
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return __haiku_probe_miibus(dev, drivers);
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}
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#endif
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,249 @@
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/*-
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* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
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* All rights reserved.
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*
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||||||
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* Redistribution and use in source and binary forms, with or without
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||||||
|
* modification, are permitted provided that the following conditions
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||||||
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* are met:
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||||||
|
* 1. Redistributions of source code must retain the above copyright
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||||||
|
* notice unmodified, this list of conditions, and the following
|
||||||
|
* disclaimer.
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||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
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||||||
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* notice, this list of conditions and the following disclaimer in the
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||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
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*
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||||||
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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||||||
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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||||||
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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||||||
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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||||||
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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||||||
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||||
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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||||||
|
* SUCH DAMAGE.
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||||||
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*
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||||||
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* $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.3 2008/12/04 02:16:53 yongari Exp $
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||||||
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*/
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#ifndef _IF_JMEVAR_H
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#define _IF_JMEVAR_H
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#include <sys/queue.h>
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#include <sys/callout.h>
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#include <sys/taskqueue.h>
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/*
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* JMC250 supports upto 1024 descriptors and the number of
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* descriptors should be multiple of 16.
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*/
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#define JME_TX_RING_CNT 384
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#define JME_RX_RING_CNT 256
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||||||
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/*
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* Tx/Rx descriptor queue base should be 16bytes aligned and
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* should not cross 4G bytes boundary on the 64bits address
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||||||
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* mode.
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||||||
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*/
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||||||
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#define JME_TX_RING_ALIGN 16
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#define JME_RX_RING_ALIGN 16
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#define JME_TSO_MAXSEGSIZE 4096
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#define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
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#define JME_MAXTXSEGS 32
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||||||
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#define JME_RX_BUF_ALIGN sizeof(uint64_t)
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||||||
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#define JME_SSB_ALIGN 16
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||||||
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||||||
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#define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
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#define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
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||||||
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||||||
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#define JME_MSI_MESSAGES 8
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||||||
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#define JME_MSIX_MESSAGES 8
|
||||||
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|
||||||
|
/* Water mark to kick reclaiming Tx buffers. */
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||||||
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#define JME_TX_DESC_HIWAT (JME_TX_RING_CNT - (((JME_TX_RING_CNT) * 3) / 10))
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||||||
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|
||||||
|
/*
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||||||
|
* JMC250 can send 9K jumbo frame on Tx path and can receive
|
||||||
|
* 65535 bytes.
|
||||||
|
*/
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||||||
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#define JME_JUMBO_FRAMELEN 9216
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#define JME_JUMBO_MTU \
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(JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
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||||||
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ETHER_HDR_LEN - ETHER_CRC_LEN)
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||||||
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#define JME_MAX_MTU \
|
||||||
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(ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
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||||||
|
ETHER_HDR_LEN - ETHER_CRC_LEN)
|
||||||
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/*
|
||||||
|
* JMC250 can't handle Tx checksum offload/TSO if frame length
|
||||||
|
* is larger than its FIFO size(2K). It's also good idea to not
|
||||||
|
* use jumbo frame if hardware is running at half-duplex media.
|
||||||
|
* Because the jumbo frame may not fit into the Tx FIFO,
|
||||||
|
* collisions make hardware fetch frame from host memory with
|
||||||
|
* DMA again which in turn slows down Tx performance
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||||||
|
* significantly.
|
||||||
|
*/
|
||||||
|
#define JME_TX_FIFO_SIZE 2000
|
||||||
|
/*
|
||||||
|
* JMC250 has just 4K Rx FIFO. To support jumbo frame that is
|
||||||
|
* larger than 4K bytes in length, Rx FIFO threshold should be
|
||||||
|
* adjusted to minimize Rx FIFO overrun.
|
||||||
|
*/
|
||||||
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#define JME_RX_FIFO_SIZE 4000
|
||||||
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|
||||||
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#define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
|
||||||
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||||||
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#define JME_PROC_MIN 10
|
||||||
|
#define JME_PROC_DEFAULT (JME_RX_RING_CNT / 2)
|
||||||
|
#define JME_PROC_MAX (JME_RX_RING_CNT - 1)
|
||||||
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|
||||||
|
struct jme_txdesc {
|
||||||
|
struct mbuf *tx_m;
|
||||||
|
bus_dmamap_t tx_dmamap;
|
||||||
|
int tx_ndesc;
|
||||||
|
struct jme_desc *tx_desc;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct jme_rxdesc {
|
||||||
|
struct mbuf *rx_m;
|
||||||
|
bus_dmamap_t rx_dmamap;
|
||||||
|
struct jme_desc *rx_desc;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct jme_chain_data{
|
||||||
|
bus_dma_tag_t jme_ring_tag;
|
||||||
|
bus_dma_tag_t jme_buffer_tag;
|
||||||
|
bus_dma_tag_t jme_ssb_tag;
|
||||||
|
bus_dmamap_t jme_ssb_map;
|
||||||
|
bus_dma_tag_t jme_tx_tag;
|
||||||
|
struct jme_txdesc jme_txdesc[JME_TX_RING_CNT];
|
||||||
|
bus_dma_tag_t jme_rx_tag;
|
||||||
|
struct jme_rxdesc jme_rxdesc[JME_RX_RING_CNT];
|
||||||
|
bus_dma_tag_t jme_tx_ring_tag;
|
||||||
|
bus_dmamap_t jme_tx_ring_map;
|
||||||
|
bus_dma_tag_t jme_rx_ring_tag;
|
||||||
|
bus_dmamap_t jme_rx_ring_map;
|
||||||
|
bus_dmamap_t jme_rx_sparemap;
|
||||||
|
|
||||||
|
int jme_tx_prod;
|
||||||
|
int jme_tx_cons;
|
||||||
|
int jme_tx_cnt;
|
||||||
|
int jme_rx_cons;
|
||||||
|
int jme_rxlen;
|
||||||
|
|
||||||
|
struct mbuf *jme_rxhead;
|
||||||
|
struct mbuf *jme_rxtail;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct jme_ring_data {
|
||||||
|
struct jme_desc *jme_tx_ring;
|
||||||
|
bus_addr_t jme_tx_ring_paddr;
|
||||||
|
struct jme_desc *jme_rx_ring;
|
||||||
|
bus_addr_t jme_rx_ring_paddr;
|
||||||
|
struct jme_ssb *jme_ssb_block;
|
||||||
|
bus_addr_t jme_ssb_block_paddr;
|
||||||
|
};
|
||||||
|
|
||||||
|
#define JME_TX_RING_ADDR(sc, i) \
|
||||||
|
((sc)->jme_rdata.jme_tx_ring_paddr + sizeof(struct jme_desc) * (i))
|
||||||
|
#define JME_RX_RING_ADDR(sc, i) \
|
||||||
|
((sc)->jme_rdata.jme_rx_ring_paddr + sizeof(struct jme_desc) * (i))
|
||||||
|
|
||||||
|
#define JME_TX_RING_SIZE \
|
||||||
|
(sizeof(struct jme_desc) * JME_TX_RING_CNT)
|
||||||
|
#define JME_RX_RING_SIZE \
|
||||||
|
(sizeof(struct jme_desc) * JME_RX_RING_CNT)
|
||||||
|
#define JME_SSB_SIZE sizeof(struct jme_ssb)
|
||||||
|
|
||||||
|
/* Statistics counters. */
|
||||||
|
struct jme_hw_stats {
|
||||||
|
uint32_t rx_good_frames;
|
||||||
|
uint32_t rx_crc_errs;
|
||||||
|
uint32_t rx_mii_errs;
|
||||||
|
uint32_t rx_fifo_oflows;
|
||||||
|
uint32_t rx_desc_empty;
|
||||||
|
uint32_t rx_bad_frames;
|
||||||
|
uint32_t tx_good_frames;
|
||||||
|
uint32_t tx_bad_frames;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Software state per device.
|
||||||
|
*/
|
||||||
|
struct jme_softc {
|
||||||
|
struct ifnet *jme_ifp;
|
||||||
|
device_t jme_dev;
|
||||||
|
device_t jme_miibus;
|
||||||
|
struct resource *jme_res[1];
|
||||||
|
struct resource_spec *jme_res_spec;
|
||||||
|
struct resource *jme_irq[JME_MSI_MESSAGES];
|
||||||
|
struct resource_spec *jme_irq_spec;
|
||||||
|
void *jme_intrhand[JME_MSI_MESSAGES];
|
||||||
|
int jme_rev;
|
||||||
|
int jme_chip_rev;
|
||||||
|
int jme_phyaddr;
|
||||||
|
uint8_t jme_eaddr[ETHER_ADDR_LEN];
|
||||||
|
uint32_t jme_tx_dma_size;
|
||||||
|
uint32_t jme_rx_dma_size;
|
||||||
|
int jme_flags;
|
||||||
|
#define JME_FLAG_FPGA 0x0001
|
||||||
|
#define JME_FLAG_PCIE 0x0002
|
||||||
|
#define JME_FLAG_PCIX 0x0003
|
||||||
|
#define JME_FLAG_MSI 0x0004
|
||||||
|
#define JME_FLAG_MSIX 0x0010
|
||||||
|
#define JME_FLAG_PMCAP 0x0020
|
||||||
|
#define JME_FLAG_FASTETH 0x0040
|
||||||
|
#define JME_FLAG_NOJUMBO 0x0080
|
||||||
|
#define JME_FLAG_TXCLK 0x0100
|
||||||
|
#define JME_FLAG_DMA32BIT 0x0200
|
||||||
|
#define JME_FLAG_HWMIB 0x0400
|
||||||
|
#define JME_FLAG_DETACH 0x4000
|
||||||
|
#define JME_FLAG_LINK 0x8000
|
||||||
|
|
||||||
|
struct jme_hw_stats jme_ostats;
|
||||||
|
struct jme_hw_stats jme_stats;
|
||||||
|
struct callout jme_tick_ch;
|
||||||
|
struct jme_chain_data jme_cdata;
|
||||||
|
struct jme_ring_data jme_rdata;
|
||||||
|
int jme_if_flags;
|
||||||
|
int jme_watchdog_timer;
|
||||||
|
uint32_t jme_txcsr;
|
||||||
|
uint32_t jme_rxcsr;
|
||||||
|
int jme_process_limit;
|
||||||
|
int jme_tx_coal_to;
|
||||||
|
int jme_tx_coal_pkt;
|
||||||
|
int jme_rx_coal_to;
|
||||||
|
int jme_rx_coal_pkt;
|
||||||
|
volatile int jme_morework;
|
||||||
|
|
||||||
|
struct task jme_int_task;
|
||||||
|
struct task jme_tx_task;
|
||||||
|
struct task jme_link_task;
|
||||||
|
struct taskqueue *jme_tq;
|
||||||
|
struct mtx jme_mtx;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Register access macros. */
|
||||||
|
#define CSR_WRITE_4(_sc, reg, val) \
|
||||||
|
bus_write_4((_sc)->jme_res[0], (reg), (val))
|
||||||
|
#define CSR_READ_4(_sc, reg) \
|
||||||
|
bus_read_4((_sc)->jme_res[0], (reg))
|
||||||
|
|
||||||
|
#define JME_LOCK(_sc) mtx_lock(&(_sc)->jme_mtx)
|
||||||
|
#define JME_UNLOCK(_sc) mtx_unlock(&(_sc)->jme_mtx)
|
||||||
|
#define JME_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->jme_mtx, MA_OWNED)
|
||||||
|
|
||||||
|
#define JME_MAXERR 5
|
||||||
|
|
||||||
|
#define JME_RXCHAIN_RESET(_sc) \
|
||||||
|
do { \
|
||||||
|
(_sc)->jme_cdata.jme_rxhead = NULL; \
|
||||||
|
(_sc)->jme_cdata.jme_rxtail = NULL; \
|
||||||
|
(_sc)->jme_cdata.jme_rxlen = 0; \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define JME_TX_TIMEOUT 5
|
||||||
|
#define JME_TIMEOUT 1000
|
||||||
|
#define JME_PHY_TIMEOUT 1000
|
||||||
|
#define JME_EEPROM_TIMEOUT 1000
|
||||||
|
|
||||||
|
#endif
|
||||||
@@ -0,0 +1,17 @@
|
|||||||
|
SubDir HAIKU_TOP src add-ons kernel drivers network jmicron2x0 dev mii ;
|
||||||
|
|
||||||
|
UsePrivateHeaders kernel net ;
|
||||||
|
|
||||||
|
UseHeaders [ FDirName $(SUBDIR) .. .. ] : true ;
|
||||||
|
UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_network compat ] : true ;
|
||||||
|
|
||||||
|
SubDirCcFlags [ FDefines _KERNEL=1 FBSD_DRIVER=1 ] ;
|
||||||
|
|
||||||
|
KernelStaticLibrary jmicron2x0_mii.a
|
||||||
|
:
|
||||||
|
jmphy.c
|
||||||
|
;
|
||||||
|
|
||||||
|
ObjectHdrs [ FGristFiles jmephy$(SUFOBJ) ]
|
||||||
|
: [ FDirName $(TARGET_COMMON_DEBUG_OBJECT_DIR) libs compat freebsd_network ] ;
|
||||||
|
Includes [ FGristFiles jmphy.c ] : <src!libs!compat!freebsd_network>miidevs.h ;
|
||||||
@@ -0,0 +1,379 @@
|
|||||||
|
/*-
|
||||||
|
* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice unmodified, this list of conditions, and the following
|
||||||
|
* disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||||
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <sys/cdefs.h>
|
||||||
|
__FBSDID("$FreeBSD: src/sys/dev/mii/jmphy.c,v 1.1 2008/05/27 01:16:40 yongari Exp $");
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Driver for the JMicron JMP211 10/100/1000, JMP202 10/100 PHY.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <sys/param.h>
|
||||||
|
#include <sys/systm.h>
|
||||||
|
#include <sys/kernel.h>
|
||||||
|
#include <sys/module.h>
|
||||||
|
#include <sys/socket.h>
|
||||||
|
#include <sys/bus.h>
|
||||||
|
|
||||||
|
#include <net/if.h>
|
||||||
|
#include <net/if_media.h>
|
||||||
|
|
||||||
|
#include <dev/mii/mii.h>
|
||||||
|
#include <dev/mii/miivar.h>
|
||||||
|
#include "miidevs.h"
|
||||||
|
|
||||||
|
#include <dev/mii/jmphyreg.h>
|
||||||
|
|
||||||
|
#include "miibus_if.h"
|
||||||
|
|
||||||
|
static int jmphy_probe(device_t);
|
||||||
|
static int jmphy_attach(device_t);
|
||||||
|
static void jmphy_reset(struct mii_softc *);
|
||||||
|
static uint16_t jmphy_anar(struct ifmedia_entry *);
|
||||||
|
static int jmphy_auto(struct mii_softc *, struct ifmedia_entry *);
|
||||||
|
|
||||||
|
struct jmphy_softc {
|
||||||
|
struct mii_softc mii_sc;
|
||||||
|
int mii_oui;
|
||||||
|
int mii_model;
|
||||||
|
int mii_rev;
|
||||||
|
};
|
||||||
|
|
||||||
|
static device_method_t jmphy_methods[] = {
|
||||||
|
/* Device interface. */
|
||||||
|
DEVMETHOD(device_probe, jmphy_probe),
|
||||||
|
DEVMETHOD(device_attach, jmphy_attach),
|
||||||
|
DEVMETHOD(device_detach, mii_phy_detach),
|
||||||
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||||
|
{ NULL, NULL }
|
||||||
|
};
|
||||||
|
|
||||||
|
static devclass_t jmphy_devclass;
|
||||||
|
static driver_t jmphy_driver = {
|
||||||
|
"jmphy",
|
||||||
|
jmphy_methods,
|
||||||
|
sizeof(struct jmphy_softc)
|
||||||
|
};
|
||||||
|
|
||||||
|
DRIVER_MODULE(jmphy, miibus, jmphy_driver, jmphy_devclass, 0, 0);
|
||||||
|
|
||||||
|
static int jmphy_service(struct mii_softc *, struct mii_data *, int);
|
||||||
|
static void jmphy_status(struct mii_softc *);
|
||||||
|
|
||||||
|
static const struct mii_phydesc jmphys[] = {
|
||||||
|
MII_PHY_DESC(JMICRON, JMP202),
|
||||||
|
MII_PHY_DESC(JMICRON, JMP211),
|
||||||
|
MII_PHY_END
|
||||||
|
};
|
||||||
|
|
||||||
|
static int
|
||||||
|
jmphy_probe(device_t dev)
|
||||||
|
{
|
||||||
|
|
||||||
|
return (mii_phy_dev_probe(dev, jmphys, BUS_PROBE_DEFAULT));
|
||||||
|
}
|
||||||
|
|
||||||
|
static int
|
||||||
|
jmphy_attach(device_t dev)
|
||||||
|
{
|
||||||
|
struct jmphy_softc *jsc;
|
||||||
|
struct mii_softc *sc;
|
||||||
|
struct mii_attach_args *ma;
|
||||||
|
struct mii_data *mii;
|
||||||
|
|
||||||
|
jsc = device_get_softc(dev);
|
||||||
|
sc = &jsc->mii_sc;
|
||||||
|
ma = device_get_ivars(dev);
|
||||||
|
sc->mii_dev = device_get_parent(dev);
|
||||||
|
mii = device_get_softc(sc->mii_dev);
|
||||||
|
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
|
||||||
|
|
||||||
|
sc->mii_inst = mii->mii_instance;
|
||||||
|
sc->mii_phy = ma->mii_phyno;
|
||||||
|
sc->mii_service = jmphy_service;
|
||||||
|
sc->mii_pdata = mii;
|
||||||
|
|
||||||
|
mii->mii_instance++;
|
||||||
|
|
||||||
|
jsc->mii_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
|
||||||
|
jsc->mii_model = MII_MODEL(ma->mii_id2);
|
||||||
|
jsc->mii_rev = MII_REV(ma->mii_id2);
|
||||||
|
if (bootverbose)
|
||||||
|
device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
|
||||||
|
jsc->mii_oui, jsc->mii_model, jsc->mii_rev);
|
||||||
|
|
||||||
|
jmphy_reset(sc);
|
||||||
|
|
||||||
|
sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
|
||||||
|
if (sc->mii_capabilities & BMSR_EXTSTAT)
|
||||||
|
sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
|
||||||
|
device_printf(dev, " ");
|
||||||
|
mii_phy_add_media(sc);
|
||||||
|
printf("\n");
|
||||||
|
|
||||||
|
MIIBUS_MEDIAINIT(sc->mii_dev);
|
||||||
|
return(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int
|
||||||
|
jmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
|
||||||
|
{
|
||||||
|
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
|
||||||
|
uint16_t bmcr;
|
||||||
|
|
||||||
|
switch (cmd) {
|
||||||
|
case MII_POLLSTAT:
|
||||||
|
/*
|
||||||
|
* If we're not polling our PHY instance, just return.
|
||||||
|
*/
|
||||||
|
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
|
||||||
|
return (0);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MII_MEDIACHG:
|
||||||
|
/*
|
||||||
|
* If the media indicates a different PHY instance,
|
||||||
|
* isolate ourselves.
|
||||||
|
*/
|
||||||
|
if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
|
||||||
|
bmcr = PHY_READ(sc, MII_BMCR);
|
||||||
|
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
|
||||||
|
return (0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If the interface is not up, don't do anything.
|
||||||
|
*/
|
||||||
|
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
|
||||||
|
break;
|
||||||
|
|
||||||
|
if (jmphy_auto(sc, ife) != EJUSTRETURN)
|
||||||
|
return (EINVAL);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MII_TICK:
|
||||||
|
/*
|
||||||
|
* If we're not currently selected, just return.
|
||||||
|
*/
|
||||||
|
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
|
||||||
|
return (0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Is the interface even up?
|
||||||
|
*/
|
||||||
|
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
|
||||||
|
return (0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Only used for autonegotiation.
|
||||||
|
*/
|
||||||
|
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
|
||||||
|
sc->mii_ticks = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check for link. */
|
||||||
|
if ((PHY_READ(sc, JMPHY_SSR) & JMPHY_SSR_LINK_UP) != 0) {
|
||||||
|
sc->mii_ticks = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Announce link loss right after it happens. */
|
||||||
|
if (sc->mii_ticks++ == 0)
|
||||||
|
break;
|
||||||
|
if (sc->mii_ticks <= sc->mii_anegticks)
|
||||||
|
return (0);
|
||||||
|
|
||||||
|
sc->mii_ticks = 0;
|
||||||
|
jmphy_auto(sc, ife);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Update the media status. */
|
||||||
|
jmphy_status(sc);
|
||||||
|
|
||||||
|
/* Callback if something changed. */
|
||||||
|
mii_phy_update(sc, cmd);
|
||||||
|
return (0);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
jmphy_status(struct mii_softc *sc)
|
||||||
|
{
|
||||||
|
struct mii_data *mii = sc->mii_pdata;
|
||||||
|
int bmcr, ssr;
|
||||||
|
|
||||||
|
mii->mii_media_status = IFM_AVALID;
|
||||||
|
mii->mii_media_active = IFM_ETHER;
|
||||||
|
|
||||||
|
ssr = PHY_READ(sc, JMPHY_SSR);
|
||||||
|
if ((ssr & JMPHY_SSR_LINK_UP) != 0)
|
||||||
|
mii->mii_media_status |= IFM_ACTIVE;
|
||||||
|
|
||||||
|
bmcr = PHY_READ(sc, MII_BMCR);
|
||||||
|
if ((bmcr & BMCR_ISO) != 0) {
|
||||||
|
mii->mii_media_active |= IFM_NONE;
|
||||||
|
mii->mii_media_status = 0;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((bmcr & BMCR_LOOP) != 0)
|
||||||
|
mii->mii_media_active |= IFM_LOOP;
|
||||||
|
|
||||||
|
if ((ssr & JMPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
|
||||||
|
/* Erg, still trying, I guess... */
|
||||||
|
mii->mii_media_active |= IFM_NONE;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch ((ssr & JMPHY_SSR_SPEED_MASK)) {
|
||||||
|
case JMPHY_SSR_SPEED_1000:
|
||||||
|
mii->mii_media_active |= IFM_1000_T;
|
||||||
|
/*
|
||||||
|
* jmphy(4) got a valid link so reset mii_ticks.
|
||||||
|
* Resetting mii_ticks is needed in order to
|
||||||
|
* detect link loss after auto-negotiation.
|
||||||
|
*/
|
||||||
|
sc->mii_ticks = 0;
|
||||||
|
break;
|
||||||
|
case JMPHY_SSR_SPEED_100:
|
||||||
|
mii->mii_media_active |= IFM_100_TX;
|
||||||
|
sc->mii_ticks = 0;
|
||||||
|
break;
|
||||||
|
case JMPHY_SSR_SPEED_10:
|
||||||
|
mii->mii_media_active |= IFM_10_T;
|
||||||
|
sc->mii_ticks = 0;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
mii->mii_media_active |= IFM_NONE;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((ssr & JMPHY_SSR_DUPLEX) != 0)
|
||||||
|
mii->mii_media_active |= IFM_FDX;
|
||||||
|
else
|
||||||
|
mii->mii_media_active |= IFM_HDX;
|
||||||
|
/* XXX Flow-control. */
|
||||||
|
#ifdef notyet
|
||||||
|
if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
|
||||||
|
if ((PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
|
||||||
|
mii->mii_media_active |= IFM_ETH_MASTER;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
jmphy_reset(struct mii_softc *sc)
|
||||||
|
{
|
||||||
|
struct jmphy_softc *jsc;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
jsc = (struct jmphy_softc *)sc;
|
||||||
|
|
||||||
|
/* Disable sleep mode. */
|
||||||
|
PHY_WRITE(sc, JMPHY_TMCTL,
|
||||||
|
PHY_READ(sc, JMPHY_TMCTL) & ~JMPHY_TMCTL_SLEEP_ENB);
|
||||||
|
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
|
||||||
|
|
||||||
|
for (i = 0; i < 1000; i++) {
|
||||||
|
DELAY(1);
|
||||||
|
if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint16_t
|
||||||
|
jmphy_anar(struct ifmedia_entry *ife)
|
||||||
|
{
|
||||||
|
uint16_t anar;
|
||||||
|
|
||||||
|
anar = 0;
|
||||||
|
switch (IFM_SUBTYPE(ife->ifm_media)) {
|
||||||
|
case IFM_AUTO:
|
||||||
|
anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
|
||||||
|
break;
|
||||||
|
case IFM_1000_T:
|
||||||
|
break;
|
||||||
|
case IFM_100_TX:
|
||||||
|
anar |= ANAR_TX | ANAR_TX_FD;
|
||||||
|
break;
|
||||||
|
case IFM_10_T:
|
||||||
|
anar |= ANAR_10 | ANAR_10_FD;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (anar);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int
|
||||||
|
jmphy_auto(struct mii_softc *sc, struct ifmedia_entry *ife)
|
||||||
|
{
|
||||||
|
uint16_t anar, bmcr, gig;
|
||||||
|
|
||||||
|
gig = 0;
|
||||||
|
bmcr = PHY_READ(sc, MII_BMCR);
|
||||||
|
switch (IFM_SUBTYPE(ife->ifm_media)) {
|
||||||
|
case IFM_AUTO:
|
||||||
|
gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
|
||||||
|
break;
|
||||||
|
case IFM_1000_T:
|
||||||
|
gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
|
||||||
|
break;
|
||||||
|
case IFM_100_TX:
|
||||||
|
case IFM_10_T:
|
||||||
|
break;
|
||||||
|
case IFM_NONE:
|
||||||
|
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
|
||||||
|
return (EJUSTRETURN);
|
||||||
|
default:
|
||||||
|
return (EINVAL);
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((ife->ifm_media & IFM_LOOP) != 0)
|
||||||
|
bmcr |= BMCR_LOOP;
|
||||||
|
|
||||||
|
anar = jmphy_anar(ife);
|
||||||
|
/* XXX Always advertise pause capability. */
|
||||||
|
anar |= (3 << 10);
|
||||||
|
|
||||||
|
if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
|
||||||
|
#ifdef notyet
|
||||||
|
struct mii_data *mii;
|
||||||
|
|
||||||
|
mii = sc->mii_pdata;
|
||||||
|
if ((mii->mii_media.ifm_media & IFM_ETH_MASTER) != 0)
|
||||||
|
gig |= GTCR_MAN_MS | GTCR_MAN_ADV;
|
||||||
|
#endif
|
||||||
|
PHY_WRITE(sc, MII_100T2CR, gig);
|
||||||
|
}
|
||||||
|
PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
|
||||||
|
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
|
||||||
|
|
||||||
|
return (EJUSTRETURN);
|
||||||
|
}
|
||||||
@@ -0,0 +1,108 @@
|
|||||||
|
/*-
|
||||||
|
* Copyright (c) 2008, Pyun YongHyeon
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
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* notice unmodified, this list of conditions, and the following
|
||||||
|
* disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||||
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* $FreeBSD: src/sys/dev/mii/jmphyreg.h,v 1.1 2008/05/27 01:16:40 yongari Exp $
|
||||||
|
*/
|
||||||
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|
||||||
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#ifndef _DEV_MII_JMPHYREG_H_
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#define _DEV_MII_JMPHYREG_H_
|
||||||
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|
||||||
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/*
|
||||||
|
* Registers for the JMicron JMC250 Gigabit PHY.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* PHY specific status register. */
|
||||||
|
#define JMPHY_SSR 0x11
|
||||||
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#define JMPHY_SSR_SPEED_1000 0x8000
|
||||||
|
#define JMPHY_SSR_SPEED_100 0x4000
|
||||||
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#define JMPHY_SSR_SPEED_10 0x0000
|
||||||
|
#define JMPHY_SSR_SPEED_MASK 0xC000
|
||||||
|
#define JMPHY_SSR_DUPLEX 0x2000
|
||||||
|
#define JMPHY_SSR_SPD_DPLX_RESOLVED 0x0800
|
||||||
|
#define JMPHY_SSR_LINK_UP 0x0400
|
||||||
|
#define JMPHY_SSR_MDI_XOVER 0x0040
|
||||||
|
#define JMPHY_SSR_INV_POLARITY 0x0002
|
||||||
|
|
||||||
|
/* PHY specific cable length status register. */
|
||||||
|
#define JMPHY_SCL 0x17
|
||||||
|
#define JMPHY_SCL_CHAN_D_MASK 0xF000
|
||||||
|
#define JMPHY_SCL_CHAN_C_MASK 0x0F00
|
||||||
|
#define JMPHY_SCL_CHAN_B_MASK 0x00F0
|
||||||
|
#define JMPHY_SCL_CHAN_A_MASK 0x000F
|
||||||
|
#define JMPHY_SCL_LEN_35 0
|
||||||
|
#define JMPHY_SCL_LEN_40 1
|
||||||
|
#define JMPHY_SCL_LEN_50 2
|
||||||
|
#define JMPHY_SCL_LEN_60 3
|
||||||
|
#define JMPHY_SCL_LEN_70 4
|
||||||
|
#define JMPHY_SCL_LEN_80 5
|
||||||
|
#define JMPHY_SCL_LEN_90 6
|
||||||
|
#define JMPHY_SCL_LEN_100 7
|
||||||
|
#define JMPHY_SCL_LEN_110 8
|
||||||
|
#define JMPHY_SCL_LEN_120 9
|
||||||
|
#define JMPHY_SCL_LEN_130 10
|
||||||
|
#define JMPHY_SCL_LEN_140 11
|
||||||
|
#define JMPHY_SCL_LEN_150 12
|
||||||
|
#define JMPHY_SCL_LEN_160 13
|
||||||
|
#define JMPHY_SCL_LEN_170 14
|
||||||
|
#define JMPHY_SCL_RSVD 15
|
||||||
|
|
||||||
|
/* PHY specific LED control register 1. */
|
||||||
|
#define JMPHY_LED_CTL1 0x18
|
||||||
|
#define JMPHY_LED_BLINK_42MS 0x0000
|
||||||
|
#define JMPHY_LED_BLINK_84MS 0x2000
|
||||||
|
#define JMPHY_LED_BLINK_170MS 0x4000
|
||||||
|
#define JMPHY_LED_BLINK_340MS 0x6000
|
||||||
|
#define JMPHY_LED_BLINK_670MS 0x8000
|
||||||
|
#define JMPHY_LED_BLINK_MASK 0xE000
|
||||||
|
#define JMPHY_LED_FLP_GAP_MASK 0x1F00
|
||||||
|
#define JMPHY_LED_FLP_GAP_DEFULT 0x1000
|
||||||
|
#define JMPHY_LED2_POLARITY_MASK 0x0030
|
||||||
|
#define JMPHY_LED1_POLARITY_MASK 0x000C
|
||||||
|
#define JMPHY_LED0_POLARITY_MASK 0x0003
|
||||||
|
#define JMPHY_LED_ON_LO_OFF_HI 0
|
||||||
|
#define JMPHY_LED_ON_HI_OFF_HI 1
|
||||||
|
#define JMPHY_LED_ON_LO_OFF_TS 2
|
||||||
|
#define JMPHY_LED_ON_HI_OFF_TS 3
|
||||||
|
|
||||||
|
/* PHY specific LED control register 2. */
|
||||||
|
#define JMPHY_LED_CTL2 0x19
|
||||||
|
#define JMPHY_LED_NO_STRETCH 0x0000
|
||||||
|
#define JMPHY_LED_STRETCH_42MS 0x2000
|
||||||
|
#define JMPHY_LED_STRETCH_84MS 0x4000
|
||||||
|
#define JMPHY_LED_STRETCH_170MS 0x6000
|
||||||
|
#define JMPHY_LED_STRETCH_340MS 0x8000
|
||||||
|
#define JMPHY_LED_STRETCH_670MS 0xB000
|
||||||
|
#define JMPHY_LED_STRETCH_1300MS 0xC000
|
||||||
|
#define JMPHY_LED_STRETCH_2700MS 0xE000
|
||||||
|
#define JMPHY_LED2_MODE_MASK 0x0F00
|
||||||
|
#define JMPHY_LED1_MODE_MASK 0x00F0
|
||||||
|
#define JMPHY_LED0_MODE_MASK 0x000F
|
||||||
|
|
||||||
|
/* PHY specific test mode control register. */
|
||||||
|
#define JMPHY_TMCTL 0x1A
|
||||||
|
#define JMPHY_TMCTL_SLEEP_ENB 0x1000
|
||||||
|
|
||||||
|
#endif /* _DEV_MII_JMPHYREG_H_ */
|
||||||
Reference in New Issue
Block a user