From b313d63eae110b2004cee5ef78df8f0b3f6cdb16 Mon Sep 17 00:00:00 2001 From: Alexander von Gluck IV Date: Thu, 20 Jun 2019 12:04:47 -0500 Subject: [PATCH] arm/atomics: Move cpu-specific memory barriers to arch_cpu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Now matches the rest of the architectures. Change-Id: I6699e0c8f729923770f136f2c9599185a685336a Reviewed-on: https://review.haiku-os.org/c/1527 Reviewed-by: Alex von Gluck IV Reviewed-by: Adrien Destugues Reviewed-by: Axel Dörfler --- headers/private/kernel/arch/arm/arch_atomic.h | 18 +----------------- headers/private/kernel/arch/arm/arch_cpu.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 17 deletions(-) diff --git a/headers/private/kernel/arch/arm/arch_atomic.h b/headers/private/kernel/arch/arm/arch_atomic.h index abe3943674..d8045721c3 100644 --- a/headers/private/kernel/arch/arm/arch_atomic.h +++ b/headers/private/kernel/arch/arm/arch_atomic.h @@ -9,23 +9,7 @@ #define _KERNEL_ARCH_ARM_ATOMIC_H -#if __ARM_ARCH__ <= 5 -#define isb() __asm__ __volatile__("" : : : "memory") -#define dsb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" \ - : : "r" (0) : "memory") -#define dmb() __asm__ __volatile__("" : : : "memory") -#elif __ARM_ARCH__ == 6 -#define isb() __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 4" \ - : : "r" (0) : "memory") -#define dsb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" \ - : : "r" (0) : "memory") -#define dmb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 5" \ - : : "r" (0) : "memory") -#else /* ARMv7+ */ -#define isb() __asm__ __volatile__("isb" : : : "memory") -#define dsb() __asm__ __volatile__("dsb" : : : "memory") -#define dmb() __asm__ __volatile__("dmb" : : : "memory") -#endif +#include static inline void diff --git a/headers/private/kernel/arch/arm/arch_cpu.h b/headers/private/kernel/arch/arm/arch_cpu.h index aa28d75730..988ac3e819 100644 --- a/headers/private/kernel/arch/arm/arch_cpu.h +++ b/headers/private/kernel/arch/arm/arch_cpu.h @@ -11,6 +11,24 @@ // TODO: Could be 32-bits sometimes? +#if __ARM_ARCH__ <= 5 +#define isb() __asm__ __volatile__("" : : : "memory") +#define dsb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" \ + : : "r" (0) : "memory") +#define dmb() __asm__ __volatile__("" : : : "memory") +#elif __ARM_ARCH__ == 6 +#define isb() __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 4" \ + : : "r" (0) : "memory") +#define dsb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" \ + : : "r" (0) : "memory") +#define dmb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 5" \ + : : "r" (0) : "memory") +#else /* ARMv7+ */ +#define isb() __asm__ __volatile__("isb" : : : "memory") +#define dsb() __asm__ __volatile__("dsb" : : : "memory") +#define dmb() __asm__ __volatile__("dmb" : : : "memory") +#endif + #define set_ac() #define clear_ac()