openBeOS_Matrox_V0.14_src
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@5541 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -5,7 +5,7 @@
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Other authors:
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Mark Watson;
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Apsed;
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Rudolf Cornelissen 10/2002.
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Rudolf Cornelissen 10/2002-4/2003.
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*/
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#ifndef DRIVERINTERFACE_H
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@@ -87,6 +87,7 @@ typedef struct settings { // apsed, see comments in mga.settings
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uint32 memory;
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bool usebios;
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bool hardcursor;
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bool greensync;
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} settings;
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/*shared info*/
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@@ -136,28 +137,33 @@ typedef struct {
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uint16 width; /* Width and height of the cursor shape (always 16!) */
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uint16 height;
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bool is_visible; /* Is the cursor currently displayed? */
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}cursor;
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} cursor;
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/*colour lookup table*/
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uint8 color_data[3 * 256]; /* Colour lookup table - as used by DAC */
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/*more display mode stuff*/
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display_mode dm; /* current display mode configuration */
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display_mode dm; /* current display mode configuration: head1 */
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display_mode dm2; /* current display mode configuration: head2 */
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bool switched_crtcs; /* dualhead stretch and switch mode info */
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bool acc_mode; /* signals (non)accelerated mode */
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bool interlaced_tv_mode;/* signals interlaced CRTC TV output mode */
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/*frame buffer config - for BDirectScreen*/
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frame_buffer_config fbc; /* bytes_per_row and start of frame buffer */
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frame_buffer_config fbc; /* bytes_per_row and start of frame buffer: head1 */
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frame_buffer_config fbc2; /* bytes_per_row and start of frame buffer: head2 */
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/*acceleration engine*/
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struct {
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uint32 count; /* last dwgsync slot used */
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uint32 last_idle; /* last dwgsync slot we *know* the engine was idle after */
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benaphore lock; /* for serializing access to the acceleration engine */
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} engine;
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} engine;
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/* card info - information gathered from PINS (and other sources) */
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enum
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{ // card_type in order of date of MGA chip design
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MILL=0,
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MIL1 = 0,
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MYST,
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MIL2,
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G100,
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