kernel/arm/paging: implement Modified Flag
* Introduce SWDBM flag similarly to the arm64 port * Reuse TEX[2] for SWDBM flag which should be availble to be used by the operating system if TEX remap is enabled. * Introduce SetAndClearPageTableEntryFlags for updating accessed and modified flags atomically * Startup sequence is handled similarly to accessed flag, i.e. set Modified flag in initially mapped pages in bootloader and early map. * Once the kernel initialization has progressed enough, pages are mapped as read-only and modified flag handling is done in the page fault handler. Change-Id: I8f761e2c6325d1b91481abd569d5e8befded0761 Reviewed-on: https://review.haiku-os.org/c/haiku/+/6518 Tested-by: Commit checker robot <[email protected]> Reviewed-by: Adrien Destugues <[email protected]>
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Adrien Destugues
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@@ -60,11 +60,13 @@
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#define ARM_MMU_L2_FLAG_S 0x400
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#define ARM_MMU_L2_FLAG_NG 0x800
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#define ARM_MMU_L2_FLAG_AP_KRW 0x010
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// allow read and write for kernel only
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#define ARM_MMU_L2_FLAG_HAIKU_SWDBM ARM_MMU_L2_FLAG_TEX2
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// reuse TEX[2] for software-emulated Dirty Bit Modifier
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#define ARM_MMU_L2_FLAG_AP_RW 0x030
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// allow read and write for user and system
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#define ARM_MMU_L2_FLAG_HAIKU_KERNEL_RW (ARM_MMU_L2_FLAG_TEX2 | ARM_MMU_L2_FLAG_AP0)
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// allow read and write for kernel only
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// set Accessed and Modified flag during early page mapping
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// as the exception handler may be not available yet
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#define ARM_MMU_L1_TABLE_ENTRY_COUNT 4096
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#define ARM_MMU_L1_TABLE_SIZE (ARM_MMU_L1_TABLE_ENTRY_COUNT \
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@@ -97,7 +99,7 @@
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#define ARM_PTE_ADDRESS_MASK 0xfffff000
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#define ARM_PTE_TYPE_MASK 0x00000003
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#define ARM_PTE_PROTECTION_MASK 0x00000221 // AP[2:1], XN
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#define ARM_PTE_MEMORY_TYPE_MASK 0x000001cc // TEX, B, C
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#define ARM_PTE_PROTECTION_MASK 0x00000121 // SWDBM, AP[1], XN
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#define ARM_PTE_MEMORY_TYPE_MASK 0x0000004c // TEX[0], B, C
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#endif /* _ARCH_ARM_ARM_MMU_H */
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