diff --git a/src/add-ons/accelerants/matrox/SetDisplayMode.c b/src/add-ons/accelerants/matrox/SetDisplayMode.c index 4b4f97132a..b1f1939b52 100644 --- a/src/add-ons/accelerants/matrox/SetDisplayMode.c +++ b/src/add-ons/accelerants/matrox/SetDisplayMode.c @@ -5,7 +5,7 @@ Other authors: Mark Watson, Apsed, - Rudolf Cornelissen 11/2002-1/2006 + Rudolf Cornelissen 11/2002-5/2006 */ #define MODULE_BIT 0x00200000 @@ -319,7 +319,8 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set) } /* set the pixel clock PLL */ - if (si->ps.card_type >= G100) + if (si->ps.card_type >= G100) + //fixme: how about when TVout is enabled??? status = gx00_dac_set_pix_pll(target); else { @@ -332,6 +333,9 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set) gx00_dac_mode(colour_mode,1.0); gx00_crtc_depth(colour_mode); + /* if we do TVout mode, its non-interlaced (as we are on <= G400MAX for sure) */ + si->interlaced_tv_mode = false; + /* set the display pitch */ gx00_crtc_set_display_pitch(); @@ -357,9 +361,17 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set) } /* set the timing */ - gx00_crtc_set_timing(target); + if (!si->ps.secondary_head && si->ps.tvout && (target.flags & TV_BITS)) + { + /* TVout support: setup CRTC1 and it's pixelclock */ + maventv_init(target); + } + else + { + gx00_crtc_set_timing(target); + } - //fixme: shut-off the videoPLL if it exists... + //fixme: shut-off the videoPLL when applicable, if it exists... } /* update driver's mode store */ @@ -372,7 +384,10 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set) SET_DPMS_MODE(si->dpms_flags); /* clear line at bottom of screen if dualhead mode: - * MAVEN hardware design fault 'fix'. */ + * MAVEN hardware design fault 'fix'. + * Note: + * Not applicable for singlehead cards with a MAVEN, since it's only used + * for TVout there. */ if ((target.flags & DUALHEAD_BITS) && (si->ps.card_type <= G400MAX)) gx00_maven_clrline(); diff --git a/src/add-ons/accelerants/matrox/engine/mga_general.c b/src/add-ons/accelerants/matrox/engine/mga_general.c index 1e5a3563fb..b140a6f332 100644 --- a/src/add-ons/accelerants/matrox/engine/mga_general.c +++ b/src/add-ons/accelerants/matrox/engine/mga_general.c @@ -54,7 +54,7 @@ status_t gx00_general_powerup() status_t status; uint8 card_class; - LOG(1,("POWERUP: Haiku Matrox Accelerant 0.29 running.\n")); + LOG(1,("POWERUP: Haiku Matrox Accelerant 0.30 running.\n")); /* log VBLANK INT usability status */ if (si->ps.int_assigned) diff --git a/src/add-ons/accelerants/matrox/engine/mga_maventv.c b/src/add-ons/accelerants/matrox/engine/mga_maventv.c index 5c1e825cb7..c9385338f1 100644 --- a/src/add-ons/accelerants/matrox/engine/mga_maventv.c +++ b/src/add-ons/accelerants/matrox/engine/mga_maventv.c @@ -1,6 +1,6 @@ /* Authors: Mark Watson 2000, - Rudolf Cornelissen 1/2003-12/2003 + Rudolf Cornelissen 1/2003-5/2006 Thanx to Petr Vandrovec for writing matroxfb. */ @@ -700,7 +700,10 @@ int maventv_init(display_mode target) * by one! */ MAVW(LUMA, 0x78); /* We just made a sync polarity programming step for monitor modes, so: - * note the offset from 'reset position' we will have now */ + * note the offset from 'reset position' we will have now. + * Note: + * Not applicable for singlehead cards with a MAVEN, since it's only used + * for TVout there. */ si->maven_syncpol_offset += 1; if (si->maven_syncpol_offset > 3) si->maven_syncpol_offset = 0; @@ -1385,8 +1388,17 @@ int maventv_init(display_mode target) DXIW(GENIODATA, 0x00); } - /* setup CRTC2 timing */ - g400_crtc2_set_timing(tv_target); + /* setup CRTC timing */ + if (si->ps.secondary_head) + { + /* on dualhead cards TVout is always used on CRTC2 */ + g400_crtc2_set_timing(tv_target); + } + else + { + /* on singlehead cards TVout is always used on CRTC1 */ + gx00_crtc_set_timing(tv_target); + } /* start whole thing if needed */ if (si->ps.card_type <= G400MAX) MAVW(RESYNC, 0x20);