From ba0b8a97e085b10225815245a445208110336798 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Thu, 2 Sep 2004 19:37:45 +0000 Subject: [PATCH] added coldstart support for TNT2M64 cards: added RAM width test in script execution. TNT2-M64 now working as good as normal TNT2: lower res modes OK, still needs fix for CRTC memory fetch errors on higher modes. git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8802 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/nvidia/engine/nv_info.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c index 8b5afc73c4..99b8ebce88 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_info.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c @@ -716,6 +716,7 @@ static void log_pll(uint32 reg) static void setup_ram_config(uint8* rom, uint16 ram_tab) { uint32 ram_cfg, data; + uint8 cnt; /* set MRS = 256 */ NV_REG32(NV32_PFB_DEBUG_0) &= 0xffffffef; @@ -775,7 +776,20 @@ static void setup_ram_config(uint8* rom, uint16 ram_tab) NV_REG32(NV32_PFB_CONFIG_1) = data; /* ... followed by b0 = 1(?) */ NV_REG32(NV32_PFB_CONFIG_1) = (data | 0x00000001); - //fixme?: do RAM width test + + /* do RAM width test to confirm RAM width set to be correct */ + /* write testpattern to first 128 bits of graphics memory... */ + data = 0x4e563541; + for (cnt = 0; cnt < 4; cnt++) + ((uint32 *)si->framebuffer)[cnt] = data; + /* ... if second 64 bits does not contain the testpattern we are apparantly + * set to 128bits width while we should be set to 64bits width, so correct. */ + if (((uint32 *)si->framebuffer)[3] != data) + { + LOG(8,("INFO: ---RAM width tested: width is 64bits, correcting settings\n")); + NV_REG32(NV32_NV4STRAPINFO) &= ~0x00000004; + } + //fixme?: do RAM size test }