i2p/haiku-beta6
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

disable some debug output

Browse Source 
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22394 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Marcus Overhagen
2007-10-01 10:28:24 +00:00
parent 7746846941
commit c134c7b07c
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/kernel/busses/scsi/ahci/ahci_port.cpp
+4 -2
View File
@@ -17,6 +17,8 @@
#define TRACE(a...) dprintf("\33[34mahci:\33[0m " a) #define TRACE(a...) dprintf("\33[34mahci:\33[0m " a)
// #define FLOW(a...) dprintf("ahci: " a) // #define FLOW(a...) dprintf("ahci: " a)
#define FLOW(a...) #define FLOW(a...)
//#define RWTRACE(a...) dprintf("\33[34mahci:\33[0m " a)
#define RWTRACE(a...)
AHCIPort::AHCIPort(AHCIController *controller, int index) AHCIPort::AHCIPort(AHCIController *controller, int index)
@@ -273,7 +275,7 @@ AHCIPort::Interrupt()
uint32 ci = fRegs->ci; uint32 ci = fRegs->ci;
fRegs->is = is; // clear interrupts fRegs->is = is; // clear interrupts
FLOW("AHCIPort::Interrupt port %d, fCommandsActive 0x%08lx, is 0x%08lx, ci 0x%08lx\n", fIndex, fCommandsActive, is, ci); RWTRACE("AHCIPort::Interrupt port %d, fCommandsActive 0x%08lx, is 0x%08lx, ci 0x%08lx\n", fIndex, fCommandsActive, is, ci);
if (is & PORT_INT_ERROR) if (is & PORT_INT_ERROR)
TRACE("AHCIPort::Interrupt port %d, fCommandsActive 0x%08lx, is 0x%08lx, ci 0x%08lx\n", fIndex, fCommandsActive, is, ci); TRACE("AHCIPort::Interrupt port %d, fCommandsActive 0x%08lx, is 0x%08lx, ci 0x%08lx\n", fIndex, fCommandsActive, is, ci);
@@ -574,7 +576,7 @@ AHCIPort::ScsiReadWrite(scsi_ccb *request, uint64 position, size_t length, bool
{ {
uint32 bytecount = length * 512; uint32 bytecount = length * 512;
TRACE("ScsiReadWrite: position %llu, size %lu, isWrite %d\n", position * 512, bytecount, isWrite); RWTRACE("ScsiReadWrite: position %llu, size %lu, isWrite %d\n", position * 512, bytecount, isWrite);
#if 0 #if 0
if (isWrite) { if (isWrite) {