Update for the S3 driver by Gerald:
* The hardware cursor is now disabled at 640x480 with a Virge VX (before it was just invisible). * EDID info can now be read for all S3 chips. * For the Savage IX, Savage MX, and SuperSavage chips the display is no longer expanded to fill a laptop LCD display when the mode resolution is less than the size of LCD display. * Savage IX, Savage MX, and SuperSavage chips will now display mode 1400x1050 on a 1400x1050 laptop LCD display. Previously the display was blank at that resolution. * Previously about half the Savage chips would not draw properly at 1400x1050. That is, the image was badly skewed and unusable. All of them now draw properly at 1400x1050. * Some code was reorganized to remove unnecessary and redundant code. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@27863 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
@@ -2,7 +2,7 @@
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Copyright 2007-2008 Haiku, Inc. All rights reserved.
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Distributed under the terms of the MIT license.
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Other authors:
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Authors:
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Gerald Zajac 2007-2008
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*/
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@@ -16,27 +16,42 @@
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#include <edid.h>
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// This is the info that needs to be shared between the kernel driver and
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// the accelerant for the sample driver.
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// This file contains info that is shared between the kernel driver and the
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// accelerant, and info that is shared among the source files of the accelerant.
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define ENABLE_DEBUG_TRACE // if defined, turns on debug output to syslog
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#define NUM_ELEMENTS(a) ((int)(sizeof(a) / sizeof(a[0]))) // for computing number of elements in an array
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struct benaphore {
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struct Benaphore {
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sem_id sem;
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int32 ben;
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};
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int32 count;
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#define INIT_BEN(x) x.sem = create_sem(0, "S3 "#x" benaphore"); x.ben = 0;
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#define AQUIRE_BEN(x) if((atomic_add(&(x.ben), 1)) >= 1) acquire_sem(x.sem);
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#define RELEASE_BEN(x) if((atomic_add(&(x.ben), -1)) > 1) release_sem(x.sem);
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#define DELETE_BEN(x) delete_sem(x.sem);
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status_t Init(const char* name)
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{
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count = 0;
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sem = create_sem(0, name);
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return sem < 0 ? sem : B_OK;
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}
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status_t Acquire()
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{
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if (atomic_add(&count, 1) > 0)
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return acquire_sem(sem);
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return B_OK;
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}
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status_t Release()
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{
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if (atomic_add(&count, -1) > 1)
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return release_sem(sem);
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return B_OK;
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}
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void Delete() { delete_sem(sem); }
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};
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#define S3_PRIVATE_DATA_MAGIC 0x4521 // a private driver rev, of sorts
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@@ -45,6 +60,7 @@ struct benaphore {
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enum {
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S3_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,
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S3_DEVICE_NAME,
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S3_GET_EDID,
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S3_GET_PIO,
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S3_SET_PIO,
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S3_RUN_INTERRUPTS,
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@@ -54,7 +70,7 @@ enum {
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// Chip type numbers. These are used to group the chips into related
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// groups. See table S3_ChipTable in driver.c
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enum S3_ChipType {
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enum ChipType {
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S3_TRIO64 = 1,
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S3_TRIO64_VP, // Trio64V+ has same ID as Trio64 but different revision number
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S3_TRIO64_UVP,
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@@ -106,33 +122,10 @@ enum MonitorType {
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};
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// Bitmap descriptor structures for BCI (for Savage chips)
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struct HIGH {
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unsigned short Stride;
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unsigned char Bpp;
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unsigned char ResBWTile;
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};
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struct BMPDESC1 {
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unsigned long Offset;
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HIGH HighPart;
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};
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struct BMPDESC2 {
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unsigned long LoPart;
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unsigned long HiPart;
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};
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union BMPDESC {
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BMPDESC1 bd1;
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BMPDESC2 bd2;
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};
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struct DisplayModeEx : display_mode {
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uint32 bpp; // bits/pixel
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uint32 bytesPerRow; // number of bytes in one line/row
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uint32 bpp; // bits/pixel
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uint32 bytesPerRow; // actual number of bytes in one line/row
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};
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@@ -147,6 +140,9 @@ struct SharedInfo {
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bool bAccelerantInUse; // true = accelerant has been initialized
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bool bInterruptAssigned; // card has a useable interrupt assigned to it
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bool bDisableHdwCursor; // true = disable hardware cursor & use software cursor
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bool bDisableAccelDraw; // true = disable accelerated drawing
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sem_id vertBlankSem; // vertical blank semaphore; if < 0, there is no semaphore
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// Memory mappings.
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@@ -169,11 +165,8 @@ struct SharedInfo {
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area_id modeArea; // area containing list of display modes the driver supports
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uint32 modeCount; // number of display modes in the list
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// Cursor info.
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struct {
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uint16 hot_x; // Cursor hot spot. Top left corner of the cursor
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uint16 hot_y; // is 0,0
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} cursor;
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uint16 cursorHotX; // Cursor hot spot. Top left corner of the cursor
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uint16 cursorHotY; // is 0,0
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// Current display mode configuration, and other parameters related to
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// current display mode.
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@@ -183,12 +176,7 @@ struct SharedInfo {
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edid1_info edidInfo;
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bool bHaveEDID; // true = EDID info from device is in edidInfo
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// Acceleration engine.
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struct {
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uint64 count; // last fifo slot used
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uint64 lastIdle; // last fifo slot we *know* the engine was idle after
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benaphore lock; // for serializing access to the acceleration engine
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} engine;
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Benaphore engineLock; // for serializing access to the acceleration engine
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int mclk;
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@@ -198,41 +186,39 @@ struct SharedInfo {
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uint16 panelY; // laptop LCD height
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// Command Overflow Buffer (COB) parameters for Savage chips.
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bool bDisableCOB; // enable/disable COB for Savage 4 & ProSavage
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uint32 cobIndex; // size index
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uint32 cobSize; // size in bytes
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uint32 cobSizeIndex; // size index
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uint32 cobOffset; // offset in video memory
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uint32 bciThresholdLo; // low and high thresholds for
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uint32 bciThresholdHi; // shadow status update (32bit words)
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BMPDESC GlobalBD; // Bitmap Descriptor for BCI
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uint32 globalBitmapDesc; // Global Bitmap Descriptor for BCI
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};
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// Set some boolean condition (like enabling or disabling interrupts)
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struct S3SetBoolState {
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uint32 magic; // magic number to make sure the caller groks us
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uint32 magic; // magic number
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bool bEnable; // state to set
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};
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// Retrieve the area_id of the kernel/accelerant shared info
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struct S3GetPrivateData {
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uint32 magic; // magic number to make sure the caller groks us
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uint32 magic; // magic number
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area_id sharedInfoArea; // ID of area containing shared information
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};
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struct S3GetSetPIO {
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uint32 magic; // magic number to make sure the caller groks us
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uint32 offset; // offset of PIO register to read/write
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uint32 size; // number of bytes to transfer
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uint32 value; // value to write or value that was read
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struct S3GetEDID {
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uint32 magic; // magic number
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edid1_raw rawEdid; // raw EDID info to obtain
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};
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#if defined(__cplusplus)
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}
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#endif
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struct S3GetSetPIO {
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uint32 magic; // magic number
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uint32 offset; // offset of PIO register to read/write
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uint32 size; // number of bytes to transfer
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uint32 value; // value to write or value that was read
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};
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#endif // DRIVERINTERFACE_H
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