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* Coding style cleanup.

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34407 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2009-12-01 12:58:49 +00:00
parent b834a54550
commit c1cb57b1b1
1 changed files with 89 additions and 88 deletions
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src/add-ons/kernel/drivers/power/enhanced_speedstep/frequency.cpp
+89 -88
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@@ -1,6 +1,15 @@
/*
* Copyright 2009, Haiku, Inc. All Rights Reserved.
* Distributed under the terms of the MIT License.
*
* Authors:
* Clemens Zeidler, [email protected]
*/
#include "frequency.h" #include "frequency.h"
#include <kernel/arch/x86/arch_cpu.h> #include <arch/x86/arch_cpu.h>
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
@@ -8,29 +17,29 @@
void void
est_get_id16(uint16 *id16_p) est_get_id16(uint16* _id16)
{ {
*id16_p = x86_read_msr(MSR_GET_FREQ_STATE) & 0xffff; *_id16 = x86_read_msr(MSR_GET_FREQ_STATE) & 0xffff;
} }
status_t status_t
est_set_id16(uint16 id16, bool need_check) est_set_id16(uint16 id16, bool needCheck)
{ {
uint64 msr; uint64 msr;
// Read the current register, mask out the old, set the new id. // Read the current register, mask out the old, set the new id.
msr = x86_read_msr(MSR_GET_FREQ_STATE); msr = x86_read_msr(MSR_GET_FREQ_STATE);
msr = (msr & ~0xffff) | id16; msr = (msr & ~0xffff) | id16;
x86_write_msr(MSR_SET_FREQ_STATE, msr); x86_write_msr(MSR_SET_FREQ_STATE, msr);
if (need_check) { if (needCheck) {
// Wait a short while for the new setting. XXX Is this necessary? // Wait a short while for the new setting. XXX Is this necessary?
snooze(EST_TRANS_LAT); snooze(EST_TRANS_LAT);
uint16 new_id16; uint16 newID16;
est_get_id16(&new_id16); est_get_id16(&newID16);
if (new_id16 != id16) if (newID16 != id16)
return B_ERROR; return B_ERROR;
TRACE("EST: set frequency ok, id %i\n", id16); TRACE("EST: set frequency ok, id %i\n", id16);
} }
@@ -38,24 +47,21 @@ est_set_id16(uint16 id16, bool need_check)
} }
freq_info * freq_info*
est_get_current(freq_info *freq_list) est_get_current(freq_info* list)
{ {
freq_info *f; // Try a few times to get a valid value. Sometimes, if the CPU
int i; // is in the middle of an asynchronous transition (i.e., P4TCC),
uint16 id16; // we get a temporary invalid result.
for (uint32 i = 0; i < 5; i++) {
/* uint16 id16;
* Try a few times to get a valid value. Sometimes, if the CPU
* is in the middle of an asynchronous transition (i.e., P4TCC),
* we get a temporary invalid result.
*/
for (i = 0; i < 5; i++) {
est_get_id16(&id16); est_get_id16(&id16);
for (f = freq_list; f->id != 0; f++) {
if (f->id == id16) for (freq_info* info = list; info->id != 0; info++) {
return (f); if (info->id == id16)
return info;
} }
snooze(100); snooze(100);
} }
return NULL; return NULL;
@@ -63,21 +69,18 @@ est_get_current(freq_info *freq_list)
status_t status_t
est_get_info(freq_info **freqsInfo) est_get_info(freq_info** _frequencyInfos)
{ {
uint64 msr; uint64 msr = x86_read_msr(MSR_GET_FREQ_STATE);
status_t error = B_ERROR; status_t status = est_table_info(msr, _frequencyInfos);
if (status != B_OK) {
msr = x86_read_msr(MSR_GET_FREQ_STATE);
error = est_table_info(msr, freqsInfo);
if (error != B_OK) {
TRACE("EST: Get frequency table from model specific register\n"); TRACE("EST: Get frequency table from model specific register\n");
error = est_msr_info(msr, freqsInfo); status = est_msr_info(msr, _frequencyInfos);
} }
if (error) { if (status != B_OK) {
TRACE("est: CPU supports Enhanced Speedstep, but is not recognized.\n"); TRACE("est: CPU supports Enhanced Speedstep, but is not recognized.\n");
return error; return status;
} }
return B_OK; return B_OK;
@@ -85,32 +88,31 @@ est_get_info(freq_info **freqsInfo)
status_t status_t
est_table_info(uint64 msr, freq_info **freqs) est_table_info(uint64 msr, freq_info** _frequencyInfos)
{ {
ss_cpu_info *p; // Find a table which matches (vendor, id32).
uint32 id; system_info info;
if (get_system_info(&info) != B_OK)
return B_ERROR;
/* Find a table which matches (vendor, id32). */ ss_cpu_info* cpuInfo;
system_info sysInfo; uint32 id = msr >> 32;
if (get_system_info(&sysInfo) != B_OK) for (cpuInfo = ESTprocs; cpuInfo->id32 != 0; cpuInfo++) {
return B_ERROR; if (cpuInfo->vendor_id == uint32(info.cpu_type & B_CPU_x86_VENDOR_MASK)
id = msr >> 32; && cpuInfo->id32 == id)
for (p = ESTprocs; p->id32 != 0; p++) { break;
if (p->vendor_id == uint32(sysInfo.cpu_type & B_CPU_x86_VENDOR_MASK) }
&& p->id32 == id) if (cpuInfo->id32 == 0)
break; return B_ERROR;
}
if (p->id32 == 0)
return B_ERROR;
/* Make sure the current setpoint is valid. */ // Make sure the current setpoint is valid.
if (est_get_current(p->freqtab) == NULL) { if (est_get_current(cpuInfo->freqtab) == NULL) {
TRACE("current setting not found in table\n"); TRACE("current setting not found in table\n");
return B_ERROR; return B_ERROR;
} }
*freqs = p->freqtab; *_frequencyInfos = cpuInfo->freqtab;
return B_OK; return B_OK;
} }
@@ -128,26 +130,22 @@ bus_speed_ok(int bus)
} }
} }
/*
* Flesh out a simple rate table containing the high and low frequencies
* based on the current clock speed and the upper 32 bits of the MSR.
*/
status_t
est_msr_info(uint64 msr, freq_info **freqs)
{
freq_info *fp;
int32 bus, freq, volts;
uint16 id;
/*! Flesh out a simple rate table containing the high and low frequencies
based on the current clock speed and the upper 32 bits of the MSR.
*/
status_t
est_msr_info(uint64 msr, freq_info** _frequencyInfos)
{
// Figure out the bus clock. // Figure out the bus clock.
system_info sysInfo; system_info info;
if (get_system_info(&sysInfo) != B_OK) if (get_system_info(&info) != B_OK)
return B_ERROR; return B_ERROR;
freq = sysInfo.cpu_clock_speed / 1000000; int32 freq = info.cpu_clock_speed / 1000000;
id = msr >> 32; uint16 id = msr >> 32;
bus = freq / (id >> 8); int32 bus = freq / (id >> 8);
TRACE("est: Guessed bus clock (high) of %d MHz\n", int(bus)); TRACE("est: Guessed bus clock (high) of %d MHz\n", int(bus));
if (!bus_speed_ok(bus)) { if (!bus_speed_ok(bus)) {
// We may be running on the low frequency. // We may be running on the low frequency.
@@ -156,26 +154,29 @@ est_msr_info(uint64 msr, freq_info **freqs)
TRACE("est: Guessed bus clock (low) of %d MHz\n", int(bus)); TRACE("est: Guessed bus clock (low) of %d MHz\n", int(bus));
if (!bus_speed_ok(bus)) if (!bus_speed_ok(bus))
return B_ERROR; return B_ERROR;
// Calculate high frequency. // Calculate high frequency.
id = msr >> 32; id = msr >> 32;
freq = ((id >> 8) & 0xff) * bus; freq = ((id >> 8) & 0xff) * bus;
} }
// Fill out a new freq table containing just the high and low freqs. // Fill out a new freq table containing just the high and low freqs.
fp = (freq_info*)malloc(sizeof(freq_info) * 3); freq_info* frequencyInfo = (freq_info*)malloc(sizeof(freq_info) * 3);
memset(fp, 0, sizeof(freq_info) * 3); if (frequencyInfo == NULL)
return B_NO_MEMORY;
memset(frequencyInfo, 0, sizeof(freq_info) * 3);
// First, the high frequency. // First, the high frequency.
volts = id & 0xff; int32 volts = id & 0xff;
if (volts != 0) { if (volts != 0) {
volts <<= 4; volts <<= 4;
volts += 700; volts += 700;
} }
fp[0].frequency = freq; frequencyInfo[0].frequency = freq;
fp[0].volts = volts; frequencyInfo[0].volts = volts;
fp[0].id = id; frequencyInfo[0].id = id;
fp[0].power = CPUFREQ_VAL_UNKNOWN; frequencyInfo[0].power = CPUFREQ_VAL_UNKNOWN;
TRACE("Guessed high setting of %d MHz @ %d Mv\n", int(freq), int(volts)); TRACE("Guessed high setting of %d MHz @ %d Mv\n", int(freq), int(volts));
// Second, the low frequency. // Second, the low frequency.
@@ -186,13 +187,13 @@ est_msr_info(uint64 msr, freq_info **freqs)
volts <<= 4; volts <<= 4;
volts += 700; volts += 700;
} }
fp[1].frequency = freq; frequencyInfo[1].frequency = freq;
fp[1].volts = volts; frequencyInfo[1].volts = volts;
fp[1].id = id; frequencyInfo[1].id = id;
fp[1].power = CPUFREQ_VAL_UNKNOWN; frequencyInfo[1].power = CPUFREQ_VAL_UNKNOWN;
TRACE("Guessed low setting of %d MHz @ %d Mv\n", int(freq), int(volts)); TRACE("Guessed low setting of %d MHz @ %d Mv\n", int(freq), int(volts));
// Table is already terminated due to M_ZERO. // Table is already terminated due to M_ZERO.
*freqs = fp; *_frequencyInfos = frequencyInfo;
return B_OK; return B_OK;
} }