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* B_MOVE_DISPLAY and B_SET_INDEXED_COLORS should now work for the digital

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output as well.
* Obviously got the register for INTEL_DISPLAY_B_DIGITAL_PORT wrong - it's
  not 0x61000 but 0x61140, maybe that can explain the fun we had at BeGeistert :)
* Renamed the analog display registers to better fit the digital ones, ie.
  replaced DISPLAY with DISPLAY_A - although this might be not really correct
  as it seems that the pipes can be selected arbitrarily.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17566 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2006-05-23 16:51:40 +00:00
parent a0902420ff
commit c5f5d8347e
5 changed files with 69 additions and 53 deletions
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headers/private/graphics/intel_extreme/intel_extreme.h
+25 -19
View File
@@ -181,17 +181,17 @@ struct intel_free_graphics_memory {
#define INTEL_RING_BUFFER_ENABLED 1
// display A
#define INTEL_DISPLAY_HTOTAL 0x60000
#define INTEL_DISPLAY_HBLANK 0x60004
#define INTEL_DISPLAY_HSYNC 0x60008
#define INTEL_DISPLAY_VTOTAL 0x6000c
#define INTEL_DISPLAY_VBLANK 0x60010
#define INTEL_DISPLAY_VSYNC 0x60014
#define INTEL_DISPLAY_IMAGE_SIZE 0x6001c
#define INTEL_DISPLAY_A_HTOTAL 0x60000
#define INTEL_DISPLAY_A_HBLANK 0x60004
#define INTEL_DISPLAY_A_HSYNC 0x60008
#define INTEL_DISPLAY_A_VTOTAL 0x6000c
#define INTEL_DISPLAY_A_VBLANK 0x60010
#define INTEL_DISPLAY_A_VSYNC 0x60014
#define INTEL_DISPLAY_A_IMAGE_SIZE 0x6001c
#define INTEL_DISPLAY_CONTROL 0x70180
#define INTEL_DISPLAY_BASE 0x70184
#define INTEL_DISPLAY_BYTES_PER_ROW 0x70188
#define INTEL_DISPLAY_A_CONTROL 0x70180
#define INTEL_DISPLAY_A_BASE 0x70184
#define INTEL_DISPLAY_A_BYTES_PER_ROW 0x70188
#define DISPLAY_CONTROL_ENABLED (1UL << 31)
#define DISPLAY_CONTROL_GAMMA (1UL << 30)
#define DISPLAY_CONTROL_COLOR_MASK (0x0fUL << 26)
@@ -200,20 +200,20 @@ struct intel_free_graphics_memory {
#define DISPLAY_CONTROL_RGB16 (5UL << 26)
#define DISPLAY_CONTROL_RGB32 (7UL << 26)
#define DISPLAY_VGA_DISPLAY_CONTROL 0x71400
#define INTEL_VGA_DISPLAY_CONTROL 0x71400
#define VGA_DISPLAY_DISABLED (1UL << 31)
#define INTEL_DISPLAY_PALETTE 0x0a000
#define INTEL_DISPLAY_A_PALETTE 0x0a000
#define INTEL_DISPLAY_PIPE_CONTROL 0x70008
#define INTEL_DISPLAY_A_PIPE_CONTROL 0x70008
#define DISPLAY_PIPE_ENABLED (1UL << 31)
#define INTEL_DISPLAY_PIPE_STATUS 0x70024
#define INTEL_DISPLAY_A_PIPE_STATUS 0x70024
#define DISPLAY_PIPE_VBLANK_ENABLED (1UL << 17)
#define DISPLAY_PIPE_VBLANK_STATUS (1UL << 1)
#define INTEL_DISPLAY_PLL 0x06014
#define INTEL_DISPLAY_PLL_DIVISOR_0 0x06040
#define INTEL_DISPLAY_PLL_DIVISOR_1 0x06044
#define INTEL_DISPLAY_A_PLL 0x06014
#define INTEL_DISPLAY_A_PLL_DIVISOR_0 0x06040
#define INTEL_DISPLAY_A_PLL_DIVISOR_1 0x06044
#define DISPLAY_PLL_ENABLED (1UL << 31)
#define DISPLAY_PLL_2X_CLOCK (1UL << 30)
#define DISPLAY_PLL_SYNC_LOCK_ENABLED (1UL << 29)
@@ -229,7 +229,7 @@ struct intel_free_graphics_memory {
#define DISPLAY_PLL_M1_DIVISOR_SHIFT 8
#define DISPLAY_PLL_M2_DIVISOR_SHIFT 0
#define INTEL_DISPLAY_ANALOG_PORT 0x61100
#define INTEL_DISPLAY_A_ANALOG_PORT 0x61100
#define DISPLAY_MONITOR_PORT_ENABLED (1UL << 31)
#define DISPLAY_MONITOR_VGA_POLARITY (1UL << 15)
#define DISPLAY_MONITOR_MODE_MASK (3UL << 10)
@@ -242,7 +242,7 @@ struct intel_free_graphics_memory {
#define DISPLAY_MONITOR_POSITIVE_VSYNC (2UL << 3)
// display B
#define INTEL_DISPLAY_B_DIGITAL_PORT 0x61000
#define INTEL_DISPLAY_B_DIGITAL_PORT 0x61140
#define INTEL_DISPLAY_B_IMAGE_SIZE 0x6101c
#define INTEL_DISPLAY_B_PIPE_CONTROL 0x71008
@@ -251,6 +251,12 @@ struct intel_free_graphics_memory {
#define INTEL_DISPLAY_B_BASE 0x71184
#define INTEL_DISPLAY_B_BYTES_PER_ROW 0x71188
#define INTEL_DISPLAY_B_PALETTE 0x0a800
#define INTEL_DISPLAY_A_DIGITAL_PORT 0x61120
#define INTEL_DISPLAY_C_DIGITAL 0x61160
#define INTEL_DISPLAY_LVDS_PORT 0x61180
// cursor
#define INTEL_CURSOR_CONTROL 0x70080
#define INTEL_CURSOR_BASE 0x70084