From c65998fa11aa65b268f3e399bb6ded595349b0a8 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Tue, 16 Mar 2004 11:15:30 +0000 Subject: [PATCH] NV11 panel update; widescreen panel aspect programming added git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7003 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../private/graphics/nvidia/DriverInterface.h | 2 + .../accelerants/nvidia/engine/nv_crtc.c | 49 ++++++++++++++----- .../accelerants/nvidia/engine/nv_crtc2.c | 49 ++++++++++++++----- .../accelerants/nvidia/engine/nv_general.c | 2 +- .../accelerants/nvidia/engine/nv_info.c | 20 +++++--- .../drivers/graphics/nvidia/UPDATE.html | 3 +- 6 files changed, 91 insertions(+), 34 deletions(-) diff --git a/headers/private/graphics/nvidia/DriverInterface.h b/headers/private/graphics/nvidia/DriverInterface.h index 0361369a4f..94f577cfbc 100644 --- a/headers/private/graphics/nvidia/DriverInterface.h +++ b/headers/private/graphics/nvidia/DriverInterface.h @@ -228,8 +228,10 @@ typedef struct { bool tmds2_active; /* found panel on CRTC2 that is active */ uint16 panel1_width; /* native horizontal resolution for digital panels */ uint16 panel1_height; /* navive vertical resolution for digital panels */ + float panel1_aspect; /* panel's aspect ratio */ uint16 panel2_width; /* native horizontal resolution for digital panels */ uint16 panel2_height; /* navive vertical resolution for digital panels */ + float panel2_aspect; /* panel's aspect ratio */ uint32 tvout_chip_type; /* see tvchip_type enum above */ status_t pins_status; /* B_OK if read correctly, B_ERROR if faked */ diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c index a3ff669b03..4cdce14bae 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c @@ -111,9 +111,11 @@ status_t nv_crtc_set_timing(display_mode target) LOG(2,("CRTC: DFP active: tuning modeline\n")); /* horizontal timing */ - target.timing.h_total = target.timing.h_display + 128; - target.timing.h_sync_start = target.timing.h_total - 112; - target.timing.h_sync_end = target.timing.h_total - 16; + //fixme (?): maybe we need real modeline calculations here... + //testing (640x480): total = 135% is too much, 120% to small... + target.timing.h_total = target.timing.h_display + 160;//128 + target.timing.h_sync_start = target.timing.h_total - 144;//112 + target.timing.h_sync_end = target.timing.h_total - 48;//16 /* vertical timing */ target.timing.v_total = target.timing.v_display + 6; @@ -261,7 +263,6 @@ status_t nv_crtc_set_timing(display_mode target) { uint32 iscale_x, iscale_y; - //fixme: checkout upscaling and aspect!!! /* calculate needed inverse scaling factors in 20.12 format */ iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel1_width); iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel1_height); @@ -271,7 +272,7 @@ status_t nv_crtc_set_timing(display_mode target) CRTCW(FP_VTIMING, 0); /* nVidia cards support upscaling except on NV11 */ - if (si->ps.card_arch == NV11) + if (si->ps.card_type == NV11) { /* disable last fetched line limiting */ DACW(FP_DEBUG2, 0x00000000); @@ -291,22 +292,44 @@ status_t nv_crtc_set_timing(display_mode target) { LOG(2,("CRTC: GPU scales for DFP if needed\n")); - /* GPU scaling is automatically setup by hardware */ -//fixme: checkout non 4:3 aspect scaling. -// DACW(FP_DEBUG3, (iscale_x & 0x00001fff) | ((iscale_y & 0x00001fff) << 16)); -// temp = (((iscale_x >> 1) & 0x00000fff) | (((iscale_y >> 1) & 0x00000fff) << 16)); -// DACW(FP_DEBUG1, (temp | (1 << 12) | (1 << 28))); - /* limit last fetched line if vertical scaling is done */ if (iscale_y != (1 << 12)) DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16))); -//not needed apparantly: -// ((1 << 12) | ((target.timing.h_display - 1) << 0))); else DACW(FP_DEBUG2, 0x00000000); /* inform panel not to scale */ DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff)); + + /* disable GPU scaling testmode so automatic scaling is done */ + DACW(FP_DEBUG1, 0); + + /* GPU scaling is automatically setup by hardware, so only modify this + * scalingfactor for non 4:3 (1.33) aspect panels; + * let's consider 1280x1024 1:33 aspect (it's 1.25 aspect actually!) */ + + /* correct for landscape non 4:3 aspect panels... */ + /* known non 4:3 aspect panels: + * 1280 x 800 (1.60), + * 1440 x 900 (1.60), + * 1680 x 1050 (1.60). */ + /* known 4:3 aspect non-standard resolution panels: + * 1400 x 1050 (1.33). */ + if ((iscale_x != (1 << 12)) && (si->ps.panel1_aspect > 1.34)) + { + LOG(2,("CRTC: non 4:3 aspect landscape panel: tuning horizontal scaling\n")); + /* X-scaling should be the same as Y-scaling, + * except for 1280 x 1024 panels(!) */ + iscale_x = iscale_y * (1.33333333 / si->ps.panel1_aspect); + /* enable testmode (b12) and program new X-scaling factor */ + DACW(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12))); + } + /* correct for portrait panels... */ + if ((iscale_y != (1 << 12)) && (si->ps.panel1_aspect < 1.25)) + { + LOG(2,("CRTC: portrait aspect panel: should tune vertical scaling\n")); + /* fixme?: implement... */ + } } /* do some logging.. */ diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c index 3e5a6ef82e..2593cac8bc 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c @@ -97,9 +97,11 @@ status_t nv_crtc2_set_timing(display_mode target) LOG(2,("CRTC2: DFP active: tuning modeline\n")); /* horizontal timing */ - target.timing.h_total = target.timing.h_display + 128; - target.timing.h_sync_start = target.timing.h_total - 112; - target.timing.h_sync_end = target.timing.h_total - 16; + //fixme (?): maybe we need real modeline calculations here... + //testing (640x480): total = 135% is too much, 120% to small... + target.timing.h_total = target.timing.h_display + 160;//128 + target.timing.h_sync_start = target.timing.h_total - 144;//112 + target.timing.h_sync_end = target.timing.h_total - 48;//16 /* vertical timing */ target.timing.v_total = target.timing.v_display + 6; @@ -244,7 +246,6 @@ status_t nv_crtc2_set_timing(display_mode target) { uint32 iscale_x, iscale_y; - //fixme: checkout upscaling and aspect!!! /* calculate needed inverse scaling factors in 20.12 format */ iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel2_width); iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel2_height); @@ -254,7 +255,7 @@ status_t nv_crtc2_set_timing(display_mode target) CRTC2W(FP_VTIMING, 0); /* nVidia cards support upscaling except on NV11 */ - if (si->ps.card_arch == NV11) + if (si->ps.card_type == NV11) { /* disable last fetched line limiting */ DAC2W(FP_DEBUG2, 0x00000000); @@ -274,22 +275,44 @@ status_t nv_crtc2_set_timing(display_mode target) { LOG(2,("CRTC2: GPU scales for DFP if needed\n")); - /* GPU scaling is automatically setup by hardware */ -//fixme: checkout non 4:3 aspect scaling. -// DAC2W(FP_DEBUG3, (iscale_x & 0x00001fff) | ((iscale_y & 0x00001fff) << 16)); -// temp = (((iscale_x >> 1) & 0x00000fff) | (((iscale_y >> 1) & 0x00000fff) << 16)); -// DAC2W(FP_DEBUG1, (temp | (1 << 12) | (1 << 28))); - /* limit last fetched line if vertical scaling is done */ if (iscale_y != (1 << 12)) DAC2W(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16))); -//not needed apparantly: -// ((1 << 12) | ((target.timing.h_display - 1) << 0))); else DAC2W(FP_DEBUG2, 0x00000000); /* inform panel not to scale */ DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff)); + + /* disable GPU scaling testmode so automatic scaling is done */ + DAC2W(FP_DEBUG1, 0); + + /* GPU scaling is automatically setup by hardware, so only modify this + * scalingfactor for non 4:3 (1.33) aspect panels; + * let's consider 1280x1024 1:33 aspect (it's 1.25 aspect actually!) */ + + /* correct for landscape non 4:3 aspect panels... */ + /* known non 4:3 aspect panels: + * 1280 x 800 (1.60), + * 1440 x 900 (1.60), + * 1680 x 1050 (1.60). */ + /* known 4:3 aspect non-standard resolution panels: + * 1400 x 1050 (1.33). */ + if ((iscale_x != (1 << 12)) && (si->ps.panel2_aspect > 1.34)) + { + LOG(2,("CRTC2: non 4:3 aspect landscape panel: tuning horizontal scaling\n")); + /* X-scaling should be the same as Y-scaling, + * except for 1280 x 1024 panels(!) */ + iscale_x = iscale_y * (1.33333333 / si->ps.panel2_aspect); + /* enable testmode (b12) and program new X-scaling factor */ + DAC2W(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12))); + } + /* correct for portrait panels... */ + if ((iscale_y != (1 << 12)) && (si->ps.panel2_aspect < 1.25)) + { + LOG(2,("CRTC2: portrait aspect panel: should tune vertical scaling\n")); + /* fixme?: implement... */ + } } /* do some logging.. */ diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c index 00478b070a..78c97d85e4 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_general.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c @@ -80,7 +80,7 @@ status_t nv_general_powerup() { status_t status; - LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-6 running.\n")); + LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-7 running.\n")); /* preset no laptop */ si->ps.laptop = false; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c index 72452fb7d0..77df6c2e2f 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_info.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c @@ -296,8 +296,10 @@ static void detect_panels() /* do some presets */ si->ps.panel1_width = 0; si->ps.panel1_height = 0; + si->ps.panel1_aspect = 0; si->ps.panel2_width = 0; si->ps.panel2_height = 0; + si->ps.panel2_aspect = 0; si->ps.slaved_tmds1 = false; si->ps.slaved_tmds2 = false; si->ps.master_tmds1 = false; @@ -324,7 +326,7 @@ static void detect_panels() si->ps.panel1_height = height; } } - if ((si->ps.card_arch != NV11) && + if ((si->ps.card_type != NV11) && si->ps.secondary_head && slaved_for_dev2 && !tvout2) { uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1); @@ -349,7 +351,7 @@ static void detect_panels() si->ps.panel1_height = height; } } - if ((si->ps.card_arch != NV11) && + if ((si->ps.card_type != NV11) && si->ps.secondary_head && !si->ps.slaved_tmds2 && !tvout2) { uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1); @@ -364,6 +366,12 @@ static void detect_panels() } } + /* determine panel(s) aspect ratio(s) */ + if (si->ps.tmds1_active) + si->ps.panel1_aspect = (si->ps.panel1_width / ((float)si->ps.panel1_height)); + if (si->ps.tmds2_active) + si->ps.panel2_aspect = (si->ps.panel2_width / ((float)si->ps.panel2_height)); + /* dump some panel configuration registers... */ LOG(2,("INFO: Dumping flatpanel registers:\n")); LOG(2,("DAC1: FP_HDISPEND: $%08x = (dec) %d\n", DACR(FP_HDISPEND),DACR(FP_HDISPEND))); @@ -864,15 +872,15 @@ void dump_pins(void) { LOG(2,("found DFP (digital flatpanel) on CRTC1; CRTC1 is ")); if (si->ps.slaved_tmds1) LOG(2,("slaved\n")); else LOG(2,("master\n")); - LOG(2,("panel width: %d, height: %d\n", - si->ps.panel1_width, si->ps.panel1_height)); + LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n", + si->ps.panel1_width, si->ps.panel1_height, si->ps.panel1_aspect)); } if (si->ps.tmds2_active) { LOG(2,("found DFP (digital flatpanel) on CRTC2; CRTC2 is ")); if (si->ps.slaved_tmds2) LOG(2,("slaved\n")); else LOG(2,("master\n")); - LOG(2,("panel width: %d, height: %d\n", - si->ps.panel2_width, si->ps.panel2_height)); + LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n", + si->ps.panel2_width, si->ps.panel2_height, si->ps.panel2_aspect)); } LOG(2,("INFO: end pinsdump.\n")); } diff --git a/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html b/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html index b8689b0cb0..521f4d0c18 100644 --- a/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html +++ b/src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html @@ -4,13 +4,14 @@

Changes done for each driverversion:

-

head (0.10-6), (Rudolf)

+

head (0.10-7), (Rudolf)

NOTE: