Work in progress while trying to fix ticket #2227:

- Removed most of the currently fixup code as, at least on my machine, 
  it was messing stuff up. This makes the PATA controller work in IDE 
  mode!
- Added comments to clarify things and TODOs about what is still missing 
  (specially getting AHCI mode working).

Marcus, please review.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26844 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Bruno G. Albuquerque
2008-08-06 18:57:56 +00:00
parent f7c226f467
commit c93ffc4a03
@@ -1,5 +1,5 @@
/* /*
* Copyright 2007-2008, Marcus Overhagen. All rights reserved. * Copyright 2007, Marcus Overhagen. All rights reserved.
* Distributed under the terms of the MIT License. * Distributed under the terms of the MIT License.
*/ */
@@ -19,14 +19,16 @@ static void
jmicron_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device, jmicron_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device,
uint8 function, uint16 deviceId) uint8 function, uint16 deviceId)
{ {
switch (deviceId) // We only care about devices with function 0.
{ if (function != 0)
return;
// And only devices with combined SATA/PATA.
switch (deviceId) {
case 0x2361: // 1 SATA, 1 PATA case 0x2361: // 1 SATA, 1 PATA
case 0x2363: // 2 SATA, 1 PATA case 0x2363: // 2 SATA, 1 PATA
case 0x2366: // 2 SATA, 2 PATA case 0x2366: // 2 SATA, 2 PATA
break; break;
// case 0x2360: // 1 SATA
// case 0x2362: // 2 SATA
default: default:
return; return;
} }
@@ -34,32 +36,30 @@ jmicron_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device,
dprintf("jmicron_fixup_ahci: domain %u, bus %u, device %u, function %u, " dprintf("jmicron_fixup_ahci: domain %u, bus %u, device %u, function %u, "
"deviceId 0x%04x\n", domain, bus, device, function, deviceId); "deviceId 0x%04x\n", domain, bus, device, function, deviceId);
if (function == 0) uint32 val = pci->ReadConfig(domain, bus, device, function, 0xdc, 4);
{ if (!(val & (1 << 30))) {
dprintf("jmicron_fixup_ahci: 0x40: 0x%08lx\n", // IDE controller at function 1 is configured in IDE mode (as opposed
pci->ReadConfig(domain, bus, device, function, 0x40, 4)); // to AHCI or RAID). So we want to handle it.
dprintf("jmicron_fixup_ahci: 0xdc: 0x%08lx\n",
pci->ReadConfig(domain, bus, device, function, 0xdc, 4));
uint32 val = pci->ReadConfig(domain, bus, device, function, 0xdc, 4); dprintf("jmicron_fixup_ahci: PATA controller in IDE mode.\n");
if (!(val & (1 << 30)))
{ // TODO(bga): It seems that with recent BIOS revisions no special code
uint8 irq = pci->ReadConfig(domain, bus, device, function, 0x3c, 1); // is needed here. We still want to handle IRQ assignment as seen
dprintf("jmicron_fixup_ahci: enabling split device mode\n"); // below.
val &= ~(1 << 24);
val |= (1 << 25) | (1 << 30); // Read IRQ from controller at function 0 and assign this IRQ to the
pci->WriteConfig(domain, bus, device, function, 0xdc, 4, val); // controller at function 1.
val = pci->ReadConfig(domain, bus, device, function, 0x40, 4); uint8 irq = pci->ReadConfig(domain, bus, device, function, 0x3c, 1);
val &= ~(1 << 16); pci->WriteConfig(domain, bus, device, 1, 0x3c, 1, irq);
val |= (1 << 1) | (1 << 17) | (1 << 22); } else {
pci->WriteConfig(domain, bus, device, function, 0x40, 4, val); // TODO(bga): If the PATA controller is set to AHCI mode, the IDE
// Set IRQ for dfunction 2 (IDE) device. // driver will try to pick it up and will fail either because there is
pci->WriteConfig(domain, bus, device, 1, 0x3c, 1, irq); // no assigned IRQ or, if we assign an IRQ, because it errors-out when
} // detecting devices (probably because of the AHCI mode). Then the AHCI
dprintf("jmicron_fixup_ahci: 0x40: 0x%08lx\n", // driver picks the device up but fail to find the attached devices.
pci->ReadConfig(domain, bus, device, function, 0x40, 4)); // Maybe fixing this would be as simple as changing the device class to
dprintf("jmicron_fixup_ahci: 0xdc: 0x%08lx\n", // Serial ATA Controller instead of IDE Controller (even in AHCI mode
pci->ReadConfig(domain, bus, device, function, 0xdc, 4)); // it reports being a standard IDE controller)?
} }
} }
@@ -71,8 +71,7 @@ intel_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device, uint8 function,
// TODO(bga): disabled until the PCI manager can assign new resources. // TODO(bga): disabled until the PCI manager can assign new resources.
return; return;
switch (deviceId) switch (deviceId) {
{
case 0x2825: // ICH8 Desktop when in IDE emulation mode case 0x2825: // ICH8 Desktop when in IDE emulation mode
dprintf("intel_fixup_ahci: WARNING found ICH8 device id 0x2825\n"); dprintf("intel_fixup_ahci: WARNING found ICH8 device id 0x2825\n");
return; return;
@@ -100,8 +99,7 @@ intel_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device, uint8 function,
pci->ReadConfig(domain, bus, device, function, 0x90, 1)); pci->ReadConfig(domain, bus, device, function, 0x90, 1));
uint8 map = pci->ReadConfig(domain, bus, device, function, 0x90, 1); uint8 map = pci->ReadConfig(domain, bus, device, function, 0x90, 1);
if ((map >> 6) == 0) if ((map >> 6) == 0) {
{
uint32 bar5 = pci->ReadConfig(domain, bus, device, function, 0x24, 4); uint32 bar5 = pci->ReadConfig(domain, bus, device, function, 0x24, 4);
uint16 pcicmd = pci->ReadConfig(domain, bus, device, function, uint16 pcicmd = pci->ReadConfig(domain, bus, device, function,
PCI_command, 2); PCI_command, 2);
@@ -153,8 +151,7 @@ pci_fixup_device(PCI *pci, int domain, uint8 bus, uint8 device, uint8 function)
// dprintf("pci_fixup_device: domain %u, bus %u, device %u, function %u\n", // dprintf("pci_fixup_device: domain %u, bus %u, device %u, function %u\n",
// domain, bus, device, function); // domain, bus, device, function);
switch (vendorId) switch (vendorId) {
{
case 0x197b: case 0x197b:
jmicron_fixup_ahci(pci, domain, bus, device, function, deviceId); jmicron_fixup_ahci(pci, domain, bus, device, function, deviceId);
break; break;