* Now phys_addr_t should be used where needed.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37028 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2010-06-06 09:39:38 +00:00
parent d48edac1a6
commit cdfd124b11
3 changed files with 12 additions and 18 deletions
@@ -108,9 +108,9 @@ struct intel_shared_info {
area_id registers_area; // area of memory mapped registers area_id registers_area; // area of memory mapped registers
uint8* status_page; uint8* status_page;
addr_t physical_status_page; phys_addr_t physical_status_page;
uint8* graphics_memory; uint8* graphics_memory;
addr_t physical_graphics_memory; phys_addr_t physical_graphics_memory;
uint32 graphics_memory_size; uint32 graphics_memory_size;
addr_t frame_buffer; addr_t frame_buffer;
@@ -124,14 +124,14 @@ struct intel_shared_info {
int32 overlay_channel_used; int32 overlay_channel_used;
bool overlay_active; bool overlay_active;
uint32 overlay_token; uint32 overlay_token;
addr_t physical_overlay_registers; phys_addr_t physical_overlay_registers;
uint32 overlay_offset; uint32 overlay_offset;
bool hardware_cursor_enabled; bool hardware_cursor_enabled;
sem_id vblank_sem; sem_id vblank_sem;
uint8* cursor_memory; uint8* cursor_memory;
addr_t physical_cursor_memory; phys_addr_t physical_cursor_memory;
uint32 cursor_buffer_offset; uint32 cursor_buffer_offset;
uint32 cursor_format; uint32 cursor_format;
bool cursor_visible; bool cursor_visible;
@@ -1,5 +1,5 @@
/* /*
* Copyright 2006-2009, Haiku, Inc. All Rights Reserved. * Copyright 2006-2010, Haiku, Inc. All Rights Reserved.
* Distributed under the terms of the MIT License. * Distributed under the terms of the MIT License.
* *
* Authors: * Authors:
@@ -164,15 +164,10 @@ intel_free_memory(intel_info &info, addr_t base)
status_t status_t
intel_allocate_memory(intel_info &info, size_t size, size_t alignment, intel_allocate_memory(intel_info &info, size_t size, size_t alignment,
uint32 flags, addr_t *_base, addr_t *_physicalBase) uint32 flags, addr_t *_base, phys_addr_t *_physicalBase)
{ {
// TODO: _physicalBase should be phys_addr_t! return gGART->allocate_memory(info.aperture, size, alignment,
phys_addr_t physicalBase; flags, _base, _physicalBase);
status_t error = gGART->allocate_memory(info.aperture, size, alignment,
flags, _base, &physicalBase);
if (_physicalBase != NULL)
*_physicalBase = physicalBase;
return error;
} }
@@ -255,13 +250,12 @@ intel_extreme_init(intel_info &info)
write32(info.registers + 0x6208, (1L << 9) | (1L << 7) | (1L << 6)); write32(info.registers + 0x6208, (1L << 9) | (1L << 7) | (1L << 6));
write32(info.registers + 0x6210, 0); write32(info.registers + 0x6210, 0);
uint32 dspclk_gate_val = (1L << 28) | (1L << 3) | (1L << 2); uint32 gateValue = (1L << 28) | (1L << 3) | (1L << 2);
if ((info.device_type.type & INTEL_TYPE_MOBILE) == INTEL_TYPE_MOBILE) { if ((info.device_type.type & INTEL_TYPE_MOBILE) == INTEL_TYPE_MOBILE) {
dprintf("G4x mobile clock gating\n"); dprintf("G4x mobile clock gating\n");
dspclk_gate_val |= 1L << 18; gateValue |= 1L << 18;
} }
write32(info.registers + 0x6200, dspclk_gate_val) ; write32(info.registers + 0x6200, gateValue);
} else { } else {
dprintf("i965 quirk\n"); dprintf("i965 quirk\n");
write32(info.registers + 0x6204, (1L << 29) | (1L << 23)); write32(info.registers + 0x6204, (1L << 29) | (1L << 23));
@@ -40,7 +40,7 @@ struct intel_info {
extern status_t intel_free_memory(intel_info& info, addr_t offset); extern status_t intel_free_memory(intel_info& info, addr_t offset);
extern status_t intel_allocate_memory(intel_info& info, size_t size, extern status_t intel_allocate_memory(intel_info& info, size_t size,
size_t alignment, uint32 flags, addr_t* _offset, size_t alignment, uint32 flags, addr_t* _offset,
addr_t* _physicalBase = NULL); phys_addr_t* _physicalBase = NULL);
extern status_t intel_extreme_init(intel_info& info); extern status_t intel_extreme_init(intel_info& info);
extern void intel_extreme_uninit(intel_info& info); extern void intel_extreme_uninit(intel_info& info);