diff --git a/headers/private/kernel/arch/riscv64/arch_atomic.h b/headers/private/kernel/arch/riscv64/arch_atomic.h index 5ecc1e8749..8a10e814ed 100644 --- a/headers/private/kernel/arch/riscv64/arch_atomic.h +++ b/headers/private/kernel/arch/riscv64/arch_atomic.h @@ -12,24 +12,23 @@ static inline void memory_read_barrier_inline(void) { - asm volatile ("nop;" : : : "memory"); -#warning RISCV64: check memory_read_barrier_inline (FNOP ?) + // TODO: investigate reparate read/write barriers + __sync_synchronize(); } static inline void memory_write_barrier_inline(void) { - asm volatile ("nop;" : : : "memory"); -#warning RISCV64: check memory_write_barrier_inline (FNOP ?) + // TODO: investigate reparate read/write barriers + __sync_synchronize(); } static inline void memory_full_barrier_inline(void) { - asm volatile ("nop;" : : : "memory"); -#warning RISCV64: check memory_full_barrier_inline (FNOP ?) + __sync_synchronize(); } diff --git a/headers/private/kernel/arch/riscv64/arch_cpu.h b/headers/private/kernel/arch/riscv64/arch_cpu.h index e5efc8ac63..8ce944d47a 100644 --- a/headers/private/kernel/arch/riscv64/arch_cpu.h +++ b/headers/private/kernel/arch/riscv64/arch_cpu.h @@ -8,6 +8,7 @@ #include +#include #include @@ -15,8 +16,32 @@ #define CACHE_LINE_SIZE 64 -#define set_ac() -#define clear_ac() +static inline bool +get_ac() +{ + SstatusReg status(Sstatus()); + return status.sum != 0; +} + + +static inline void +set_ac() +{ + // TODO: Could be done atomically via CSRRS? + SstatusReg status(Sstatus()); + status.sum = 1; + SetSstatus(status.val); +} + + +static inline void +clear_ac() +{ + // TODO: Could be done atomically with CSRRC? + SstatusReg status(Sstatus()); + status.sum = 0; + SetSstatus(status.val); +} typedef struct arch_cpu_info { @@ -29,6 +54,9 @@ extern "C" { #endif +void __riscv64_setup_system_time(uint64 conversionFactor); + + static inline void arch_cpu_pause(void) { @@ -39,7 +67,7 @@ arch_cpu_pause(void) static inline void arch_cpu_idle(void) { - // TODO: CPU idle call + Wfi(); } diff --git a/headers/private/kernel/boot/platform/efi/arch_smp.h b/headers/private/kernel/boot/platform/efi/arch_smp.h index c95a9e19e9..4a87605391 100644 --- a/headers/private/kernel/boot/platform/efi/arch_smp.h +++ b/headers/private/kernel/boot/platform/efi/arch_smp.h @@ -8,9 +8,24 @@ #include +#ifdef __riscv + +struct CpuInfo { + uint32 id; +}; + +void arch_smp_register_cpu(CpuInfo** cpu); + +#endif + + int arch_smp_get_current_cpu(void); void arch_smp_init_other_cpus(void); +#ifdef __riscv +void arch_smp_boot_other_cpus(uint64 satp, uint64 kernel_entry); +#else void arch_smp_boot_other_cpus(uint32 pml4, uint64 kernel_entry); +#endif void arch_smp_add_safemode_menus(Menu *menu); void arch_smp_init(void); diff --git a/src/system/kernel/arch/riscv64/arch_cpu.cpp b/src/system/kernel/arch/riscv64/arch_cpu.cpp index c8fa731a13..d6a8000c69 100644 --- a/src/system/kernel/arch/riscv64/arch_cpu.cpp +++ b/src/system/kernel/arch/riscv64/arch_cpu.cpp @@ -8,8 +8,15 @@ #include #include +#include #include #include +#include +#include + + +extern uint32 gPlatform1; +extern uint32 gPlatform2; status_t @@ -32,6 +39,12 @@ arch_cpu_init_percpu(kernel_args *args, int curr_cpu) status_t arch_cpu_init(kernel_args *args) { +/* + uint64 conversionFactor + = (1LL << 32) * 1000000LL / args->arch_args.timerFrequrency; + + __riscv64_setup_system_time(conversionFactor); +*/ return B_OK; } @@ -39,6 +52,11 @@ arch_cpu_init(kernel_args *args) status_t arch_cpu_init_post_vm(kernel_args *args) { + // Set address space ownership to currently running threads + for (uint32 i = 0; i < args->num_cpus; i++) { + VMAddressSpace::Kernel()->Get(); + } + return B_OK; } @@ -95,5 +113,12 @@ arch_cpu_user_TLB_invalidate(void) status_t arch_cpu_shutdown(bool reboot) { + if (gPlatform1 == kPlatform1Sbi) { + sbi_system_reset( + reboot ? SBI_RESET_TYPE_COLD_REBOOT : SBI_RESET_TYPE_SHUTDOWN, + SBI_RESET_REASON_NONE); + } + + HtifShutdown(); return B_ERROR; }