From d0a92cb6536fb4cc82c74bf48e45ffa462cbf0e1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=A9r=C3=B4me=20Duval?= Date: Wed, 1 Feb 2017 16:57:03 +0100 Subject: [PATCH] x86: added a MSR definition. --- headers/private/kernel/arch/x86/arch_cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/headers/private/kernel/arch/x86/arch_cpu.h b/headers/private/kernel/arch/x86/arch_cpu.h index abdbb862d6..7f1731f645 100644 --- a/headers/private/kernel/arch/x86/arch_cpu.h +++ b/headers/private/kernel/arch/x86/arch_cpu.h @@ -49,8 +49,6 @@ #define IA32_MSR_MTRR_PHYSICAL_BASE_0 0x200 #define IA32_MSR_MTRR_PHYSICAL_MASK_0 0x201 -#define IA32_MSR_EFER 0xc0000080 - // MSR APIC BASE bits #define IA32_MSR_APIC_BASE_BSP 0x00000100 @@ -86,8 +84,10 @@ #define IA32_MSR_XSS 0x00000da0 // x86_64 MSRs. +#define IA32_MSR_EFER 0xc0000080 #define IA32_MSR_STAR 0xc0000081 #define IA32_MSR_LSTAR 0xc0000082 +#define IA32_MSR_CSTAR 0xc0000083 #define IA32_MSR_FMASK 0xc0000084 #define IA32_MSR_FS_BASE 0xc0000100 #define IA32_MSR_GS_BASE 0xc0000101