* add chipset flags vs isIGP

* we can now utilize these chipset
  flags throughout the driver to better id
  cards and features
* remove leftover BIOS size define from intel skel
* no *real* functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42904 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
2011-10-24 17:53:22 +00:00
parent 6f2ec43df7
commit d5c8ef5d69
4 changed files with 133 additions and 127 deletions
@@ -27,6 +27,7 @@
#define VENDOR_ID_ATI 0x1002 #define VENDOR_ID_ATI 0x1002
// Card models
#define RADEON_R520 0x0520 // Fudo #define RADEON_R520 0x0520 // Fudo
#define RADEON_R580 0x0580 // Rodin #define RADEON_R580 0x0580 // Rodin
#define RADEON_R600 0x0600 // Pele #define RADEON_R600 0x0600 // Pele
@@ -36,7 +37,12 @@
#define RADEON_R3000 0x3000 // Southern Islands #define RADEON_R3000 0x3000 // Southern Islands
#define RADEON_R4000 0x4000 // Not yet known / used #define RADEON_R4000 0x4000 // Not yet known / used
#define RADEON_VBIOS_SIZE 0x10000 // Card chipset flags
#define CHIP_STD (1 << 0) // Standard chipset
#define CHIP_IGP (1 << 1) // IGP chipset
#define CHIP_MOBILE (1 << 2) // Mobile chipset
#define CHIP_DISCREET (1 << 3) // Discreet chipset
#define CHIP_APU (1 << 4) // APU chipset
#define DEVICE_NAME "radeon_hd" #define DEVICE_NAME "radeon_hd"
#define RADEON_ACCELERANT_NAME "radeon_hd.accelerant" #define RADEON_ACCELERANT_NAME "radeon_hd.accelerant"
@@ -119,9 +125,9 @@ struct radeon_shared_info {
uint16 cursor_hot_y; uint16 cursor_hot_y;
uint16 device_chipset; uint16 device_chipset;
uint32 chipsetFlags;
uint8 dceMajor; uint8 dceMajor;
uint8 dceMinor; uint8 dceMinor;
bool isIGP;
char device_identifier[32]; char device_identifier[32];
}; };
@@ -43,82 +43,82 @@ const struct supported_device {
uint8 dceMajor; // Display block family uint8 dceMajor; // Display block family
uint8 dceMinor; // Display block family uint8 dceMinor; // Display block family
uint16 chipset; uint16 chipset;
bool isIGP; uint32 chipsetFlags;
const char* name; const char* name;
} kSupportedDevices[] = { } kSupportedDevices[] = {
// R400 Series (Radeon) DCE 0.0 (*very* early AtomBIOS) // R400 Series (Radeon) DCE 0.0 (*very* early AtomBIOS)
// R500 Series (Radeon Xxxx) DCE 1.0 // R500 Series (Radeon Xxxx) DCE 1.0
// R600 series (HD24xx - HD42xx) // R600 series (HD24xx - HD42xx)
// Codename: Pele // Codename: Pele
{0x94c7, 2, 0, RADEON_R600 | 0x10, false, "Radeon HD 2350"}, {0x94c7, 2, 0, RADEON_R600 | 0x10, CHIP_STD, "Radeon HD 2350"},
{0x94c1, 2, 0, RADEON_R600 | 0x10, true, "Radeon HD 2400"}, {0x94c1, 2, 0, RADEON_R600 | 0x10, CHIP_IGP, "Radeon HD 2400"},
{0x94c3, 2, 0, RADEON_R600 | 0x10, false, "Radeon HD 2400"}, {0x94c3, 2, 0, RADEON_R600 | 0x10, CHIP_STD, "Radeon HD 2400"},
{0x94cc, 2, 0, RADEON_R600 | 0x10, false, "Radeon HD 2400"}, {0x94cc, 2, 0, RADEON_R600 | 0x10, CHIP_STD, "Radeon HD 2400"},
{0x9586, 2, 0, RADEON_R600 | 0x30, false, "Radeon HD 2600"}, {0x9586, 2, 0, RADEON_R600 | 0x30, CHIP_STD, "Radeon HD 2600"},
{0x9588, 2, 0, RADEON_R600 | 0x30, false, "Radeon HD 2600"}, {0x9588, 2, 0, RADEON_R600 | 0x30, CHIP_STD, "Radeon HD 2600"},
{0x958a, 2, 0, RADEON_R600 | 0x30, false, "Radeon HD 2600 X2"}, {0x958a, 2, 0, RADEON_R600 | 0x30, CHIP_STD, "Radeon HD 2600 X2"},
// Radeon 2700 - RV630 // Radeon 2700 - RV630
{0x9400, 2, 0, RADEON_R600 | 0x00, false, "Radeon HD 2900"}, {0x9400, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon HD 2900"},
{0x9401, 2, 0, RADEON_R600 | 0x00, false, "Radeon HD 2900"}, {0x9401, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon HD 2900"},
{0x9402, 2, 0, RADEON_R600 | 0x00, false, "Radeon HD 2900"}, {0x9402, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon HD 2900"},
{0x9403, 2, 0, RADEON_R600 | 0x00, false, "Radeon HD 2900 Pro"}, {0x9403, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon HD 2900 Pro"},
{0x9405, 2, 0, RADEON_R600 | 0x00, false, "Radeon HD 2900"}, {0x9405, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon HD 2900"},
{0x940a, 2, 0, RADEON_R600 | 0x00, false, "Radeon FireGL V8650"}, {0x940a, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon FireGL V8650"},
{0x940b, 2, 0, RADEON_R600 | 0x00, false, "Radeon FireGL V8600"}, {0x940b, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon FireGL V8600"},
{0x940f, 2, 0, RADEON_R600 | 0x00, false, "Radeon FireGL V7600"}, {0x940f, 2, 0, RADEON_R600 | 0x00, CHIP_STD, "Radeon FireGL V7600"},
{0x9616, 2, 0, RADEON_R600 | 0x10, true, "Radeon HD 3000"}, {0x9616, 2, 0, RADEON_R600 | 0x10, CHIP_IGP, "Radeon HD 3000"},
{0x9611, 3, 0, RADEON_R600 | 0x20, true, "Radeon HD 3100"}, {0x9611, 3, 0, RADEON_R600 | 0x20, CHIP_IGP, "Radeon HD 3100"},
{0x9613, 3, 0, RADEON_R600 | 0x20, true, "Radeon HD 3100"}, {0x9613, 3, 0, RADEON_R600 | 0x20, CHIP_IGP, "Radeon HD 3100"},
{0x9610, 2, 0, RADEON_R600 | 0x10, true, "Radeon HD 3200"}, {0x9610, 2, 0, RADEON_R600 | 0x10, CHIP_IGP, "Radeon HD 3200"},
{0x9612, 2, 0, RADEON_R600 | 0x10, true, "Radeon HD 3200"}, {0x9612, 2, 0, RADEON_R600 | 0x10, CHIP_IGP, "Radeon HD 3200"},
{0x9615, 2, 0, RADEON_R600 | 0x10, true, "Radeon HD 3200"}, {0x9615, 2, 0, RADEON_R600 | 0x10, CHIP_IGP, "Radeon HD 3200"},
{0x9614, 2, 0, RADEON_R600 | 0x10, true, "Radeon HD 3300"}, {0x9614, 2, 0, RADEON_R600 | 0x10, CHIP_IGP, "Radeon HD 3300"},
// Radeon 3430 - RV620 // Radeon 3430 - RV620
{0x95c5, 3, 0, RADEON_R600 | 0x20, false, "Radeon HD 3450"}, {0x95c5, 3, 0, RADEON_R600 | 0x20, CHIP_STD, "Radeon HD 3450"},
{0x95c6, 3, 0, RADEON_R600 | 0x20, false, "Radeon HD 3450"}, {0x95c6, 3, 0, RADEON_R600 | 0x20, CHIP_STD, "Radeon HD 3450"},
{0x95c7, 3, 0, RADEON_R600 | 0x20, false, "Radeon HD 3450"}, {0x95c7, 3, 0, RADEON_R600 | 0x20, CHIP_STD, "Radeon HD 3450"},
{0x95c9, 3, 0, RADEON_R600 | 0x20, false, "Radeon HD 3450"}, {0x95c9, 3, 0, RADEON_R600 | 0x20, CHIP_STD, "Radeon HD 3450"},
{0x95c4, 3, 0, RADEON_R600 | 0x20, false, "Radeon HD 3470"}, {0x95c4, 3, 0, RADEON_R600 | 0x20, CHIP_STD, "Radeon HD 3470"},
{0x95c0, 3, 0, RADEON_R600 | 0x20, false, "Radeon HD 3550"}, {0x95c0, 3, 0, RADEON_R600 | 0x20, CHIP_STD, "Radeon HD 3550"},
{0x9581, 2, 0, RADEON_R600 | 0x30, false, "Radeon HD 3600"}, {0x9581, 2, 0, RADEON_R600 | 0x30, CHIP_STD, "Radeon HD 3600"},
{0x9583, 2, 0, RADEON_R600 | 0x30, false, "Radeon HD 3600"}, {0x9583, 2, 0, RADEON_R600 | 0x30, CHIP_STD, "Radeon HD 3600"},
{0x9598, 2, 0, RADEON_R600 | 0x30, false, "Radeon HD 3600"}, {0x9598, 2, 0, RADEON_R600 | 0x30, CHIP_STD, "Radeon HD 3600"},
{0x9591, 3, 0, RADEON_R600 | 0x35, false, "Radeon HD 3600"}, {0x9591, 3, 0, RADEON_R600 | 0x35, CHIP_STD, "Radeon HD 3600"},
{0x9589, 2, 0, RADEON_R600 | 0x30, false, "Radeon HD 3610"}, {0x9589, 2, 0, RADEON_R600 | 0x30, CHIP_STD, "Radeon HD 3610"},
// Radeon 3650 - RV635 // Radeon 3650 - RV635
// Radeon 3670 - RV635 // Radeon 3670 - RV635
{0x9507, 2, 0, RADEON_R600 | 0x70, false, "Radeon HD 3830"}, {0x9507, 2, 0, RADEON_R600 | 0x70, CHIP_STD, "Radeon HD 3830"},
{0x9505, 2, 0, RADEON_R600 | 0x70, false, "Radeon HD 3850"}, {0x9505, 2, 0, RADEON_R600 | 0x70, CHIP_STD, "Radeon HD 3850"},
{0x9513, 2, 0, RADEON_R600 | 0x80, false, "Radeon HD 3850 X2"}, {0x9513, 2, 0, RADEON_R600 | 0x80, CHIP_STD, "Radeon HD 3850 X2"},
{0x9501, 2, 0, RADEON_R600 | 0x70, false, "Radeon HD 3870"}, {0x9501, 2, 0, RADEON_R600 | 0x70, CHIP_STD, "Radeon HD 3870"},
{0x950F, 2, 0, RADEON_R600 | 0x80, false, "Radeon HD 3870 X2"}, {0x950F, 2, 0, RADEON_R600 | 0x80, CHIP_STD, "Radeon HD 3870 X2"},
{0x9710, 3, 0, RADEON_R600 | 0x20, true, "Radeon HD 4200"}, {0x9710, 3, 0, RADEON_R600 | 0x20, CHIP_IGP, "Radeon HD 4200"},
{0x9715, 3, 0, RADEON_R600 | 0x20, true, "Radeon HD 4250"}, {0x9715, 3, 0, RADEON_R600 | 0x20, CHIP_IGP, "Radeon HD 4250"},
{0x9712, 3, 0, RADEON_R600 | 0x20, true, "Radeon HD 4270"}, {0x9712, 3, 0, RADEON_R600 | 0x20, CHIP_IGP, "Radeon HD 4270"},
{0x9714, 3, 0, RADEON_R600 | 0x20, true, "Radeon HD 4290"}, {0x9714, 3, 0, RADEON_R600 | 0x20, CHIP_IGP, "Radeon HD 4290"},
// R700 series (HD4330 - HD4890, HD51xx, HD5xxV) // R700 series (HD4330 - HD4890, HD51xx, HD5xxV)
// Codename: Wekiva // Codename: Wekiva
// Radeon 4330 - RV710 // Radeon 4330 - RV710
{0x954f, 3, 2, RADEON_R700 | 0x10, true, "Radeon HD 4300"}, {0x954f, 3, 2, RADEON_R700 | 0x10, CHIP_IGP, "Radeon HD 4300"},
{0x9552, 3, 2, RADEON_R700 | 0x10, true, "Radeon HD 4300"}, {0x9552, 3, 2, RADEON_R700 | 0x10, CHIP_IGP, "Radeon HD 4300"},
{0x9555, 3, 2, RADEON_R700 | 0x10, false, "Radeon HD 4350"}, {0x9555, 3, 2, RADEON_R700 | 0x10, CHIP_STD, "Radeon HD 4350"},
{0x9540, 3, 2, RADEON_R700 | 0x10, false, "Radeon HD 4550"}, {0x9540, 3, 2, RADEON_R700 | 0x10, CHIP_STD, "Radeon HD 4550"},
{0x9480, 3, 2, RADEON_R700 | 0x30, false, "Radeon HD 4650"}, {0x9480, 3, 2, RADEON_R700 | 0x30, CHIP_STD, "Radeon HD 4650"},
{0x9498, 3, 2, RADEON_R700 | 0x30, false, "Radeon HD 4650"}, {0x9498, 3, 2, RADEON_R700 | 0x30, CHIP_STD, "Radeon HD 4650"},
{0x94b4, 3, 2, RADEON_R700 | 0x40, false, "Radeon HD 4700"}, {0x94b4, 3, 2, RADEON_R700 | 0x40, CHIP_STD, "Radeon HD 4700"},
{0x9490, 3, 2, RADEON_R700 | 0x30, false, "Radeon HD 4710"}, {0x9490, 3, 2, RADEON_R700 | 0x30, CHIP_STD, "Radeon HD 4710"},
{0x94b3, 3, 2, RADEON_R700 | 0x40, false, "Radeon HD 4770"}, {0x94b3, 3, 2, RADEON_R700 | 0x40, CHIP_STD, "Radeon HD 4770"},
{0x94b5, 3, 2, RADEON_R700 | 0x40, false, "Radeon HD 4770"}, {0x94b5, 3, 2, RADEON_R700 | 0x40, CHIP_STD, "Radeon HD 4770"},
{0x944a, 3, 1, RADEON_R700 | 0x70, false, "Radeon HD 4850 Mobile"}, {0x944a, 3, 1, RADEON_R700 | 0x70, CHIP_MOBILE, "Radeon HD 4850"},
{0x944e, 3, 1, RADEON_R700 | 0x70, false, "Radeon HD 4810"}, {0x944e, 3, 1, RADEON_R700 | 0x70, CHIP_STD, "Radeon HD 4810"},
{0x944c, 3, 1, RADEON_R700 | 0x70, false, "Radeon HD 4830"}, {0x944c, 3, 1, RADEON_R700 | 0x70, CHIP_STD, "Radeon HD 4830"},
{0x9442, 3, 1, RADEON_R700 | 0x70, false, "Radeon HD 4850"}, {0x9442, 3, 1, RADEON_R700 | 0x70, CHIP_STD, "Radeon HD 4850"},
{0x9443, 3, 1, RADEON_R700 | 0x70, false, "Radeon HD 4850 X2"}, {0x9443, 3, 1, RADEON_R700 | 0x70, CHIP_STD, "Radeon HD 4850 X2"},
{0x94a1, 3, 1, RADEON_R700 | 0x90, true, "Radeon HD 4860"}, {0x94a1, 3, 1, RADEON_R700 | 0x90, CHIP_IGP, "Radeon HD 4860"},
{0x9440, 3, 1, RADEON_R700 | 0x70, false, "Radeon HD 4870"}, {0x9440, 3, 1, RADEON_R700 | 0x70, CHIP_STD, "Radeon HD 4870"},
{0x9441, 3, 1, RADEON_R700 | 0x70, false, "Radeon HD 4870 X2"}, {0x9441, 3, 1, RADEON_R700 | 0x70, CHIP_STD, "Radeon HD 4870 X2"},
{0x9460, 3, 1, RADEON_R700 | 0x90, false, "Radeon HD 4890"}, {0x9460, 3, 1, RADEON_R700 | 0x90, CHIP_STD, "Radeon HD 4890"},
// From here on AMD no longer used numeric identifiers // From here on AMD no longer used numeric identifiers
@@ -127,78 +127,78 @@ const struct supported_device {
// R1000 series (HD54xx - HD63xx) // R1000 series (HD54xx - HD63xx)
// Codename: Evergreen // Codename: Evergreen
// Cedar // Cedar
{0x68e1, 4, 0, RADEON_R1000 | 0x00, false, "Radeon HD 5430"}, {0x68e1, 4, 0, RADEON_R1000 | 0x00, CHIP_STD, "Radeon HD 5430"},
{0x68f9, 4, 0, RADEON_R1000 | 0x00, false, "Radeon HD 5450"}, {0x68f9, 4, 0, RADEON_R1000 | 0x00, CHIP_STD, "Radeon HD 5450"},
{0x68e0, 4, 0, RADEON_R1000 | 0x00, true, "Radeon HD 5470"}, {0x68e0, 4, 0, RADEON_R1000 | 0x00, CHIP_IGP, "Radeon HD 5470"},
// Redwood // Redwood
{0x68da, 4, 0, RADEON_R1000 | 0x10, false, "Radeon HD 5500"}, {0x68da, 4, 0, RADEON_R1000 | 0x10, CHIP_STD, "Radeon HD 5500"},
{0x68d9, 4, 0, RADEON_R1000 | 0x10, false, "Radeon HD 5570"}, {0x68d9, 4, 0, RADEON_R1000 | 0x10, CHIP_STD, "Radeon HD 5570"},
{0x68b9, 4, 0, RADEON_R1000 | 0x10, false, "Radeon HD 5600"}, {0x68b9, 4, 0, RADEON_R1000 | 0x10, CHIP_STD, "Radeon HD 5600"},
{0x68c1, 4, 0, RADEON_R1000 | 0x10, false, "Radeon HD 5650"}, {0x68c1, 4, 0, RADEON_R1000 | 0x10, CHIP_STD, "Radeon HD 5650"},
{0x68d8, 4, 0, RADEON_R1000 | 0x10, false, "Radeon HD 5670"}, {0x68d8, 4, 0, RADEON_R1000 | 0x10, CHIP_STD, "Radeon HD 5670"},
// Juniper // Juniper
{0x68be, 4, 0, RADEON_R1000 | 0x20, false, "Radeon HD 5700"}, {0x68be, 4, 0, RADEON_R1000 | 0x20, CHIP_STD, "Radeon HD 5700"},
{0x68b8, 4, 0, RADEON_R1000 | 0x20, false, "Radeon HD 5770"}, {0x68b8, 4, 0, RADEON_R1000 | 0x20, CHIP_STD, "Radeon HD 5770"},
// Cypress // Cypress
{0x689e, 4, 0, RADEON_R1000 | 0x30, false, "Radeon HD 5800"}, {0x689e, 4, 0, RADEON_R1000 | 0x30, CHIP_STD, "Radeon HD 5800"},
{0x6899, 4, 0, RADEON_R1000 | 0x30, false, "Radeon HD 5850"}, {0x6899, 4, 0, RADEON_R1000 | 0x30, CHIP_STD, "Radeon HD 5850"},
{0x6898, 4, 0, RADEON_R1000 | 0x30, false, "Radeon HD 5870"}, {0x6898, 4, 0, RADEON_R1000 | 0x30, CHIP_STD, "Radeon HD 5870"},
// Hemlock // Hemlock
{0x689c, 4, 0, RADEON_R1000 | 0x40, false, "Radeon HD 5900"}, {0x689c, 4, 0, RADEON_R1000 | 0x40, CHIP_STD, "Radeon HD 5900"},
// Fusion APUS // Fusion APUS
// Palms // Palms
{0x9804, 4, 1, RADEON_R1000 | 0x50, true, "Radeon HD 6250"}, {0x9804, 4, 1, RADEON_R1000 | 0x50, CHIP_APU, "Radeon HD 6250"},
{0x9805, 4, 1, RADEON_R1000 | 0x50, true, "Radeon HD 6290"}, {0x9805, 4, 1, RADEON_R1000 | 0x50, CHIP_APU, "Radeon HD 6290"},
{0x9802, 4, 1, RADEON_R1000 | 0x50, true, "Radeon HD 6310"}, {0x9802, 4, 1, RADEON_R1000 | 0x50, CHIP_APU, "Radeon HD 6310"},
{0x9803, 4, 1, RADEON_R1000 | 0x50, true, "Radeon HD 6310"}, {0x9803, 4, 1, RADEON_R1000 | 0x50, CHIP_APU, "Radeon HD 6310"},
// R2000 series (HD64xx - HD69xx) // R2000 series (HD64xx - HD69xx)
// Codename: Nothern Islands // Codename: Nothern Islands
// Caicos // Caicos
{0x6760, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD 6470M"}, {0x6760, 5, 0, RADEON_R2000 | 0x00, CHIP_MOBILE, "Radeon HD 6470M"},
{0x6761, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD 6430M"}, {0x6761, 5, 0, RADEON_R2000 | 0x00, CHIP_MOBILE, "Radeon HD 6430M"},
{0x6762, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD CAICOS"}, {0x6762, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD CAICOS"},
{0x6763, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD E6460 Discreet"}, {0x6763, 5, 0, RADEON_R2000 | 0x00, CHIP_DISCREET, "Radeon HD E6460"},
{0x6764, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD CAICOS"}, {0x6764, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD CAICOS"},
{0x6765, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD CAICOS"}, {0x6765, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD CAICOS"},
{0x6766, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD CAICOS"}, {0x6766, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD CAICOS"},
{0x6767, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD CAICOS"}, {0x6767, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD CAICOS"},
{0x6768, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD CAICOS"}, {0x6768, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD CAICOS"},
{0x6770, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD 6400"}, {0x6770, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD 6400"},
{0x6779, 5, 0, RADEON_R2000 | 0x00, false, "Radeon HD 6450"}, {0x6779, 5, 0, RADEON_R2000 | 0x00, CHIP_STD, "Radeon HD 6450"},
// Turks // Turks
{0x6740, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD 6700M"}, {0x6740, 5, 0, RADEON_R2000 | 0x10, CHIP_MOBILE, "Radeon HD 6700M"},
{0x6741, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD 6600M"}, {0x6741, 5, 0, RADEON_R2000 | 0x10, CHIP_MOBILE, "Radeon HD 6600M"},
{0x6742, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD 6625M"}, {0x6742, 5, 0, RADEON_R2000 | 0x10, CHIP_MOBILE, "Radeon HD 6625M"},
{0x6743, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD E6760 Discreet"}, {0x6743, 5, 0, RADEON_R2000 | 0x10, CHIP_DISCREET, "Radeon HD E6760"},
{0x6744, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD TURKS M"}, {0x6744, 5, 0, RADEON_R2000 | 0x10, CHIP_MOBILE, "Radeon HD TURKS M"},
{0x6745, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD TURKS M"}, {0x6745, 5, 0, RADEON_R2000 | 0x10, CHIP_MOBILE, "Radeon HD TURKS M"},
{0x6746, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD TURKS"}, {0x6746, 5, 0, RADEON_R2000 | 0x10, CHIP_STD, "Radeon HD TURKS"},
{0x6747, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD TURKS"}, {0x6747, 5, 0, RADEON_R2000 | 0x10, CHIP_STD, "Radeon HD TURKS"},
{0x6748, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD TURKS"}, {0x6748, 5, 0, RADEON_R2000 | 0x10, CHIP_STD, "Radeon HD TURKS"},
{0x6749, 5, 0, RADEON_R2000 | 0x10, false, "FirePro v4900"}, {0x6749, 5, 0, RADEON_R2000 | 0x10, CHIP_STD, "FirePro v4900"},
{0x6759, 5, 0, RADEON_R2000 | 0x10, false, "Radeon HD 6570"}, {0x6759, 5, 0, RADEON_R2000 | 0x10, CHIP_STD, "Radeon HD 6570"},
// Barts // Barts
{0x673e, 5, 0, RADEON_R2000 | 0x20, false, "Radeon HD 6790"}, {0x673e, 5, 0, RADEON_R2000 | 0x20, CHIP_STD, "Radeon HD 6790"},
{0x6739, 5, 0, RADEON_R2000 | 0x20, false, "Radeon HD 6850"}, {0x6739, 5, 0, RADEON_R2000 | 0x20, CHIP_STD, "Radeon HD 6850"},
{0x6738, 5, 0, RADEON_R2000 | 0x20, false, "Radeon HD 6870"}, {0x6738, 5, 0, RADEON_R2000 | 0x20, CHIP_STD, "Radeon HD 6870"},
// Cayman // Cayman
{0x6700, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6700, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6701, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6701, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6702, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6702, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6703, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6703, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6704, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6704, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6705, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6705, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6706, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6706, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6707, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6707, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6708, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6708, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6709, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x6709, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x6718, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD 6970"}, {0x6718, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD 6970"},
{0x6719, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD 6950"}, {0x6719, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD 6950"},
{0x671C, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD CAYMAN"}, {0x671C, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD CAYMAN"},
{0x671F, 5, 0, RADEON_R2000 | 0x30, false, "Radeon HD 6900"}, {0x671F, 5, 0, RADEON_R2000 | 0x30, CHIP_STD, "Radeon HD 6900"},
// Antilles // Antilles
{0x671d, 5, 0, RADEON_R2000 | 0x40, false, "Radeon HD 6990"} {0x671d, 5, 0, RADEON_R2000 | 0x40, CHIP_STD, "Radeon HD 6990"}
#endif #endif
// R3000 series (HD74xx - HD79xx) // R3000 series (HD74xx - HD79xx)
@@ -339,7 +339,7 @@ init_driver(void)
gDeviceInfo[found]->device_chipset = kSupportedDevices[type].chipset; gDeviceInfo[found]->device_chipset = kSupportedDevices[type].chipset;
gDeviceInfo[found]->dceMajor = kSupportedDevices[type].dceMajor; gDeviceInfo[found]->dceMajor = kSupportedDevices[type].dceMajor;
gDeviceInfo[found]->dceMinor = kSupportedDevices[type].dceMinor; gDeviceInfo[found]->dceMinor = kSupportedDevices[type].dceMinor;
gDeviceInfo[found]->isIGP = kSupportedDevices[type].isIGP; gDeviceInfo[found]->chipsetFlags = kSupportedDevices[type].chipsetFlags;
dprintf(DEVICE_NAME ": GPU(%ld) %s, revision = 0x%x\n", found, dprintf(DEVICE_NAME ": GPU(%ld) %s, revision = 0x%x\n", found,
kSupportedDevices[type].name, info->revision); kSupportedDevices[type].name, info->revision);
@@ -62,7 +62,7 @@ radeon_hd_getbios(radeon_info &info)
uint32 romSize; uint32 romSize;
uint32 romConfig = 0; uint32 romConfig = 0;
if (info.isIGP == true) { if ((info.chipsetFlags & CHIP_IGP) != 0) {
// IGP chipsets don't have a PCI rom BAR. // IGP chipsets don't have a PCI rom BAR.
// On post, the bios puts a copy of the IGP // On post, the bios puts a copy of the IGP
// AtomBIOS at the start of the video ram // AtomBIOS at the start of the video ram
@@ -155,7 +155,7 @@ radeon_hd_getbios(radeon_info &info)
} }
} }
if (info.isIGP == false) { if ((info.chipsetFlags & CHIP_IGP) == 0) {
// Disable ROM decoding // Disable ROM decoding
romConfig &= ~PCI_rom_enable; romConfig &= ~PCI_rom_enable;
set_pci_config(info.pci, PCI_rom_base, 4, romConfig); set_pci_config(info.pci, PCI_rom_base, 4, romConfig);
@@ -392,9 +392,9 @@ radeon_hd_init(radeon_info &info)
info.shared_info->device_index = info.id; info.shared_info->device_index = info.id;
info.shared_info->device_id = info.device_id; info.shared_info->device_id = info.device_id;
info.shared_info->device_chipset = info.device_chipset; info.shared_info->device_chipset = info.device_chipset;
info.shared_info->chipsetFlags = info.chipsetFlags;
info.shared_info->dceMajor = info.dceMajor; info.shared_info->dceMajor = info.dceMajor;
info.shared_info->dceMinor = info.dceMinor; info.shared_info->dceMinor = info.dceMinor;
info.shared_info->isIGP = info.isIGP;
info.shared_info->registers_area = info.registers_area; info.shared_info->registers_area = info.registers_area;
strcpy(info.shared_info->device_identifier, info.device_identifier); strcpy(info.shared_info->device_identifier, info.device_identifier);
@@ -44,9 +44,9 @@ struct radeon_info {
const char* device_identifier; const char* device_identifier;
uint32 device_id; uint32 device_id;
uint16 device_chipset; uint16 device_chipset;
uint32 chipsetFlags;
uint8 dceMajor; uint8 dceMajor;
uint8 dceMinor; uint8 dceMinor;
bool isIGP;
}; };